From 6715af9b17ce6a1f4480eff96e8be640fa38c0bb Mon Sep 17 00:00:00 2001
From: Carter Hsu <carterhsu@google.com>
Date: Fri, 15 Apr 2022 17:45:06 +0800
Subject: [PATCH] audio: update Fortemedia tuning 0415
FM table Changelist:
1. P10 HA NB/WB/SWB : FFP parameter update(enable)
2. P10C10 HH NB/WB/SWB:
(1) TX/RX fine tune for phone call quality
(2) FFP parameter update (enable)
(3) Enable Stereo spk in reserve2
3. P10C10 HE NB/WB/SWB:
(1) Enable Stereo spk in reserve2
4. Align same parameter
(1) Handsfree TX to VCO TX/ BT-HAC TX/ Headphone TX
(2) Handsfree RX to HCO RX
Bug: 216258666
Test: build pass
Signed-off-by: Carter Hsu <carterhsu@google.com>
Change-Id: I50ec916280b96d631f1b656d6c1a0a96d324408f
---
audio/cheetah/tuning/fortemedia/BLUETOOTH.dat | Bin 223718 -> 276978 bytes
.../cheetah/tuning/fortemedia/BLUETOOTH.mods | 16642 +++++++++--
audio/cheetah/tuning/fortemedia/HANDSET.dat | Bin 255674 -> 255674 bytes
audio/cheetah/tuning/fortemedia/HANDSET.mods | 336 +-
audio/cheetah/tuning/fortemedia/HANDSFREE.dat | Bin 117198 -> 117198 bytes
.../cheetah/tuning/fortemedia/HANDSFREE.mods | 1516 +-
audio/cheetah/tuning/fortemedia/HEADSET.dat | Bin 340890 -> 426106 bytes
audio/cheetah/tuning/fortemedia/HEADSET.mods | 23548 ++++++++++++++-
audio/panther/tuning/fortemedia/BLUETOOTH.dat | Bin 223718 -> 276978 bytes
.../panther/tuning/fortemedia/BLUETOOTH.mods | 16662 +++++++++--
audio/panther/tuning/fortemedia/HANDSET.dat | Bin 255674 -> 255674 bytes
audio/panther/tuning/fortemedia/HANDSET.mods | 268 +-
audio/panther/tuning/fortemedia/HANDSFREE.dat | Bin 117198 -> 117198 bytes
.../panther/tuning/fortemedia/HANDSFREE.mods | 1726 +-
audio/panther/tuning/fortemedia/HEADSET.dat | Bin 340890 -> 426106 bytes
audio/panther/tuning/fortemedia/HEADSET.mods | 23772 +++++++++++++++-
16 files changed, 76945 insertions(+), 7525 deletions(-)
diff --git a/audio/cheetah/tuning/fortemedia/BLUETOOTH.dat b/audio/cheetah/tuning/fortemedia/BLUETOOTH.dat
index 1d89f082a2d06f9d42b15f3f2cf7fe8078ee022a..5430984593f3247bf02ee6a37837736ec1eab271 100644
GIT binary patch
delta 645
zcmaEMnfKFYfeB*FH!N8;N*>c>%-{S#Gnk1{V6ushF{8ue44r3sj12b~W>`I7@L_q#
zpy2n2fsx@c1B1g81_p(v3=B-q7#IYeGcYi`0OFSn5{#1rR%vfuu6vr1QDHKFr1a!I
z{SHQ!&Ef{-99#^H>zNNc*uY#MKKVko*XBnSQ>5668JHMq@;BE62Qe`<$WOiy>cq8x
zX(hu6hE)t3*d{mVq)l!L%ix1KA%yWELx=0+A7OHA5lpWb{?|`#&{f}Dy=n&I<l7NC
z91dxWXL-^Y8-NxsW@O#`dQCm!bUSTE&dKu)#Wx2<-(UkfVZ{@;6Y7$HPWTLQf<!IY
z-#PV8Oa)AnH`K3V0=hGyL62<@(?bT1Ah4wq7~z)QZ<x-=#2_%aqUjpYD*xugtdq;)
z1t#y?q`G-^yb9yy?5=1=B<nU`=q_^Et|ZIUp*dOa0?+1aKkw9RpL7_=oj$LOk*D2l
z0poVJ1xyQ0PJUOzsmL)w(=9AM*wOdnM-E`Pa`1ETGXiNwAf$_Hf$<Z}$go+Z$C{Us
wVfzJpMq^$^j_n!BjM_kVz=R#1L4<FdL=oQ5!-P$>f-y5#7*+M=gqd2r0D2tSY5)KL
delta 369
zcmY+9KPZH87{{OI_qZ2t90LwX$0FQ0I!Ojy$Y7vO<WC`k{JY4&mCL;`5Q=)#dxJ2M
z>*Dwgx0omi!&^$qaCZiYjY$UHl)>;FzSHOPdH=|MzRTRqquVh$DYz_0mrRs*3KU%H
zaHE|^9nXA9xtP!O;bwW@yg}U?FyBBVhj(0lL}{y@OH)JYF#$x$-p<Ban|!L@DpcGc
zAmEaLPOlIk*yw6fH9UkX2t!n1%`w7@-J{kQibJR&0e(vozMA!Q9~CPv^a|fW)|_Q>
zJ{&@R>~Ub4zCA^yT+zE?GT$OW)Eg@?op)<&(%b)_sCvdfgN0$!K>ixUvd76Rvh!rH
zNodH?;E{;d@sL)f7^z8k=>3I?GZBmU=p2RCs83JPy@}~qy08>@K#&KBS|P<uv``i(
v=28jd#-In~#A-jPCDuQ<G}dNX5IFv6lYK_dK7!t{hqmSGS&UuJilUDnJj8qL
diff --git a/audio/cheetah/tuning/fortemedia/BLUETOOTH.mods b/audio/cheetah/tuning/fortemedia/BLUETOOTH.mods
index 1b3f315e..713d9345 100644
--- a/audio/cheetah/tuning/fortemedia/BLUETOOTH.mods
+++ b/audio/cheetah/tuning/fortemedia/BLUETOOTH.mods
@@ -1,7 +1,7 @@
#PLATFORM_NAME gChip
#EXPORT_FLAG BLUETOOTH
#SINGLE_API_VER 1.2.1
-#SAVE_TIME 2022-04-01 10:51:01
+#SAVE_TIME 2022-04-15 16:36:52
#CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-FB
#PARAM_MODE FULL
@@ -2681,7 +2681,7 @@
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
2 0x00F3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0000 //TX_SAMPLINGFREQ_SIG
@@ -2830,7 +2830,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x7A00 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x0200 //TX_MIN_EQ_RE_EST_0
+152 0x1000 //TX_MIN_EQ_RE_EST_0
153 0x0200 //TX_MIN_EQ_RE_EST_1
154 0x0200 //TX_MIN_EQ_RE_EST_2
155 0x0200 //TX_MIN_EQ_RE_EST_3
@@ -2843,7 +2843,7 @@
162 0x4000 //TX_MIN_EQ_RE_EST_10
163 0x6000 //TX_MIN_EQ_RE_EST_11
164 0x7FFF //TX_MIN_EQ_RE_EST_12
-165 0x2000 //TX_LAMBDA_RE_EST
+165 0x4000 //TX_LAMBDA_RE_EST
166 0x0000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x2000 //TX_GAIN_NP
@@ -2901,18 +2901,18 @@
220 0x0000 //TX_DTD_MIC_BLK
221 0x1000 //TX_ADPT_STRICT_L
222 0x1000 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+225 0x044C //TX_RATIO_DT_L_TH_HIGH
226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x1800 //TX_B_POST_FILT_ECHO_L
+227 0x0001 //TX_RATIO_DT_L0_TH
+228 0x4000 //TX_B_POST_FILT_ECHO_L
229 0x2000 //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+234 0x0118 //TX_RATIO_DT_L0_TH_HIGH
235 0x3A98 //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -3038,7 +3038,7 @@
357 0x0FA0 //TX_DT_BINVAD_ENDF
358 0x0400 //TX_C_POST_FLT_DT
359 0x4000 //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
+360 0x0120 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
362 0x0005 //TX_BF_DVG_TH
363 0x001E //TX_SN_C_F
@@ -3079,7 +3079,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0004 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -3621,9 +3621,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0A98 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE0C0 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -5350,8 +5350,8 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x0073 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0001 //TX_SAMPLINGFREQ_SIG
@@ -5500,7 +5500,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x6800 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x0200 //TX_MIN_EQ_RE_EST_0
+152 0x1F80 //TX_MIN_EQ_RE_EST_0
153 0x0100 //TX_MIN_EQ_RE_EST_1
154 0x0200 //TX_MIN_EQ_RE_EST_2
155 0x0200 //TX_MIN_EQ_RE_EST_3
@@ -5517,7 +5517,7 @@
166 0x4000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x5000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x02A0 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
171 0x06B0 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
@@ -5571,10 +5571,10 @@
220 0x0000 //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x03E8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x0578 //TX_RATIO_DT_L_TH_HIGH
-226 0x43FB //TX_RATIO_DT_H_TH_HIGH
+225 0x0154 //TX_RATIO_DT_L_TH_HIGH
+226 0x4588 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -5582,7 +5582,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH
+234 0x0258 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -5706,9 +5706,9 @@
355 0x0200 //TX_DT_BINVAD_TH_2
356 0x0800 //TX_DT_BINVAD_TH_3
357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0800 //TX_C_POST_FLT_DT
+358 0x4000 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0140 //TX_DT_BOOST
+360 0x0180 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
362 0x0005 //TX_BF_DVG_TH
363 0x001E //TX_SN_C_F
@@ -5749,7 +5749,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x4000 //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -6291,9 +6291,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0C97 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE4A8 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -8020,8 +8020,8 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x00B3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0003 //TX_SAMPLINGFREQ_SIG
@@ -8170,7 +8170,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x7600 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x2000 //TX_MIN_EQ_RE_EST_0
+152 0x1000 //TX_MIN_EQ_RE_EST_0
153 0x0600 //TX_MIN_EQ_RE_EST_1
154 0x3000 //TX_MIN_EQ_RE_EST_2
155 0x3000 //TX_MIN_EQ_RE_EST_3
@@ -8187,7 +8187,7 @@
166 0x3000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x4000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x0270 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
171 0x0880 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
@@ -8231,7 +8231,7 @@
210 0x5000 //TX_DTD_THR2_6
211 0x7FFF //TX_DTD_THR3
212 0x0000 //TX_SPK_CUT_K
-213 0x36B0 //TX_DT_CUT_K
+213 0x1770 //TX_DT_CUT_K
214 0x0100 //TX_DT_CUT_THR
215 0x04EB //TX_COMFORT_G
216 0x01F4 //TX_POWER_YOUT_TH
@@ -8243,8 +8243,8 @@
222 0x023E //TX_ADPT_STRICT_H
223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x07D0 //TX_RATIO_DT_L_TH_HIGH
-226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+225 0x02BC //TX_RATIO_DT_L_TH_HIGH
+226 0x5208 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -8252,7 +8252,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x02BC //TX_RATIO_DT_L0_TH_HIGH
+234 0x0190 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -8365,7 +8365,7 @@
344 0x7F00 //TX_LAMBDA_PFILT_S_5
345 0x7F00 //TX_LAMBDA_PFILT_S_6
346 0x7F00 //TX_LAMBDA_PFILT_S_7
-347 0x3E80 //TX_K_PEPPER
+347 0x1000 //TX_K_PEPPER
348 0x0400 //TX_A_PEPPER
349 0x1EAA //TX_K_PEPPER_HF
350 0x0600 //TX_A_PEPPER_HF
@@ -8419,7 +8419,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -8788,13 +8788,13 @@
767 0x0050 //TX_MIC_CALIBRATION_2
768 0x0050 //TX_MIC_CALIBRATION_3
769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
775 0x000F //TX_GAIN_LIMIT_2
-776 0x0000 //TX_GAIN_LIMIT_3
+776 0x000F //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
778 0x7FDE //TX_BVE_VAD0_ALPHAUP
779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
@@ -8961,9 +8961,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0E21 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE4A8 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -13358,7 +13358,7 @@
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
-0 0x0000 //TX_OPERATION_MODE_0
+0 0x0008 //TX_OPERATION_MODE_0
1 0x0008 //TX_OPERATION_MODE_1
2 0x0033 //TX_PATCH_REG
3 0x0240 //TX_SENDFUNC_MODE_0
@@ -16024,7 +16024,7 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-WB
-#PARAM_MODE Full
+#PARAM_MODE FULL
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -18694,7 +18694,7 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-SWB
-#PARAM_MODE Full
+#PARAM_MODE FULL
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -21364,7 +21364,7 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-FB
-#PARAM_MODE Full
+#PARAM_MODE FULL
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -24038,7 +24038,7 @@
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
-0 0x0000 //TX_OPERATION_MODE_0
+0 0x0008 //TX_OPERATION_MODE_0
1 0x0008 //TX_OPERATION_MODE_1
2 0x0033 //TX_PATCH_REG
3 0x2A68 //TX_SENDFUNC_MODE_0
@@ -43616,64 +43616,13414 @@
885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x0028 //TX_FASTNS_ARSPC_TH
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x2064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000A //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7000 //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x0064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0004 //RX_SAMPLINGFREQ_SIG
+160 0x0004 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0500 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x000A //RX_NS_LVL_CTRL
+180 0xF600 //RX_THR_SN_EST
+181 0x7000 //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0A13 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4242 //TX_FDEQ_GAIN_6
+574 0x423C //TX_FDEQ_GAIN_7
+575 0x3C3C //TX_FDEQ_GAIN_8
+576 0x3434 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x206C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x206C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0000 //RX_SAMPLINGFREQ_SIG
+160 0x0000 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x3800 //RX_THR_PITCH_DET_0
+171 0x3000 //RX_THR_PITCH_DET_1
+172 0x2800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0600 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0010 //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4444 //TX_FDEQ_GAIN_7
+575 0x4444 //TX_FDEQ_GAIN_8
+576 0x3C3C //TX_FDEQ_GAIN_9
+577 0x3C3C //TX_FDEQ_GAIN_10
+578 0x3C3C //TX_FDEQ_GAIN_11
+579 0x3C30 //TX_FDEQ_GAIN_12
+580 0x3030 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1112 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x206C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x206C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0001 //RX_SAMPLINGFREQ_SIG
+160 0x0001 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x3800 //RX_THR_PITCH_DET_0
+171 0x3000 //RX_THR_PITCH_DET_1
+172 0x2800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0600 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0010 //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x2064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x2064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x286A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x4500 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0400 //TX_DELTA_THR_SN_EST_1
+252 0x0300 //TX_DELTA_THR_SN_EST_2
+253 0x0600 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0019 //TX_NS_LVL_CTRL_3
+285 0x0010 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0019 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000F //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x0011 //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x7000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0200 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x2064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000A //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7000 //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x0064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0004 //RX_SAMPLINGFREQ_SIG
+160 0x0004 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0500 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x000A //RX_NS_LVL_CTRL
+180 0xF600 //RX_THR_SN_EST
+181 0x7000 //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BT_HAC-RESERVE2-SWB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x00A3 //TX_DIST2REF1
+22 0x001B //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0002 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0CAE //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0400 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x1000 //TX_MIN_EQ_RE_EST_0
+153 0x0600 //TX_MIN_EQ_RE_EST_1
+154 0x3000 //TX_MIN_EQ_RE_EST_2
+155 0x3000 //TX_MIN_EQ_RE_EST_3
+156 0x3000 //TX_MIN_EQ_RE_EST_4
+157 0x3000 //TX_MIN_EQ_RE_EST_5
+158 0x3000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x7800 //TX_MIN_EQ_RE_EST_8
+161 0x7800 //TX_MIN_EQ_RE_EST_9
+162 0x7800 //TX_MIN_EQ_RE_EST_10
+163 0x7800 //TX_MIN_EQ_RE_EST_11
+164 0x7800 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x3000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0270 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x0880 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7148 //TX_DTD_THR1_0
+198 0x7148 //TX_DTD_THR1_1
+199 0x7148 //TX_DTD_THR1_2
+200 0x7148 //TX_DTD_THR1_3
+201 0x7148 //TX_DTD_THR1_4
+202 0x7700 //TX_DTD_THR1_5
+203 0x7148 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x1770 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x02BC //TX_RATIO_DT_L_TH_HIGH
+226 0x5208 //TX_RATIO_DT_H_TH_HIGH
+227 0x0001 //TX_RATIO_DT_L0_TH
+228 0x7FFF //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x0190 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0000 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0100 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0024 //TX_NS_LVL_CTRL_2
+284 0x001A //TX_NS_LVL_CTRL_3
+285 0x0014 //TX_NS_LVL_CTRL_4
+286 0x0011 //TX_NS_LVL_CTRL_5
+287 0x001A //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x0020 //TX_MIN_GAIN_S_0
+290 0x0020 //TX_MIN_GAIN_S_1
+291 0x0020 //TX_MIN_GAIN_S_2
+292 0x0020 //TX_MIN_GAIN_S_3
+293 0x0020 //TX_MIN_GAIN_S_4
+294 0x0020 //TX_MIN_GAIN_S_5
+295 0x0020 //TX_MIN_GAIN_S_6
+296 0x0020 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x7FFF //TX_A_POST_FILT_S_0
+315 0x7FFF //TX_A_POST_FILT_S_1
+316 0x7FFF //TX_A_POST_FILT_S_2
+317 0x7FFF //TX_A_POST_FILT_S_3
+318 0x7FFF //TX_A_POST_FILT_S_4
+319 0x7FFF //TX_A_POST_FILT_S_5
+320 0x7FFF //TX_A_POST_FILT_S_6
+321 0x7FFF //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x6000 //TX_B_POST_FILT_1
+324 0x6000 //TX_B_POST_FILT_2
+325 0x6000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7F00 //TX_LAMBDA_PFILT
+339 0x7F00 //TX_LAMBDA_PFILT_S_0
+340 0x7F00 //TX_LAMBDA_PFILT_S_1
+341 0x7F00 //TX_LAMBDA_PFILT_S_2
+342 0x7F00 //TX_LAMBDA_PFILT_S_3
+343 0x7F00 //TX_LAMBDA_PFILT_S_4
+344 0x7F00 //TX_LAMBDA_PFILT_S_5
+345 0x7F00 //TX_LAMBDA_PFILT_S_6
+346 0x7F00 //TX_LAMBDA_PFILT_S_7
+347 0x1000 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0040 //TX_DT_BINVAD_TH_0
+354 0x0040 //TX_DT_BINVAD_TH_1
+355 0x0100 //TX_DT_BINVAD_TH_2
+356 0x0100 //TX_DT_BINVAD_TH_3
+357 0x36B0 //TX_DT_BINVAD_ENDF
+358 0x0200 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x01F4 //TX_NOISE_TH_2
+372 0x36B0 //TX_NOISE_TH_3
+373 0x2710 //TX_NOISE_TH_4
+374 0x2CEC //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0DAC //TX_NOISE_TH_6
+379 0x0050 //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x07D0 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0005 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0050 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4000 //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x3000 //TX_DEREVERB_LF_MU
+515 0x34CD //TX_DEREVERB_HF_MU
+516 0x0007 //TX_DEREVERB_DELAY
+517 0x0004 //TX_DEREVERB_COEF_LEN
+518 0x0003 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x3A98 //TX_GSC_RTOL_TH
+522 0x3A98 //TX_GSC_RTOH_TH
+523 0x7E2C //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4850 //TX_FDEQ_GAIN_2
+570 0x5050 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4850 //TX_FDEQ_GAIN_5
+573 0x5261 //TX_FDEQ_GAIN_6
+574 0x5C4C //TX_FDEQ_GAIN_7
+575 0x4C4E //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4C4F //TX_FDEQ_GAIN_10
+578 0x5153 //TX_FDEQ_GAIN_11
+579 0x5A5B //TX_FDEQ_GAIN_12
+580 0x5A7F //TX_FDEQ_GAIN_13
+581 0x7C77 //TX_FDEQ_GAIN_14
+582 0x6D75 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x284A //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0202 //TX_PREEQ_BIN_MIC0_0
+642 0x0203 //TX_PREEQ_BIN_MIC0_1
+643 0x0303 //TX_PREEQ_BIN_MIC0_2
+644 0x0304 //TX_PREEQ_BIN_MIC0_3
+645 0x0405 //TX_PREEQ_BIN_MIC0_4
+646 0x0506 //TX_PREEQ_BIN_MIC0_5
+647 0x0708 //TX_PREEQ_BIN_MIC0_6
+648 0x090A //TX_PREEQ_BIN_MIC0_7
+649 0x0B0C //TX_PREEQ_BIN_MIC0_8
+650 0x0D0E //TX_PREEQ_BIN_MIC0_9
+651 0x1013 //TX_PREEQ_BIN_MIC0_10
+652 0x1719 //TX_PREEQ_BIN_MIC0_11
+653 0x1B1E //TX_PREEQ_BIN_MIC0_12
+654 0x1E1E //TX_PREEQ_BIN_MIC0_13
+655 0x1E28 //TX_PREEQ_BIN_MIC0_14
+656 0x3042 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x494A //TX_PREEQ_GAIN_MIC1_6
+673 0x4B4C //TX_PREEQ_GAIN_MIC1_7
+674 0x4D4E //TX_PREEQ_GAIN_MIC1_8
+675 0x4F52 //TX_PREEQ_GAIN_MIC1_9
+676 0x5355 //TX_PREEQ_GAIN_MIC1_10
+677 0x585C //TX_PREEQ_GAIN_MIC1_11
+678 0x616A //TX_PREEQ_GAIN_MIC1_12
+679 0x726E //TX_PREEQ_GAIN_MIC1_13
+680 0x5C48 //TX_PREEQ_GAIN_MIC1_14
+681 0x3B38 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0202 //TX_PREEQ_BIN_MIC1_0
+691 0x0203 //TX_PREEQ_BIN_MIC1_1
+692 0x0303 //TX_PREEQ_BIN_MIC1_2
+693 0x0304 //TX_PREEQ_BIN_MIC1_3
+694 0x0405 //TX_PREEQ_BIN_MIC1_4
+695 0x0506 //TX_PREEQ_BIN_MIC1_5
+696 0x0708 //TX_PREEQ_BIN_MIC1_6
+697 0x090A //TX_PREEQ_BIN_MIC1_7
+698 0x0B0C //TX_PREEQ_BIN_MIC1_8
+699 0x0D0E //TX_PREEQ_BIN_MIC1_9
+700 0x1013 //TX_PREEQ_BIN_MIC1_10
+701 0x1719 //TX_PREEQ_BIN_MIC1_11
+702 0x1B1E //TX_PREEQ_BIN_MIC1_12
+703 0x1E1E //TX_PREEQ_BIN_MIC1_13
+704 0x1E28 //TX_PREEQ_BIN_MIC1_14
+705 0x3042 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4849 //TX_PREEQ_GAIN_MIC2_6
+722 0x4A4A //TX_PREEQ_GAIN_MIC2_7
+723 0x4B4B //TX_PREEQ_GAIN_MIC2_8
+724 0x4C4D //TX_PREEQ_GAIN_MIC2_9
+725 0x4D4E //TX_PREEQ_GAIN_MIC2_10
+726 0x4F4F //TX_PREEQ_GAIN_MIC2_11
+727 0x504F //TX_PREEQ_GAIN_MIC2_12
+728 0x4C49 //TX_PREEQ_GAIN_MIC2_13
+729 0x4A4C //TX_PREEQ_GAIN_MIC2_14
+730 0x4F5E //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0202 //TX_PREEQ_BIN_MIC2_0
+740 0x0203 //TX_PREEQ_BIN_MIC2_1
+741 0x0303 //TX_PREEQ_BIN_MIC2_2
+742 0x0304 //TX_PREEQ_BIN_MIC2_3
+743 0x0405 //TX_PREEQ_BIN_MIC2_4
+744 0x0506 //TX_PREEQ_BIN_MIC2_5
+745 0x0708 //TX_PREEQ_BIN_MIC2_6
+746 0x090A //TX_PREEQ_BIN_MIC2_7
+747 0x0B0C //TX_PREEQ_BIN_MIC2_8
+748 0x0D0E //TX_PREEQ_BIN_MIC2_9
+749 0x1013 //TX_PREEQ_BIN_MIC2_10
+750 0x1719 //TX_PREEQ_BIN_MIC2_11
+751 0x1B1E //TX_PREEQ_BIN_MIC2_12
+752 0x1E1E //TX_PREEQ_BIN_MIC2_13
+753 0x1E28 //TX_PREEQ_BIN_MIC2_14
+754 0x363C //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0002 //TX_TDDRC_THRD_1
+856 0x1000 //TX_TDDRC_THRD_2
+857 0x1000 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0E21 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
889 0xC000 //TX_FASTNS_MASK5_TH
890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7000 //TX_A_LESSCUT_RTO_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
892 0x1770 //TX_FASTNS_NOISETH
893 0xC000 //TX_FASTNS_SSA_THLFL
894 0xC000 //TX_FASTNS_SSA_THHFL
895 0xCCCC //TX_FASTNS_SSA_THLFH
896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x0000 //TX_AMS_RESRV_03
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE4A8 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -43691,31 +57041,31 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x2064 //RX_RECVFUNC_MODE_0
+0 0x0064 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0004 //RX_SAMPLINGFREQ_SIG
-3 0x0004 //RX_SAMPLINGFREQ_PROC
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
10 0x0800 //RX_PGA
11 0x7FFF //RX_A_HP
-12 0x4000 //RX_B_PE
-13 0x7800 //RX_THR_PITCH_DET_0
-14 0x7000 //RX_THR_PITCH_DET_1
-15 0x6000 //RX_THR_PITCH_DET_2
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
16 0x0008 //RX_PITCH_BFR_LEN
17 0x0003 //RX_SBD_PITCH_DET
18 0x0100 //RX_PP_RESRV_0
19 0x0020 //RX_PP_RESRV_1
-20 0x0500 //RX_N_SN_EST
+20 0x0400 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
-22 0x000A //RX_NS_LVL_CTRL
-23 0xF600 //RX_THR_SN_EST
-24 0x7000 //RX_LAMBDA_PFILT
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_FENS_RESRV_0
26 0x0190 //RX_FENS_RESRV_1
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -43756,20 +57106,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -43809,7 +57159,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -43849,10 +57199,10 @@
155 0x0000 //RX_BWE_RESRV_1
156 0x0000 //RX_BWE_RESRV_2
#VOL 0
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -43865,7 +57215,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -43899,20 +57249,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -43948,10 +57298,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -43964,7 +57314,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -43998,20 +57348,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -44047,10 +57397,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44063,7 +57413,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44097,20 +57447,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -44146,10 +57496,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44162,7 +57512,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44196,20 +57546,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -44245,10 +57595,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44261,7 +57611,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44295,20 +57645,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -44344,10 +57694,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 5
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44360,7 +57710,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44394,20 +57744,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -44443,10 +57793,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 6
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44459,7 +57809,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44493,20 +57843,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -44544,29 +57894,29 @@
#RX 2
157 0x0064 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0004 //RX_SAMPLINGFREQ_SIG
-160 0x0004 //RX_SAMPLINGFREQ_PROC
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
161 0x000A //RX_FRAME_SZ
162 0x0000 //RX_DELAY_OPT
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
167 0x0800 //RX_PGA
168 0x7FFF //RX_A_HP
-169 0x4000 //RX_B_PE
-170 0x7800 //RX_THR_PITCH_DET_0
-171 0x7000 //RX_THR_PITCH_DET_1
-172 0x6000 //RX_THR_PITCH_DET_2
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
173 0x0008 //RX_PITCH_BFR_LEN
174 0x0003 //RX_SBD_PITCH_DET
175 0x0100 //RX_PP_RESRV_0
176 0x0020 //RX_PP_RESRV_1
-177 0x0500 //RX_N_SN_EST
+177 0x0400 //RX_N_SN_EST
178 0x000C //RX_N2_SN_EST
-179 0x000A //RX_NS_LVL_CTRL
-180 0xF600 //RX_THR_SN_EST
-181 0x7000 //RX_LAMBDA_PFILT
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
182 0x000A //RX_FENS_RESRV_0
183 0x0190 //RX_FENS_RESRV_1
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -44607,20 +57957,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -44660,7 +58010,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44700,10 +58050,10 @@
312 0x0000 //RX_BWE_RESRV_1
313 0x0000 //RX_BWE_RESRV_2
#VOL 0
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44716,7 +58066,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44750,20 +58100,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -44799,10 +58149,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44815,7 +58165,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44849,20 +58199,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -44898,10 +58248,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44914,7 +58264,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44948,20 +58298,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -44997,10 +58347,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -45013,7 +58363,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -45047,20 +58397,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -45096,10 +58446,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -45112,7 +58462,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -45146,20 +58496,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -45195,10 +58545,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -45211,7 +58561,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -45245,20 +58595,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -45294,10 +58644,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -45310,7 +58660,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -45344,20 +58694,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -45393,19 +58743,19 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB
+#CASE_NAME BLUETOOTH-BTNB-RESERVE2-SWB
#PARAM_MODE Full
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
-0 0x0008 //TX_OPERATION_MODE_0
-1 0x0008 //TX_OPERATION_MODE_1
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
2 0x0033 //TX_PATCH_REG
-3 0x2A68 //TX_SENDFUNC_MODE_0
+3 0x0200 //TX_SENDFUNC_MODE_0
4 0x0001 //TX_SENDFUNC_MODE_1
5 0x0001 //TX_NUM_MIC
-6 0x0000 //TX_SAMPLINGFREQ_SIG
-7 0x0000 //TX_SAMPLINGFREQ_PROC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
8 0x000A //TX_FRAME_SZ_SIG
9 0x000A //TX_FRAME_SZ
10 0x0000 //TX_DELAY_OPT
@@ -45425,7 +58775,7 @@
24 0x0000 //TX_DIST2REF_04
25 0x0000 //TX_DIST2REF_05
26 0x0000 //TX_MMIC
-27 0x0A13 //TX_PGA_0
+27 0x0915 //TX_PGA_0
28 0x0800 //TX_PGA_1
29 0x0800 //TX_PGA_2
30 0x0000 //TX_PGA_3
@@ -45526,11 +58876,11 @@
125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
127 0x0010 //TX_MIC_BLOCK_N
-128 0x7D83 //TX_A_HP
+128 0x7EFF //TX_A_HP
129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
133 0x0008 //TX_PITCH_BFR_LEN
134 0x0003 //TX_SBD_PITCH_DET
135 0x0050 //TX_TD_AEC_L
@@ -45630,8 +58980,8 @@
229 0x7FFF //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x0019 //TX_EPD_OFFSET_00
-233 0x0019 //TX_EPD_OFFST_01
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
235 0x3A98 //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
@@ -45679,7 +59029,7 @@
278 0x0200 //TX_MAINREFRTO_TH_EQ
279 0x1000 //TX_B_POST_FLT_0
280 0x1000 //TX_B_POST_FLT_1
-281 0x000F //TX_NS_LVL_CTRL_0
+281 0x000B //TX_NS_LVL_CTRL_0
282 0x0011 //TX_NS_LVL_CTRL_1
283 0x000F //TX_NS_LVL_CTRL_2
284 0x000F //TX_NS_LVL_CTRL_3
@@ -45712,7 +59062,7 @@
311 0x000A //TX_MUSIC_MORENS
312 0x7FFF //TX_A_POST_FILT_0
313 0x2000 //TX_A_POST_FILT_1
-314 0x4000 //TX_A_POST_FILT_S_0
+314 0x2000 //TX_A_POST_FILT_S_0
315 0x5000 //TX_A_POST_FILT_S_1
316 0x5000 //TX_A_POST_FILT_S_2
317 0x5000 //TX_A_POST_FILT_S_3
@@ -45736,7 +59086,7 @@
335 0x7FFF //TX_B_LESSCUT_RTO_S_5
336 0x7FFF //TX_B_LESSCUT_RTO_S_6
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
+338 0x7900 //TX_LAMBDA_PFILT
339 0x7B00 //TX_LAMBDA_PFILT_S_0
340 0x7B00 //TX_LAMBDA_PFILT_S_1
341 0x7B00 //TX_LAMBDA_PFILT_S_2
@@ -45745,7 +59095,7 @@
344 0x7B00 //TX_LAMBDA_PFILT_S_5
345 0x7B00 //TX_LAMBDA_PFILT_S_6
346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
+347 0x0000 //TX_K_PEPPER
348 0x0800 //TX_A_PEPPER
349 0x1EAA //TX_K_PEPPER_HF
350 0x0800 //TX_A_PEPPER_HF
@@ -45763,7 +59113,7 @@
362 0x0005 //TX_BF_DVG_TH
363 0x001E //TX_SN_C_F
364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
+365 0x0000 //TX_NOISEDET
366 0x0190 //TX_NDETCT
367 0x0050 //TX_NOISE_TH_0
368 0x7FFF //TX_NOISE_TH_0_2
@@ -45806,11 +59156,11 @@
405 0x00C8 //TX_NS_ENOISE_MIC0_TH
406 0x0014 //TX_MINENOISE_MIC0_TH
407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x7FFF //TX_MIN_G_CTRL_SSNS
-409 0x0000 //TX_METAL_RTO_THR
-410 0x0000 //TX_NS_FP_K_METAL
-411 0x7FFF //TX_NOISEDET_BOOST_TH
-412 0x0000 //TX_NSMOOTH_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
413 0x0000 //TX_NS_RESRV_8
414 0x1800 //TX_RHO_UPB
415 0x0BB8 //TX_N_HOLD_HS
@@ -45895,8 +59245,8 @@
494 0x0000 //TX_DFLT_SRC_LOC_2
495 0x038E //TX_DOA_TRACK_VADTH
496 0x0000 //TX_DOA_TRACK_NEW
-497 0x0230 //TX_NOR_OFF_THR
-498 0x0CCD //TX_MORE_ON_700HZ_THR
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
499 0x2000 //TX_MU_BF_ADPT_NS
500 0x0000 //TX_ADAPT_LEN
501 0x6666 //TX_MORE_SNS
@@ -45964,17 +59314,17 @@
563 0x0000 //TX_BVE_OUT_N
564 0x0000 //TX_BVE_MICALPHA_DOWN
565 0x0000 //TX_PB_RESRV_1
-566 0x001C //TX_FDEQ_SUBNUM
+566 0x0020 //TX_FDEQ_SUBNUM
567 0x4848 //TX_FDEQ_GAIN_0
568 0x4848 //TX_FDEQ_GAIN_1
569 0x4848 //TX_FDEQ_GAIN_2
570 0x4848 //TX_FDEQ_GAIN_3
571 0x4848 //TX_FDEQ_GAIN_4
572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4242 //TX_FDEQ_GAIN_6
-574 0x423C //TX_FDEQ_GAIN_7
-575 0x3C3C //TX_FDEQ_GAIN_8
-576 0x3434 //TX_FDEQ_GAIN_9
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
577 0x4848 //TX_FDEQ_GAIN_10
578 0x4848 //TX_FDEQ_GAIN_11
579 0x4848 //TX_FDEQ_GAIN_12
@@ -45999,12 +59349,12 @@
598 0x090A //TX_FDEQ_BIN_7
599 0x0B0C //TX_FDEQ_BIN_8
600 0x0D0E //TX_FDEQ_BIN_9
-601 0x0E0F //TX_FDEQ_BIN_10
-602 0x0F10 //TX_FDEQ_BIN_11
-603 0x1011 //TX_FDEQ_BIN_12
-604 0x1104 //TX_FDEQ_BIN_13
-605 0x0000 //TX_FDEQ_BIN_14
-606 0x0000 //TX_FDEQ_BIN_15
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
607 0x0000 //TX_FDEQ_BIN_16
608 0x0000 //TX_FDEQ_BIN_17
609 0x0000 //TX_FDEQ_BIN_18
@@ -46023,9 +59373,9 @@
622 0x4848 //TX_PREEQ_GAIN_MIC0_5
623 0x4848 //TX_PREEQ_GAIN_MIC0_6
624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
628 0x4848 //TX_PREEQ_GAIN_MIC0_11
629 0x4848 //TX_PREEQ_GAIN_MIC0_12
630 0x4848 //TX_PREEQ_GAIN_MIC0_13
@@ -46039,21 +59389,21 @@
638 0x4848 //TX_PREEQ_GAIN_MIC0_21
639 0x4848 //TX_PREEQ_GAIN_MIC0_22
640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0608 //TX_PREEQ_BIN_MIC0_0
-642 0x0808 //TX_PREEQ_BIN_MIC0_1
-643 0x0808 //TX_PREEQ_BIN_MIC0_2
-644 0x0808 //TX_PREEQ_BIN_MIC0_3
-645 0x0808 //TX_PREEQ_BIN_MIC0_4
-646 0x0808 //TX_PREEQ_BIN_MIC0_5
-647 0x0808 //TX_PREEQ_BIN_MIC0_6
-648 0x0808 //TX_PREEQ_BIN_MIC0_7
-649 0x0808 //TX_PREEQ_BIN_MIC0_8
-650 0x0808 //TX_PREEQ_BIN_MIC0_9
-651 0x0808 //TX_PREEQ_BIN_MIC0_10
-652 0x0808 //TX_PREEQ_BIN_MIC0_11
-653 0x0808 //TX_PREEQ_BIN_MIC0_12
-654 0x0808 //TX_PREEQ_BIN_MIC0_13
-655 0x0808 //TX_PREEQ_BIN_MIC0_14
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
656 0x0200 //TX_PREEQ_BIN_MIC0_15
657 0x0000 //TX_PREEQ_BIN_MIC0_16
658 0x0000 //TX_PREEQ_BIN_MIC0_17
@@ -46088,21 +59438,21 @@
687 0x4848 //TX_PREEQ_GAIN_MIC1_21
688 0x4848 //TX_PREEQ_GAIN_MIC1_22
689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0608 //TX_PREEQ_BIN_MIC1_0
-691 0x0808 //TX_PREEQ_BIN_MIC1_1
-692 0x0808 //TX_PREEQ_BIN_MIC1_2
-693 0x0808 //TX_PREEQ_BIN_MIC1_3
-694 0x0808 //TX_PREEQ_BIN_MIC1_4
-695 0x0808 //TX_PREEQ_BIN_MIC1_5
-696 0x0808 //TX_PREEQ_BIN_MIC1_6
-697 0x0808 //TX_PREEQ_BIN_MIC1_7
-698 0x0808 //TX_PREEQ_BIN_MIC1_8
-699 0x0808 //TX_PREEQ_BIN_MIC1_9
-700 0x0808 //TX_PREEQ_BIN_MIC1_10
-701 0x0808 //TX_PREEQ_BIN_MIC1_11
-702 0x0808 //TX_PREEQ_BIN_MIC1_12
-703 0x0808 //TX_PREEQ_BIN_MIC1_13
-704 0x0808 //TX_PREEQ_BIN_MIC1_14
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
705 0x0200 //TX_PREEQ_BIN_MIC1_15
706 0x0000 //TX_PREEQ_BIN_MIC1_16
707 0x0000 //TX_PREEQ_BIN_MIC1_17
@@ -46137,21 +59487,21 @@
736 0x4848 //TX_PREEQ_GAIN_MIC2_21
737 0x4848 //TX_PREEQ_GAIN_MIC2_22
738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0608 //TX_PREEQ_BIN_MIC2_0
-740 0x0808 //TX_PREEQ_BIN_MIC2_1
-741 0x0808 //TX_PREEQ_BIN_MIC2_2
-742 0x0808 //TX_PREEQ_BIN_MIC2_3
-743 0x0808 //TX_PREEQ_BIN_MIC2_4
-744 0x0808 //TX_PREEQ_BIN_MIC2_5
-745 0x0808 //TX_PREEQ_BIN_MIC2_6
-746 0x0808 //TX_PREEQ_BIN_MIC2_7
-747 0x0808 //TX_PREEQ_BIN_MIC2_8
-748 0x0808 //TX_PREEQ_BIN_MIC2_9
-749 0x0808 //TX_PREEQ_BIN_MIC2_10
-750 0x0808 //TX_PREEQ_BIN_MIC2_11
-751 0x0808 //TX_PREEQ_BIN_MIC2_12
-752 0x0808 //TX_PREEQ_BIN_MIC2_13
-753 0x0808 //TX_PREEQ_BIN_MIC2_14
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
754 0x0200 //TX_PREEQ_BIN_MIC2_15
755 0x0000 //TX_PREEQ_BIN_MIC2_16
756 0x0000 //TX_PREEQ_BIN_MIC2_17
@@ -46181,15 +59531,15 @@
780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
781 0x7F5B //TX_BVE_FEVADLI_ALPHA
782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x1000 //TX_TDDRC_ALPHA_UP_01
-784 0x1000 //TX_TDDRC_ALPHA_UP_02
-785 0x1000 //TX_TDDRC_ALPHA_UP_03
-786 0x1000 //TX_TDDRC_ALPHA_UP_04
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
793 0x0000 //TX_TDDRC_RESRV_0
794 0x0000 //TX_TDDRC_RESRV_1
@@ -46231,7 +59581,7 @@
830 0x2000 //TX_TPKA_FP
831 0x0080 //TX_MIN_G_FP
832 0x2000 //TX_MAX_G_FP
-833 0x0000 //TX_FFP_FP_K_METAL
+833 0x4848 //TX_FFP_FP_K_METAL
834 0x4000 //TX_A_POST_FLT_FP
835 0x0F5C //TX_RTO_OUTBEAM_TH
836 0x4CCD //TX_TPKA_FP_THD
@@ -46258,14 +59608,14 @@
857 0x2000 //TX_TDDRC_THRD_3
858 0x3000 //TX_TDDRC_SLANT_0
859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x1000 //TX_TDDRC_ALPHA_UP_00
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
862 0x0000 //TX_TDDRC_HMNC_FLAG
863 0x199A //TX_TDDRC_HMNC_GAIN
864 0x0000 //TX_TDDRC_SMT_FLAG
865 0x0CCD //TX_TDDRC_SMT_W
-866 0x07F2 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
868 0x0000 //TX_TDDRC_LMT_ALPHA
869 0x0000 //TX_TFMASKLTH
870 0x0000 //TX_TFMASKLTHL
@@ -46286,10 +59636,10 @@
885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x00C8 //TX_FASTNS_ARSPC_TH
+888 0x0028 //TX_FASTNS_ARSPC_TH
889 0xC000 //TX_FASTNS_MASK5_TH
890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
892 0x1770 //TX_FASTNS_NOISETH
893 0xC000 //TX_FASTNS_SSA_THLFL
894 0xC000 //TX_FASTNS_SSA_THHFL
@@ -46361,10 +59711,10 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x0064 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0000 //RX_SAMPLINGFREQ_SIG
-3 0x0000 //RX_SAMPLINGFREQ_PROC
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
6 0x3000 //RX_TDDRC_ALPHA_UP_1
@@ -46374,17 +59724,17 @@
10 0x0800 //RX_PGA
11 0x7FFF //RX_A_HP
12 0x0000 //RX_B_PE
-13 0x3800 //RX_THR_PITCH_DET_0
-14 0x3000 //RX_THR_PITCH_DET_1
-15 0x2800 //RX_THR_PITCH_DET_2
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
16 0x0008 //RX_PITCH_BFR_LEN
17 0x0003 //RX_SBD_PITCH_DET
18 0x0100 //RX_PP_RESRV_0
19 0x0020 //RX_PP_RESRV_1
-20 0x0600 //RX_N_SN_EST
+20 0x0400 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
-22 0x0010 //RX_NS_LVL_CTRL
-23 0xF800 //RX_THR_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_FENS_RESRV_0
26 0x0190 //RX_FENS_RESRV_1
@@ -46399,17 +59749,17 @@
35 0x199A //RX_A_POST_FLT
36 0x0000 //RX_LMT_THRD
37 0x4000 //RX_LMT_ALPHA
-38 0x0014 //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -46434,12 +59784,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -46478,14 +59828,14 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
+124 0x0155 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
126 0x2000 //RX_TPKA_FP
127 0x2000 //RX_MIN_G_FP
@@ -46534,25 +59884,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -46577,12 +59927,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -46633,25 +59983,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -46676,12 +60026,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -46732,25 +60082,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -46775,12 +60125,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -46831,25 +60181,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -46874,12 +60224,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -46930,25 +60280,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -46973,12 +60323,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -47029,25 +60379,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -47072,12 +60422,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -47128,25 +60478,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -47171,12 +60521,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -47212,10 +60562,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x206C //RX_RECVFUNC_MODE_0
+157 0x0064 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0000 //RX_SAMPLINGFREQ_SIG
-160 0x0000 //RX_SAMPLINGFREQ_PROC
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
161 0x000A //RX_FRAME_SZ
162 0x0000 //RX_DELAY_OPT
163 0x3000 //RX_TDDRC_ALPHA_UP_1
@@ -47225,17 +60575,17 @@
167 0x0800 //RX_PGA
168 0x7FFF //RX_A_HP
169 0x0000 //RX_B_PE
-170 0x3800 //RX_THR_PITCH_DET_0
-171 0x3000 //RX_THR_PITCH_DET_1
-172 0x2800 //RX_THR_PITCH_DET_2
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
173 0x0008 //RX_PITCH_BFR_LEN
174 0x0003 //RX_SBD_PITCH_DET
175 0x0100 //RX_PP_RESRV_0
176 0x0020 //RX_PP_RESRV_1
-177 0x0600 //RX_N_SN_EST
+177 0x0400 //RX_N_SN_EST
178 0x000C //RX_N2_SN_EST
-179 0x0010 //RX_NS_LVL_CTRL
-180 0xF800 //RX_THR_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
181 0x7CCD //RX_LAMBDA_PFILT
182 0x000A //RX_FENS_RESRV_0
183 0x0190 //RX_FENS_RESRV_1
@@ -47250,17 +60600,17 @@
192 0x199A //RX_A_POST_FLT
193 0x0000 //RX_LMT_THRD
194 0x4000 //RX_LMT_ALPHA
-195 0x0014 //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47285,12 +60635,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47329,14 +60679,14 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
+281 0x0155 //RX_TDDRC_DRC_GAIN
282 0x7C00 //RX_LAMBDA_PKA_FP
283 0x2000 //RX_TPKA_FP
284 0x2000 //RX_MIN_G_FP
@@ -47385,25 +60735,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47428,12 +60778,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47484,25 +60834,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47527,12 +60877,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47583,25 +60933,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47626,12 +60976,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47682,25 +61032,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47725,12 +61075,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47781,25 +61131,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47824,12 +61174,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47880,25 +61230,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47923,12 +61273,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47979,25 +61329,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -48022,12 +61372,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -48063,19 +61413,19 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB
-#PARAM_MODE Full
+#CASE_NAME BLUETOOTH-BTNB_NREC-RESERVE2-SWB
+#PARAM_MODE Simple
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
-0 0x0008 //TX_OPERATION_MODE_0
-1 0x0008 //TX_OPERATION_MODE_1
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
2 0x0033 //TX_PATCH_REG
-3 0x2A68 //TX_SENDFUNC_MODE_0
+3 0x2A28 //TX_SENDFUNC_MODE_0
4 0x0001 //TX_SENDFUNC_MODE_1
5 0x0001 //TX_NUM_MIC
-6 0x0001 //TX_SAMPLINGFREQ_SIG
-7 0x0001 //TX_SAMPLINGFREQ_PROC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
8 0x000A //TX_FRAME_SZ_SIG
9 0x000A //TX_FRAME_SZ
10 0x0000 //TX_DELAY_OPT
@@ -48196,11 +61546,11 @@
125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
127 0x0010 //TX_MIC_BLOCK_N
-128 0x7D83 //TX_A_HP
+128 0x7EFF //TX_A_HP
129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
133 0x0008 //TX_PITCH_BFR_LEN
134 0x0003 //TX_SBD_PITCH_DET
135 0x0050 //TX_TD_AEC_L
@@ -48300,8 +61650,8 @@
229 0x7FFF //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x0019 //TX_EPD_OFFSET_00
-233 0x0019 //TX_EPD_OFFST_01
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
235 0x3A98 //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
@@ -48349,7 +61699,7 @@
278 0x0200 //TX_MAINREFRTO_TH_EQ
279 0x1000 //TX_B_POST_FLT_0
280 0x1000 //TX_B_POST_FLT_1
-281 0x000F //TX_NS_LVL_CTRL_0
+281 0x000B //TX_NS_LVL_CTRL_0
282 0x0011 //TX_NS_LVL_CTRL_1
283 0x000F //TX_NS_LVL_CTRL_2
284 0x000F //TX_NS_LVL_CTRL_3
@@ -48382,7 +61732,7 @@
311 0x000A //TX_MUSIC_MORENS
312 0x7FFF //TX_A_POST_FILT_0
313 0x2000 //TX_A_POST_FILT_1
-314 0x4000 //TX_A_POST_FILT_S_0
+314 0x2000 //TX_A_POST_FILT_S_0
315 0x5000 //TX_A_POST_FILT_S_1
316 0x5000 //TX_A_POST_FILT_S_2
317 0x5000 //TX_A_POST_FILT_S_3
@@ -48406,7 +61756,7 @@
335 0x7FFF //TX_B_LESSCUT_RTO_S_5
336 0x7FFF //TX_B_LESSCUT_RTO_S_6
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
+338 0x7900 //TX_LAMBDA_PFILT
339 0x7B00 //TX_LAMBDA_PFILT_S_0
340 0x7B00 //TX_LAMBDA_PFILT_S_1
341 0x7B00 //TX_LAMBDA_PFILT_S_2
@@ -48415,7 +61765,7 @@
344 0x7B00 //TX_LAMBDA_PFILT_S_5
345 0x7B00 //TX_LAMBDA_PFILT_S_6
346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
+347 0x0000 //TX_K_PEPPER
348 0x0800 //TX_A_PEPPER
349 0x1EAA //TX_K_PEPPER_HF
350 0x0800 //TX_A_PEPPER_HF
@@ -48476,11 +61826,11 @@
405 0x00C8 //TX_NS_ENOISE_MIC0_TH
406 0x0014 //TX_MINENOISE_MIC0_TH
407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x7FFF //TX_MIN_G_CTRL_SSNS
-409 0x0000 //TX_METAL_RTO_THR
-410 0x0000 //TX_NS_FP_K_METAL
-411 0x7FFF //TX_NOISEDET_BOOST_TH
-412 0x0000 //TX_NSMOOTH_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
413 0x0000 //TX_NS_RESRV_8
414 0x1800 //TX_RHO_UPB
415 0x0BB8 //TX_N_HOLD_HS
@@ -48565,8 +61915,8 @@
494 0x0000 //TX_DFLT_SRC_LOC_2
495 0x038E //TX_DOA_TRACK_VADTH
496 0x0000 //TX_DOA_TRACK_NEW
-497 0x0230 //TX_NOR_OFF_THR
-498 0x0CCD //TX_MORE_ON_700HZ_THR
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
499 0x2000 //TX_MU_BF_ADPT_NS
500 0x0000 //TX_ADAPT_LEN
501 0x6666 //TX_MORE_SNS
@@ -48634,7 +61984,7 @@
563 0x0000 //TX_BVE_OUT_N
564 0x0000 //TX_BVE_MICALPHA_DOWN
565 0x0000 //TX_PB_RESRV_1
-566 0x001C //TX_FDEQ_SUBNUM
+566 0x0020 //TX_FDEQ_SUBNUM
567 0x4848 //TX_FDEQ_GAIN_0
568 0x4848 //TX_FDEQ_GAIN_1
569 0x4848 //TX_FDEQ_GAIN_2
@@ -48642,13 +61992,13 @@
571 0x4848 //TX_FDEQ_GAIN_4
572 0x4848 //TX_FDEQ_GAIN_5
573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4444 //TX_FDEQ_GAIN_7
-575 0x4444 //TX_FDEQ_GAIN_8
-576 0x3C3C //TX_FDEQ_GAIN_9
-577 0x3C3C //TX_FDEQ_GAIN_10
-578 0x3C3C //TX_FDEQ_GAIN_11
-579 0x3C30 //TX_FDEQ_GAIN_12
-580 0x3030 //TX_FDEQ_GAIN_13
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
581 0x4848 //TX_FDEQ_GAIN_14
582 0x4848 //TX_FDEQ_GAIN_15
583 0x4848 //TX_FDEQ_GAIN_16
@@ -48669,12 +62019,12 @@
598 0x090A //TX_FDEQ_BIN_7
599 0x0B0C //TX_FDEQ_BIN_8
600 0x0D0E //TX_FDEQ_BIN_9
-601 0x0E0F //TX_FDEQ_BIN_10
-602 0x0F10 //TX_FDEQ_BIN_11
-603 0x1011 //TX_FDEQ_BIN_12
-604 0x1112 //TX_FDEQ_BIN_13
-605 0x0000 //TX_FDEQ_BIN_14
-606 0x0000 //TX_FDEQ_BIN_15
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
607 0x0000 //TX_FDEQ_BIN_16
608 0x0000 //TX_FDEQ_BIN_17
609 0x0000 //TX_FDEQ_BIN_18
@@ -48693,9 +62043,9 @@
622 0x4848 //TX_PREEQ_GAIN_MIC0_5
623 0x4848 //TX_PREEQ_GAIN_MIC0_6
624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
628 0x4848 //TX_PREEQ_GAIN_MIC0_11
629 0x4848 //TX_PREEQ_GAIN_MIC0_12
630 0x4848 //TX_PREEQ_GAIN_MIC0_13
@@ -48709,21 +62059,21 @@
638 0x4848 //TX_PREEQ_GAIN_MIC0_21
639 0x4848 //TX_PREEQ_GAIN_MIC0_22
640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0608 //TX_PREEQ_BIN_MIC0_0
-642 0x0808 //TX_PREEQ_BIN_MIC0_1
-643 0x0808 //TX_PREEQ_BIN_MIC0_2
-644 0x0808 //TX_PREEQ_BIN_MIC0_3
-645 0x0808 //TX_PREEQ_BIN_MIC0_4
-646 0x0808 //TX_PREEQ_BIN_MIC0_5
-647 0x0808 //TX_PREEQ_BIN_MIC0_6
-648 0x0808 //TX_PREEQ_BIN_MIC0_7
-649 0x0808 //TX_PREEQ_BIN_MIC0_8
-650 0x0808 //TX_PREEQ_BIN_MIC0_9
-651 0x0808 //TX_PREEQ_BIN_MIC0_10
-652 0x0808 //TX_PREEQ_BIN_MIC0_11
-653 0x0808 //TX_PREEQ_BIN_MIC0_12
-654 0x0808 //TX_PREEQ_BIN_MIC0_13
-655 0x0808 //TX_PREEQ_BIN_MIC0_14
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
656 0x0200 //TX_PREEQ_BIN_MIC0_15
657 0x0000 //TX_PREEQ_BIN_MIC0_16
658 0x0000 //TX_PREEQ_BIN_MIC0_17
@@ -48758,21 +62108,21 @@
687 0x4848 //TX_PREEQ_GAIN_MIC1_21
688 0x4848 //TX_PREEQ_GAIN_MIC1_22
689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0608 //TX_PREEQ_BIN_MIC1_0
-691 0x0808 //TX_PREEQ_BIN_MIC1_1
-692 0x0808 //TX_PREEQ_BIN_MIC1_2
-693 0x0808 //TX_PREEQ_BIN_MIC1_3
-694 0x0808 //TX_PREEQ_BIN_MIC1_4
-695 0x0808 //TX_PREEQ_BIN_MIC1_5
-696 0x0808 //TX_PREEQ_BIN_MIC1_6
-697 0x0808 //TX_PREEQ_BIN_MIC1_7
-698 0x0808 //TX_PREEQ_BIN_MIC1_8
-699 0x0808 //TX_PREEQ_BIN_MIC1_9
-700 0x0808 //TX_PREEQ_BIN_MIC1_10
-701 0x0808 //TX_PREEQ_BIN_MIC1_11
-702 0x0808 //TX_PREEQ_BIN_MIC1_12
-703 0x0808 //TX_PREEQ_BIN_MIC1_13
-704 0x0808 //TX_PREEQ_BIN_MIC1_14
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
705 0x0200 //TX_PREEQ_BIN_MIC1_15
706 0x0000 //TX_PREEQ_BIN_MIC1_16
707 0x0000 //TX_PREEQ_BIN_MIC1_17
@@ -48807,21 +62157,21 @@
736 0x4848 //TX_PREEQ_GAIN_MIC2_21
737 0x4848 //TX_PREEQ_GAIN_MIC2_22
738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0608 //TX_PREEQ_BIN_MIC2_0
-740 0x0808 //TX_PREEQ_BIN_MIC2_1
-741 0x0808 //TX_PREEQ_BIN_MIC2_2
-742 0x0808 //TX_PREEQ_BIN_MIC2_3
-743 0x0808 //TX_PREEQ_BIN_MIC2_4
-744 0x0808 //TX_PREEQ_BIN_MIC2_5
-745 0x0808 //TX_PREEQ_BIN_MIC2_6
-746 0x0808 //TX_PREEQ_BIN_MIC2_7
-747 0x0808 //TX_PREEQ_BIN_MIC2_8
-748 0x0808 //TX_PREEQ_BIN_MIC2_9
-749 0x0808 //TX_PREEQ_BIN_MIC2_10
-750 0x0808 //TX_PREEQ_BIN_MIC2_11
-751 0x0808 //TX_PREEQ_BIN_MIC2_12
-752 0x0808 //TX_PREEQ_BIN_MIC2_13
-753 0x0808 //TX_PREEQ_BIN_MIC2_14
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
754 0x0200 //TX_PREEQ_BIN_MIC2_15
755 0x0000 //TX_PREEQ_BIN_MIC2_16
756 0x0000 //TX_PREEQ_BIN_MIC2_17
@@ -48851,15 +62201,15 @@
780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
781 0x7F5B //TX_BVE_FEVADLI_ALPHA
782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x1000 //TX_TDDRC_ALPHA_UP_01
-784 0x1000 //TX_TDDRC_ALPHA_UP_02
-785 0x1000 //TX_TDDRC_ALPHA_UP_03
-786 0x1000 //TX_TDDRC_ALPHA_UP_04
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
793 0x0000 //TX_TDDRC_RESRV_0
794 0x0000 //TX_TDDRC_RESRV_1
@@ -48901,7 +62251,7 @@
830 0x2000 //TX_TPKA_FP
831 0x0080 //TX_MIN_G_FP
832 0x2000 //TX_MAX_G_FP
-833 0x0000 //TX_FFP_FP_K_METAL
+833 0x4848 //TX_FFP_FP_K_METAL
834 0x4000 //TX_A_POST_FLT_FP
835 0x0F5C //TX_RTO_OUTBEAM_TH
836 0x4CCD //TX_TPKA_FP_THD
@@ -48928,14 +62278,14 @@
857 0x2000 //TX_TDDRC_THRD_3
858 0x3000 //TX_TDDRC_SLANT_0
859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x1000 //TX_TDDRC_ALPHA_UP_00
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
862 0x0000 //TX_TDDRC_HMNC_FLAG
863 0x199A //TX_TDDRC_HMNC_GAIN
864 0x0000 //TX_TDDRC_SMT_FLAG
865 0x0CCD //TX_TDDRC_SMT_W
-866 0x07F2 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
868 0x0000 //TX_TDDRC_LMT_ALPHA
869 0x0000 //TX_TFMASKLTH
870 0x0000 //TX_TFMASKLTHL
@@ -48956,10 +62306,10 @@
885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x00C8 //TX_FASTNS_ARSPC_TH
+888 0x0028 //TX_FASTNS_ARSPC_TH
889 0xC000 //TX_FASTNS_MASK5_TH
890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
892 0x1770 //TX_FASTNS_NOISETH
893 0xC000 //TX_FASTNS_SSA_THLFL
894 0xC000 //TX_FASTNS_SSA_THHFL
@@ -49031,30 +62381,30 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x0064 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0001 //RX_SAMPLINGFREQ_SIG
-3 0x0001 //RX_SAMPLINGFREQ_PROC
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
10 0x0800 //RX_PGA
11 0x7FFF //RX_A_HP
-12 0x4000 //RX_B_PE
-13 0x3800 //RX_THR_PITCH_DET_0
-14 0x3000 //RX_THR_PITCH_DET_1
-15 0x2800 //RX_THR_PITCH_DET_2
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
16 0x0008 //RX_PITCH_BFR_LEN
17 0x0003 //RX_SBD_PITCH_DET
18 0x0100 //RX_PP_RESRV_0
19 0x0020 //RX_PP_RESRV_1
-20 0x0600 //RX_N_SN_EST
+20 0x0400 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
-22 0x0010 //RX_NS_LVL_CTRL
-23 0xF800 //RX_THR_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_FENS_RESRV_0
26 0x0190 //RX_FENS_RESRV_1
@@ -49069,7 +62419,7 @@
35 0x199A //RX_A_POST_FLT
36 0x0000 //RX_LMT_THRD
37 0x4000 //RX_LMT_ALPHA
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49079,11 +62429,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49104,12 +62454,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49147,9 +62497,9 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -49189,10 +62539,10 @@
155 0x0000 //RX_BWE_RESRV_1
156 0x0000 //RX_BWE_RESRV_2
#VOL 0
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49203,16 +62553,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49222,11 +62572,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49247,12 +62597,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49288,10 +62638,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49302,16 +62652,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49321,11 +62671,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49346,12 +62696,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49387,10 +62737,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49401,16 +62751,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49420,11 +62770,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49445,12 +62795,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49486,10 +62836,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49500,16 +62850,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49519,11 +62869,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49544,12 +62894,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49585,10 +62935,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49599,16 +62949,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49618,11 +62968,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49643,12 +62993,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49684,10 +63034,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 5
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49698,16 +63048,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49717,11 +63067,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49742,12 +63092,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49783,10 +63133,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 6
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49797,16 +63147,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49816,11 +63166,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49841,12 +63191,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49882,30 +63232,30 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x206C //RX_RECVFUNC_MODE_0
+157 0x0064 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0001 //RX_SAMPLINGFREQ_SIG
-160 0x0001 //RX_SAMPLINGFREQ_PROC
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
161 0x000A //RX_FRAME_SZ
162 0x0000 //RX_DELAY_OPT
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
167 0x0800 //RX_PGA
168 0x7FFF //RX_A_HP
-169 0x4000 //RX_B_PE
-170 0x3800 //RX_THR_PITCH_DET_0
-171 0x3000 //RX_THR_PITCH_DET_1
-172 0x2800 //RX_THR_PITCH_DET_2
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
173 0x0008 //RX_PITCH_BFR_LEN
174 0x0003 //RX_SBD_PITCH_DET
175 0x0100 //RX_PP_RESRV_0
176 0x0020 //RX_PP_RESRV_1
-177 0x0600 //RX_N_SN_EST
+177 0x0400 //RX_N_SN_EST
178 0x000C //RX_N2_SN_EST
-179 0x0010 //RX_NS_LVL_CTRL
-180 0xF800 //RX_THR_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
181 0x7CCD //RX_LAMBDA_PFILT
182 0x000A //RX_FENS_RESRV_0
183 0x0190 //RX_FENS_RESRV_1
@@ -49920,7 +63270,7 @@
192 0x199A //RX_A_POST_FLT
193 0x0000 //RX_LMT_THRD
194 0x4000 //RX_LMT_ALPHA
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -49930,11 +63280,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -49955,12 +63305,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -49998,9 +63348,9 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -50040,10 +63390,10 @@
312 0x0000 //RX_BWE_RESRV_1
313 0x0000 //RX_BWE_RESRV_2
#VOL 0
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50054,16 +63404,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50073,11 +63423,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50098,12 +63448,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50139,10 +63489,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50153,16 +63503,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50172,11 +63522,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50197,12 +63547,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50238,10 +63588,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50252,16 +63602,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50271,11 +63621,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50296,12 +63646,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50337,10 +63687,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50351,16 +63701,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50370,11 +63720,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50395,12 +63745,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50436,10 +63786,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50450,16 +63800,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50469,11 +63819,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50494,12 +63844,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50535,10 +63885,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50549,16 +63899,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50568,11 +63918,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50593,12 +63943,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50634,10 +63984,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50648,16 +63998,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50667,11 +64017,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50692,12 +64042,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50733,15 +64083,15 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB
-#PARAM_MODE Full
+#CASE_NAME BLUETOOTH-BTWB-RESERVE2-SWB
+#PARAM_MODE Simple
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
2 0x0033 //TX_PATCH_REG
-3 0x2A28 //TX_SENDFUNC_MODE_0
+3 0x0200 //TX_SENDFUNC_MODE_0
4 0x0001 //TX_SENDFUNC_MODE_1
5 0x0001 //TX_NUM_MIC
6 0x0003 //TX_SAMPLINGFREQ_SIG
@@ -51103,7 +64453,7 @@
362 0x0005 //TX_BF_DVG_TH
363 0x001E //TX_SN_C_F
364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
+365 0x0000 //TX_NOISEDET
366 0x0190 //TX_NDETCT
367 0x0050 //TX_NOISE_TH_0
368 0x7FFF //TX_NOISE_TH_0_2
@@ -51701,7 +65051,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x2064 //RX_RECVFUNC_MODE_0
+0 0x0064 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0003 //RX_SAMPLINGFREQ_SIG
3 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -52552,7 +65902,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x2064 //RX_RECVFUNC_MODE_0
+157 0x0064 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0003 //RX_SAMPLINGFREQ_SIG
160 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -53403,19 +66753,19 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB
-#PARAM_MODE Full
+#CASE_NAME BLUETOOTH-BTWB_NREC-RESERVE2-SWB
+#PARAM_MODE Simple
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
-0 0x0009 //TX_OPERATION_MODE_0
-1 0x0009 //TX_OPERATION_MODE_1
-2 0x0020 //TX_PATCH_REG
-3 0x286A //TX_SENDFUNC_MODE_0
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
4 0x0001 //TX_SENDFUNC_MODE_1
5 0x0001 //TX_NUM_MIC
-6 0x0004 //TX_SAMPLINGFREQ_SIG
-7 0x0004 //TX_SAMPLINGFREQ_PROC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
8 0x000A //TX_FRAME_SZ_SIG
9 0x000A //TX_FRAME_SZ
10 0x0000 //TX_DELAY_OPT
@@ -53437,7 +66787,7 @@
26 0x0000 //TX_MMIC
27 0x0915 //TX_PGA_0
28 0x0800 //TX_PGA_1
-29 0x0000 //TX_PGA_2
+29 0x0800 //TX_PGA_2
30 0x0000 //TX_PGA_3
31 0x0000 //TX_PGA_4
32 0x0000 //TX_PGA_5
@@ -53536,11 +66886,11 @@
125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
127 0x0010 //TX_MIC_BLOCK_N
-128 0x7E56 //TX_A_HP
+128 0x7EFF //TX_A_HP
129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
133 0x0008 //TX_PITCH_BFR_LEN
134 0x0003 //TX_SBD_PITCH_DET
135 0x0050 //TX_TD_AEC_L
@@ -53555,28 +66905,28 @@
144 0x0000 //TX_PP_RESRV_6
145 0x0000 //TX_PP_RESRV_7
146 0x001E //TX_TAIL_LENGTH
-147 0x0200 //TX_AEC_REF_GAIN_0
+147 0x0080 //TX_AEC_REF_GAIN_0
148 0x0800 //TX_AEC_REF_GAIN_1
149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x6000 //TX_EAD_THR
-151 0x0400 //TX_THR_RE_EST
-152 0x3000 //TX_MIN_EQ_RE_EST_0
-153 0x3000 //TX_MIN_EQ_RE_EST_1
-154 0x4000 //TX_MIN_EQ_RE_EST_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
155 0x0800 //TX_MIN_EQ_RE_EST_3
156 0x0800 //TX_MIN_EQ_RE_EST_4
157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x6000 //TX_MIN_EQ_RE_EST_6
-159 0x6000 //TX_MIN_EQ_RE_EST_7
-160 0x6000 //TX_MIN_EQ_RE_EST_8
-161 0x6000 //TX_MIN_EQ_RE_EST_9
-162 0x4000 //TX_MIN_EQ_RE_EST_10
-163 0x4000 //TX_MIN_EQ_RE_EST_11
-164 0x4000 //TX_MIN_EQ_RE_EST_12
-165 0x3000 //TX_LAMBDA_RE_EST
-166 0x4000 //TX_LAMBDA_CB_NLE
-167 0x3000 //TX_C_POST_FLT
-168 0x4500 //TX_GAIN_NP
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
169 0x00C8 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
171 0x03E8 //TX_DT2_HOLD_N
@@ -53605,23 +66955,23 @@
194 0x0000 //TX_NORMENERTH
195 0x0000 //TX_NORMENERHIGHTH
196 0x0000 //TX_NORMENERHIGHTHL
-197 0x5000 //TX_DTD_THR1_0
+197 0x7800 //TX_DTD_THR1_0
198 0x7000 //TX_DTD_THR1_1
-199 0x7F00 //TX_DTD_THR1_2
+199 0x7FFF //TX_DTD_THR1_2
200 0x7FFF //TX_DTD_THR1_3
201 0x7FFF //TX_DTD_THR1_4
202 0x7FFF //TX_DTD_THR1_5
203 0x7FFF //TX_DTD_THR1_6
-204 0x0800 //TX_DTD_THR2_0
-205 0x0800 //TX_DTD_THR2_1
-206 0x0800 //TX_DTD_THR2_2
-207 0x0800 //TX_DTD_THR2_3
-208 0x0800 //TX_DTD_THR2_4
-209 0x0100 //TX_DTD_THR2_5
-210 0x0100 //TX_DTD_THR2_6
-211 0x7FFF //TX_DTD_THR3
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
212 0x0000 //TX_SPK_CUT_K
-213 0x03E8 //TX_DT_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
214 0x0CCD //TX_DT_CUT_THR
215 0x04EB //TX_COMFORT_G
216 0x01F4 //TX_POWER_YOUT_TH
@@ -53640,8 +66990,8 @@
229 0x7FFF //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x00C0 //TX_EPD_OFFSET_00
-233 0x00C0 //TX_EPD_OFFST_01
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
235 0x3A98 //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
@@ -53650,29 +67000,29 @@
239 0x0800 //TX_DT_RESRV_7
240 0x0800 //TX_DT_RESRV_8
241 0x0000 //TX_DT_RESRV_9
-242 0xF700 //TX_THR_SN_EST_0
-243 0xFB00 //TX_THR_SN_EST_1
-244 0xFA00 //TX_THR_SN_EST_2
-245 0xF700 //TX_THR_SN_EST_3
-246 0xFA00 //TX_THR_SN_EST_4
-247 0xF600 //TX_THR_SN_EST_5
-248 0xF600 //TX_THR_SN_EST_6
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
249 0xF600 //TX_THR_SN_EST_7
-250 0x0200 //TX_DELTA_THR_SN_EST_0
-251 0x0400 //TX_DELTA_THR_SN_EST_1
-252 0x0300 //TX_DELTA_THR_SN_EST_2
-253 0x0600 //TX_DELTA_THR_SN_EST_3
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
254 0x0200 //TX_DELTA_THR_SN_EST_4
255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0200 //TX_DELTA_THR_SN_EST_6
+256 0x0000 //TX_DELTA_THR_SN_EST_6
257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x4000 //TX_LAMBDA_NN_EST_0
+258 0x6000 //TX_LAMBDA_NN_EST_0
259 0x4000 //TX_LAMBDA_NN_EST_1
260 0x4000 //TX_LAMBDA_NN_EST_2
261 0x4000 //TX_LAMBDA_NN_EST_3
262 0x4000 //TX_LAMBDA_NN_EST_4
263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x4000 //TX_LAMBDA_NN_EST_6
+264 0x6000 //TX_LAMBDA_NN_EST_6
265 0x4000 //TX_LAMBDA_NN_EST_7
266 0x0400 //TX_N_SN_EST
267 0x001E //TX_INBEAM_T
@@ -53687,57 +67037,57 @@
276 0x0800 //TX_MAINREFRTO_TH_H
277 0x0800 //TX_MAINREFRTO_TH_L
278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x2000 //TX_B_POST_FLT_0
-280 0x2000 //TX_B_POST_FLT_1
-281 0x0012 //TX_NS_LVL_CTRL_0
-282 0x0016 //TX_NS_LVL_CTRL_1
-283 0x0016 //TX_NS_LVL_CTRL_2
-284 0x0019 //TX_NS_LVL_CTRL_3
-285 0x0010 //TX_NS_LVL_CTRL_4
-286 0x0010 //TX_NS_LVL_CTRL_5
-287 0x0019 //TX_NS_LVL_CTRL_6
-288 0x0010 //TX_NS_LVL_CTRL_7
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
289 0x000C //TX_MIN_GAIN_S_0
-290 0x000C //TX_MIN_GAIN_S_1
+290 0x000F //TX_MIN_GAIN_S_1
291 0x000C //TX_MIN_GAIN_S_2
-292 0x000F //TX_MIN_GAIN_S_3
+292 0x000C //TX_MIN_GAIN_S_3
293 0x000C //TX_MIN_GAIN_S_4
294 0x000C //TX_MIN_GAIN_S_5
-295 0x0011 //TX_MIN_GAIN_S_6
-296 0x000C //TX_MIN_GAIN_S_7
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
297 0x7FFF //TX_NMOS_SUP
298 0x0000 //TX_NS_MAX_PRI_SNR_TH
299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7000 //TX_SNRI_SUP_0
-301 0x7000 //TX_SNRI_SUP_1
-302 0x7000 //TX_SNRI_SUP_2
-303 0x6000 //TX_SNRI_SUP_3
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
304 0x7FFF //TX_SNRI_SUP_4
305 0x7FFF //TX_SNRI_SUP_5
-306 0x6000 //TX_SNRI_SUP_6
+306 0x7FFF //TX_SNRI_SUP_6
307 0x7FFF //TX_SNRI_SUP_7
308 0x7FFF //TX_THR_LFNS
-309 0x0016 //TX_G_LFNS
+309 0x000E //TX_G_LFNS
310 0x09C4 //TX_GAIN0_NTH
311 0x000A //TX_MUSIC_MORENS
312 0x7FFF //TX_A_POST_FILT_0
313 0x2000 //TX_A_POST_FILT_1
-314 0x6000 //TX_A_POST_FILT_S_0
-315 0x6000 //TX_A_POST_FILT_S_1
-316 0x6000 //TX_A_POST_FILT_S_2
-317 0x6000 //TX_A_POST_FILT_S_3
-318 0x6000 //TX_A_POST_FILT_S_4
-319 0x6000 //TX_A_POST_FILT_S_5
-320 0x6000 //TX_A_POST_FILT_S_6
-321 0x6000 //TX_A_POST_FILT_S_7
-322 0x2000 //TX_B_POST_FILT_0
-323 0x4000 //TX_B_POST_FILT_1
-324 0x2000 //TX_B_POST_FILT_2
-325 0x2000 //TX_B_POST_FILT_3
-326 0x2000 //TX_B_POST_FILT_4
-327 0x2000 //TX_B_POST_FILT_5
-328 0x2000 //TX_B_POST_FILT_6
-329 0x2000 //TX_B_POST_FILT_7
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
330 0x7FFF //TX_B_LESSCUT_RTO_S_0
331 0x7FFF //TX_B_LESSCUT_RTO_S_1
332 0x7FFF //TX_B_LESSCUT_RTO_S_2
@@ -53746,19 +67096,19 @@
335 0x7FFF //TX_B_LESSCUT_RTO_S_5
336 0x7FFF //TX_B_LESSCUT_RTO_S_6
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
-339 0x7CCD //TX_LAMBDA_PFILT_S_0
-340 0x7CCD //TX_LAMBDA_PFILT_S_1
-341 0x7CCD //TX_LAMBDA_PFILT_S_2
-342 0x7CCD //TX_LAMBDA_PFILT_S_3
-343 0x7CCD //TX_LAMBDA_PFILT_S_4
-344 0x7CCD //TX_LAMBDA_PFILT_S_5
-345 0x7CCD //TX_LAMBDA_PFILT_S_6
-346 0x7CCD //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
-348 0x0500 //TX_A_PEPPER
-349 0x1600 //TX_K_PEPPER_HF
-350 0x0400 //TX_A_PEPPER_HF
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
351 0x0001 //TX_HMNC_BST_FLG
352 0x0200 //TX_HMNC_BST_THR
353 0x0800 //TX_DT_BINVAD_TH_0
@@ -53775,19 +67125,19 @@
364 0x0000 //TX_K_APT
365 0x0001 //TX_NOISEDET
366 0x0190 //TX_NDETCT
-367 0x0020 //TX_NOISE_TH_0
+367 0x0050 //TX_NOISE_TH_0
368 0x7FFF //TX_NOISE_TH_0_2
369 0x7FFF //TX_NOISE_TH_0_3
-370 0x02A6 //TX_NOISE_TH_1
-371 0x04B0 //TX_NOISE_TH_2
-372 0x3194 //TX_NOISE_TH_3
-373 0x0960 //TX_NOISE_TH_4
-374 0x5555 //TX_NOISE_TH_5
-375 0x3FF4 //TX_NOISE_TH_5_2
-376 0x0001 //TX_NOISE_TH_5_3
-377 0x0000 //TX_NOISE_TH_5_4
-378 0x02BC //TX_NOISE_TH_6
-379 0x0020 //TX_MINENOISE_TH
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
380 0x4000 //TX_MORENS_TFMASK_TH
381 0xFFEE //TX_DRC_QUIET_FLOOR
382 0x6000 //TX_RATIODTL_CUT_TH
@@ -53814,7 +67164,7 @@
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0020 //TX_MINENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
407 0x012C //TX_MINENOISE_MIC0_S_TH
408 0x2900 //TX_MIN_G_CTRL_SSNS
409 0x0800 //TX_METAL_RTO_THR
@@ -54001,20 +67351,20 @@
590 0x4848 //TX_FDEQ_GAIN_23
591 0x0202 //TX_FDEQ_BIN_0
592 0x0203 //TX_FDEQ_BIN_1
-593 0x0304 //TX_FDEQ_BIN_2
-594 0x0405 //TX_FDEQ_BIN_3
-595 0x0607 //TX_FDEQ_BIN_4
-596 0x0809 //TX_FDEQ_BIN_5
-597 0x0A0B //TX_FDEQ_BIN_6
-598 0x0C0D //TX_FDEQ_BIN_7
-599 0x0E0F //TX_FDEQ_BIN_8
-600 0x1011 //TX_FDEQ_BIN_9
-601 0x1214 //TX_FDEQ_BIN_10
-602 0x1618 //TX_FDEQ_BIN_11
-603 0x1C1C //TX_FDEQ_BIN_12
-604 0x2020 //TX_FDEQ_BIN_13
-605 0x2020 //TX_FDEQ_BIN_14
-606 0x2011 //TX_FDEQ_BIN_15
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
607 0x0000 //TX_FDEQ_BIN_16
608 0x0000 //TX_FDEQ_BIN_17
609 0x0000 //TX_FDEQ_BIN_18
@@ -54033,9 +67383,9 @@
622 0x4848 //TX_PREEQ_GAIN_MIC0_5
623 0x4848 //TX_PREEQ_GAIN_MIC0_6
624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
628 0x4848 //TX_PREEQ_GAIN_MIC0_11
629 0x4848 //TX_PREEQ_GAIN_MIC0_12
630 0x4848 //TX_PREEQ_GAIN_MIC0_13
@@ -54172,35 +67522,35 @@
761 0x0000 //TX_PREEQ_BIN_MIC2_22
762 0x0000 //TX_PREEQ_BIN_MIC2_23
763 0x0006 //TX_MASKING_ABILITY
-764 0x2000 //TX_NND_WEIGHT
-765 0x0060 //TX_MIC_CALIBRATION_0
-766 0x0060 //TX_MIC_CALIBRATION_1
-767 0x0070 //TX_MIC_CALIBRATION_2
-768 0x0070 //TX_MIC_CALIBRATION_3
-769 0x0050 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
-772 0x0040 //TX_MIC_PWR_BIAS_3
-773 0x0009 //TX_GAIN_LIMIT_0
-774 0x000F //TX_GAIN_LIMIT_1
-775 0x000F //TX_GAIN_LIMIT_2
-776 0x000F //TX_GAIN_LIMIT_3
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
778 0x7FDE //TX_BVE_VAD0_ALPHAUP
779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
781 0x7F5B //TX_BVE_FEVADLI_ALPHA
782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x0C00 //TX_TDDRC_ALPHA_UP_01
-784 0x0C00 //TX_TDDRC_ALPHA_UP_02
-785 0x0C00 //TX_TDDRC_ALPHA_UP_03
-786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
-792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
793 0x0000 //TX_TDDRC_RESRV_0
794 0x0000 //TX_TDDRC_RESRV_1
795 0x0018 //TX_FDDRC_BAND_MARGIN_0
@@ -54261,21 +67611,21 @@
850 0x0000 //TX_FFP_RESRV_4
851 0x0000 //TX_FFP_RESRV_5
852 0x0000 //TX_FFP_RESRV_6
-853 0x0002 //TX_FILTINDX
-854 0x0001 //TX_TDDRC_THRD_0
-855 0x0001 //TX_TDDRC_THRD_1
-856 0x1900 //TX_TDDRC_THRD_2
-857 0x1900 //TX_TDDRC_THRD_3
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
858 0x3000 //TX_TDDRC_SLANT_0
-859 0x7B00 //TX_TDDRC_SLANT_1
-860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
862 0x0000 //TX_TDDRC_HMNC_FLAG
863 0x199A //TX_TDDRC_HMNC_GAIN
864 0x0000 //TX_TDDRC_SMT_FLAG
865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0200 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
868 0x0000 //TX_TDDRC_LMT_ALPHA
869 0x0000 //TX_TFMASKLTH
870 0x0000 //TX_TFMASKLTHL
@@ -54299,7 +67649,7 @@
888 0x0028 //TX_FASTNS_ARSPC_TH
889 0xC000 //TX_FASTNS_MASK5_TH
890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7000 //TX_A_LESSCUT_RTO_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
892 0x1770 //TX_FASTNS_NOISETH
893 0xC000 //TX_FASTNS_SSA_THLFL
894 0xC000 //TX_FASTNS_SSA_THHFL
@@ -54371,31 +67721,31 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x2064 //RX_RECVFUNC_MODE_0
+0 0x0064 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0004 //RX_SAMPLINGFREQ_SIG
-3 0x0004 //RX_SAMPLINGFREQ_PROC
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
10 0x0800 //RX_PGA
11 0x7FFF //RX_A_HP
-12 0x4000 //RX_B_PE
-13 0x7800 //RX_THR_PITCH_DET_0
-14 0x7000 //RX_THR_PITCH_DET_1
-15 0x6000 //RX_THR_PITCH_DET_2
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
16 0x0008 //RX_PITCH_BFR_LEN
17 0x0003 //RX_SBD_PITCH_DET
18 0x0100 //RX_PP_RESRV_0
19 0x0020 //RX_PP_RESRV_1
-20 0x0500 //RX_N_SN_EST
+20 0x0400 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
-22 0x000A //RX_NS_LVL_CTRL
-23 0xF600 //RX_THR_SN_EST
-24 0x7000 //RX_LAMBDA_PFILT
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_FENS_RESRV_0
26 0x0190 //RX_FENS_RESRV_1
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -54436,20 +67786,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -54489,7 +67839,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -54529,10 +67879,10 @@
155 0x0000 //RX_BWE_RESRV_1
156 0x0000 //RX_BWE_RESRV_2
#VOL 0
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -54545,7 +67895,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -54579,20 +67929,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -54628,10 +67978,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -54644,7 +67994,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -54678,20 +68028,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -54727,10 +68077,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -54743,7 +68093,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -54777,20 +68127,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -54826,10 +68176,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -54842,7 +68192,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -54876,20 +68226,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -54925,10 +68275,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -54941,7 +68291,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -54975,20 +68325,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -55024,10 +68374,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 5
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55040,7 +68390,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55074,20 +68424,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -55123,10 +68473,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 6
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55139,7 +68489,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55173,20 +68523,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -55224,29 +68574,29 @@
#RX 2
157 0x0064 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0004 //RX_SAMPLINGFREQ_SIG
-160 0x0004 //RX_SAMPLINGFREQ_PROC
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
161 0x000A //RX_FRAME_SZ
162 0x0000 //RX_DELAY_OPT
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
167 0x0800 //RX_PGA
168 0x7FFF //RX_A_HP
-169 0x4000 //RX_B_PE
-170 0x7800 //RX_THR_PITCH_DET_0
-171 0x7000 //RX_THR_PITCH_DET_1
-172 0x6000 //RX_THR_PITCH_DET_2
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
173 0x0008 //RX_PITCH_BFR_LEN
174 0x0003 //RX_SBD_PITCH_DET
175 0x0100 //RX_PP_RESRV_0
176 0x0020 //RX_PP_RESRV_1
-177 0x0500 //RX_N_SN_EST
+177 0x0400 //RX_N_SN_EST
178 0x000C //RX_N2_SN_EST
-179 0x000A //RX_NS_LVL_CTRL
-180 0xF600 //RX_THR_SN_EST
-181 0x7000 //RX_LAMBDA_PFILT
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
182 0x000A //RX_FENS_RESRV_0
183 0x0190 //RX_FENS_RESRV_1
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -55287,20 +68637,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55340,7 +68690,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55380,10 +68730,10 @@
312 0x0000 //RX_BWE_RESRV_1
313 0x0000 //RX_BWE_RESRV_2
#VOL 0
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55396,7 +68746,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55430,20 +68780,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55479,10 +68829,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55495,7 +68845,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55529,20 +68879,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55578,10 +68928,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55594,7 +68944,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55628,20 +68978,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55677,10 +69027,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55693,7 +69043,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55727,20 +69077,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55776,10 +69126,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55792,7 +69142,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55826,20 +69176,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55875,10 +69225,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55891,7 +69241,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55925,20 +69275,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55974,10 +69324,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55990,7 +69340,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -56024,20 +69374,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
diff --git a/audio/cheetah/tuning/fortemedia/HANDSET.dat b/audio/cheetah/tuning/fortemedia/HANDSET.dat
index f73c80ae58d8f8c0f1dd5ae119d61c1cb0aea55f..44d956e0c85eebe410b4ae71ce1d82f15a1527e7 100644
GIT binary patch
delta 36
scmdmWmVeh-{)QID7N#xC%j7r9-CV0MIXakodz=IFj@Ipc^^8jt03nDE6#xJL
delta 43
xcmdmWmVeh-{)QID7N#xC%jCD;D`H-&FgZGydwZM%^Nv;!--d1bsaD1eDFB$T5y1ce
diff --git a/audio/cheetah/tuning/fortemedia/HANDSET.mods b/audio/cheetah/tuning/fortemedia/HANDSET.mods
index db1fb567..bae627ff 100644
--- a/audio/cheetah/tuning/fortemedia/HANDSET.mods
+++ b/audio/cheetah/tuning/fortemedia/HANDSET.mods
@@ -1,7 +1,7 @@
#PLATFORM_NAME gChip
#EXPORT_FLAG HANDSET
#SINGLE_API_VER 1.2.1
-#SAVE_TIME 2022-03-14 12:01:57
+#SAVE_TIME 2022-04-11 18:36:53
#CASE_NAME HANDSET-HANDSET-RESERVE1-FB
#PARAM_MODE FULL
@@ -29374,7 +29374,7 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET-TMOBILE_US-NB
-#PARAM_MODE Full
+#PARAM_MODE FULL
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -51305,23 +51305,23 @@
564 0x0000 //TX_BVE_MICALPHA_DOWN
565 0x0000 //TX_PB_RESRV_1
566 0x0030 //TX_FDEQ_SUBNUM
-567 0x5C54 //TX_FDEQ_GAIN_0
+567 0x5C58 //TX_FDEQ_GAIN_0
568 0x5048 //TX_FDEQ_GAIN_1
569 0x4C4C //TX_FDEQ_GAIN_2
570 0x494D //TX_FDEQ_GAIN_3
571 0x4442 //TX_FDEQ_GAIN_4
-572 0x4448 //TX_FDEQ_GAIN_5
-573 0x4C53 //TX_FDEQ_GAIN_6
-574 0x6244 //TX_FDEQ_GAIN_7
-575 0x4348 //TX_FDEQ_GAIN_8
-576 0x4848 //TX_FDEQ_GAIN_9
-577 0x4A49 //TX_FDEQ_GAIN_10
+572 0x444C //TX_FDEQ_GAIN_5
+573 0x5053 //TX_FDEQ_GAIN_6
+574 0x6248 //TX_FDEQ_GAIN_7
+575 0x434A //TX_FDEQ_GAIN_8
+576 0x484D //TX_FDEQ_GAIN_9
+577 0x4C4B //TX_FDEQ_GAIN_10
578 0x4E4A //TX_FDEQ_GAIN_11
-579 0x4840 //TX_FDEQ_GAIN_12
-580 0x4040 //TX_FDEQ_GAIN_13
-581 0x4054 //TX_FDEQ_GAIN_14
-582 0x687A //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
+579 0x4842 //TX_FDEQ_GAIN_12
+580 0x4C44 //TX_FDEQ_GAIN_13
+581 0x3A4A //TX_FDEQ_GAIN_14
+582 0x6478 //TX_FDEQ_GAIN_15
+583 0x5848 //TX_FDEQ_GAIN_16
584 0x4848 //TX_FDEQ_GAIN_17
585 0x4848 //TX_FDEQ_GAIN_18
586 0x4848 //TX_FDEQ_GAIN_19
@@ -51341,9 +51341,9 @@
600 0x0F0F //TX_FDEQ_BIN_9
601 0x0E0D //TX_FDEQ_BIN_10
602 0x0F28 //TX_FDEQ_BIN_11
-603 0x111B //TX_FDEQ_BIN_12
-604 0x291E //TX_FDEQ_BIN_13
-605 0x1E10 //TX_FDEQ_BIN_14
+603 0x110F //TX_FDEQ_BIN_12
+604 0x350F //TX_FDEQ_BIN_13
+605 0x1924 //TX_FDEQ_BIN_14
606 0x1810 //TX_FDEQ_BIN_15
607 0x1021 //TX_FDEQ_BIN_16
608 0x1000 //TX_FDEQ_BIN_17
@@ -51604,7 +51604,7 @@
863 0x199A //TX_TDDRC_HMNC_GAIN
864 0x0000 //TX_TDDRC_SMT_FLAG
865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0650 //TX_TDDRC_DRC_GAIN
+866 0x06EC //TX_TDDRC_DRC_GAIN
867 0x7FFF //TX_TDDRC_LMT_THRD
868 0x0000 //TX_TDDRC_LMT_ALPHA
869 0x0000 //TX_TFMASKLTH
@@ -51881,24 +51881,24 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x056F //RX_TDDRC_DRC_GAIN
+124 0x057F //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x483E //RX_FDEQ_GAIN_0
40 0x3E3E //RX_FDEQ_GAIN_1
-41 0x3E4C //RX_FDEQ_GAIN_2
-42 0x586E //RX_FDEQ_GAIN_3
-43 0x8496 //RX_FDEQ_GAIN_4
-44 0x968E //RX_FDEQ_GAIN_5
-45 0x8488 //RX_FDEQ_GAIN_6
-46 0x8884 //RX_FDEQ_GAIN_7
-47 0x9CA4 //RX_FDEQ_GAIN_8
-48 0x98A8 //RX_FDEQ_GAIN_9
-49 0xBEB8 //RX_FDEQ_GAIN_10
-50 0x918D //RX_FDEQ_GAIN_11
-51 0x7566 //RX_FDEQ_GAIN_12
-52 0x6460 //RX_FDEQ_GAIN_13
-53 0x6174 //RX_FDEQ_GAIN_14
-54 0x7890 //RX_FDEQ_GAIN_15
+41 0x3E4A //RX_FDEQ_GAIN_2
+42 0x5464 //RX_FDEQ_GAIN_3
+43 0x7072 //RX_FDEQ_GAIN_4
+44 0x8576 //RX_FDEQ_GAIN_5
+45 0x7880 //RX_FDEQ_GAIN_6
+46 0x8888 //RX_FDEQ_GAIN_7
+47 0x949C //RX_FDEQ_GAIN_8
+48 0x96A4 //RX_FDEQ_GAIN_9
+49 0xA994 //RX_FDEQ_GAIN_10
+50 0x9487 //RX_FDEQ_GAIN_11
+51 0x6F64 //RX_FDEQ_GAIN_12
+52 0x625A //RX_FDEQ_GAIN_13
+53 0x5D80 //RX_FDEQ_GAIN_14
+54 0x8890 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
57 0x4848 //RX_FDEQ_GAIN_18
@@ -51910,15 +51910,15 @@
63 0x0202 //RX_FDEQ_BIN_0
64 0x0202 //RX_FDEQ_BIN_1
65 0x0301 //RX_FDEQ_BIN_2
-66 0x0404 //RX_FDEQ_BIN_3
+66 0x0503 //RX_FDEQ_BIN_3
67 0x0406 //RX_FDEQ_BIN_4
68 0x0109 //RX_FDEQ_BIN_5
69 0x0708 //RX_FDEQ_BIN_6
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D09 //RX_FDEQ_BIN_9
-73 0x0819 //RX_FDEQ_BIN_10
-74 0x1E19 //RX_FDEQ_BIN_11
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
75 0x1B0F //RX_FDEQ_BIN_12
76 0x141E //RX_FDEQ_BIN_13
77 0x3728 //RX_FDEQ_BIN_14
@@ -51980,24 +51980,24 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x056F //RX_TDDRC_DRC_GAIN
+124 0x057F //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x483E //RX_FDEQ_GAIN_0
40 0x3E3E //RX_FDEQ_GAIN_1
-41 0x3E4C //RX_FDEQ_GAIN_2
-42 0x586E //RX_FDEQ_GAIN_3
-43 0x8496 //RX_FDEQ_GAIN_4
-44 0x968E //RX_FDEQ_GAIN_5
-45 0x8488 //RX_FDEQ_GAIN_6
-46 0x8884 //RX_FDEQ_GAIN_7
-47 0x9CA4 //RX_FDEQ_GAIN_8
-48 0x98A8 //RX_FDEQ_GAIN_9
-49 0xBEB8 //RX_FDEQ_GAIN_10
-50 0x918D //RX_FDEQ_GAIN_11
-51 0x7566 //RX_FDEQ_GAIN_12
-52 0x6460 //RX_FDEQ_GAIN_13
-53 0x6174 //RX_FDEQ_GAIN_14
-54 0x7890 //RX_FDEQ_GAIN_15
+41 0x3E4A //RX_FDEQ_GAIN_2
+42 0x5464 //RX_FDEQ_GAIN_3
+43 0x7072 //RX_FDEQ_GAIN_4
+44 0x8576 //RX_FDEQ_GAIN_5
+45 0x7880 //RX_FDEQ_GAIN_6
+46 0x8888 //RX_FDEQ_GAIN_7
+47 0x949C //RX_FDEQ_GAIN_8
+48 0x96A4 //RX_FDEQ_GAIN_9
+49 0xA994 //RX_FDEQ_GAIN_10
+50 0x9487 //RX_FDEQ_GAIN_11
+51 0x6F64 //RX_FDEQ_GAIN_12
+52 0x625A //RX_FDEQ_GAIN_13
+53 0x5D80 //RX_FDEQ_GAIN_14
+54 0x8890 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
57 0x4848 //RX_FDEQ_GAIN_18
@@ -52009,15 +52009,15 @@
63 0x0202 //RX_FDEQ_BIN_0
64 0x0202 //RX_FDEQ_BIN_1
65 0x0301 //RX_FDEQ_BIN_2
-66 0x0404 //RX_FDEQ_BIN_3
+66 0x0503 //RX_FDEQ_BIN_3
67 0x0406 //RX_FDEQ_BIN_4
68 0x0109 //RX_FDEQ_BIN_5
69 0x0708 //RX_FDEQ_BIN_6
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D09 //RX_FDEQ_BIN_9
-73 0x0819 //RX_FDEQ_BIN_10
-74 0x1E19 //RX_FDEQ_BIN_11
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
75 0x1B0F //RX_FDEQ_BIN_12
76 0x141E //RX_FDEQ_BIN_13
77 0x3728 //RX_FDEQ_BIN_14
@@ -52079,24 +52079,24 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x056F //RX_TDDRC_DRC_GAIN
+124 0x057F //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x483E //RX_FDEQ_GAIN_0
40 0x3E3E //RX_FDEQ_GAIN_1
-41 0x3E4C //RX_FDEQ_GAIN_2
-42 0x586E //RX_FDEQ_GAIN_3
-43 0x8496 //RX_FDEQ_GAIN_4
-44 0x968E //RX_FDEQ_GAIN_5
-45 0x8488 //RX_FDEQ_GAIN_6
-46 0x8884 //RX_FDEQ_GAIN_7
-47 0x9CA4 //RX_FDEQ_GAIN_8
-48 0x98A8 //RX_FDEQ_GAIN_9
-49 0xBEB8 //RX_FDEQ_GAIN_10
-50 0x918D //RX_FDEQ_GAIN_11
-51 0x7566 //RX_FDEQ_GAIN_12
-52 0x6460 //RX_FDEQ_GAIN_13
-53 0x6174 //RX_FDEQ_GAIN_14
-54 0x7890 //RX_FDEQ_GAIN_15
+41 0x3E4A //RX_FDEQ_GAIN_2
+42 0x5464 //RX_FDEQ_GAIN_3
+43 0x7072 //RX_FDEQ_GAIN_4
+44 0x8576 //RX_FDEQ_GAIN_5
+45 0x7880 //RX_FDEQ_GAIN_6
+46 0x8888 //RX_FDEQ_GAIN_7
+47 0x949C //RX_FDEQ_GAIN_8
+48 0x96A4 //RX_FDEQ_GAIN_9
+49 0xA994 //RX_FDEQ_GAIN_10
+50 0x9487 //RX_FDEQ_GAIN_11
+51 0x6F64 //RX_FDEQ_GAIN_12
+52 0x625A //RX_FDEQ_GAIN_13
+53 0x5D80 //RX_FDEQ_GAIN_14
+54 0x8890 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
57 0x4848 //RX_FDEQ_GAIN_18
@@ -52108,15 +52108,15 @@
63 0x0202 //RX_FDEQ_BIN_0
64 0x0202 //RX_FDEQ_BIN_1
65 0x0301 //RX_FDEQ_BIN_2
-66 0x0404 //RX_FDEQ_BIN_3
+66 0x0503 //RX_FDEQ_BIN_3
67 0x0406 //RX_FDEQ_BIN_4
68 0x0109 //RX_FDEQ_BIN_5
69 0x0708 //RX_FDEQ_BIN_6
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D09 //RX_FDEQ_BIN_9
-73 0x0819 //RX_FDEQ_BIN_10
-74 0x1E19 //RX_FDEQ_BIN_11
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
75 0x1B0F //RX_FDEQ_BIN_12
76 0x141E //RX_FDEQ_BIN_13
77 0x3728 //RX_FDEQ_BIN_14
@@ -52178,24 +52178,24 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x056F //RX_TDDRC_DRC_GAIN
+124 0x057F //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x483E //RX_FDEQ_GAIN_0
40 0x3E3E //RX_FDEQ_GAIN_1
-41 0x3E4C //RX_FDEQ_GAIN_2
-42 0x586E //RX_FDEQ_GAIN_3
-43 0x8496 //RX_FDEQ_GAIN_4
-44 0x968E //RX_FDEQ_GAIN_5
-45 0x8488 //RX_FDEQ_GAIN_6
-46 0x8884 //RX_FDEQ_GAIN_7
-47 0x9CA4 //RX_FDEQ_GAIN_8
-48 0x98A8 //RX_FDEQ_GAIN_9
-49 0xBEB8 //RX_FDEQ_GAIN_10
-50 0x918D //RX_FDEQ_GAIN_11
-51 0x7566 //RX_FDEQ_GAIN_12
-52 0x6460 //RX_FDEQ_GAIN_13
-53 0x6174 //RX_FDEQ_GAIN_14
-54 0x7890 //RX_FDEQ_GAIN_15
+41 0x3E4A //RX_FDEQ_GAIN_2
+42 0x5464 //RX_FDEQ_GAIN_3
+43 0x7072 //RX_FDEQ_GAIN_4
+44 0x8576 //RX_FDEQ_GAIN_5
+45 0x7880 //RX_FDEQ_GAIN_6
+46 0x8888 //RX_FDEQ_GAIN_7
+47 0x949C //RX_FDEQ_GAIN_8
+48 0x96A4 //RX_FDEQ_GAIN_9
+49 0xA994 //RX_FDEQ_GAIN_10
+50 0x9487 //RX_FDEQ_GAIN_11
+51 0x6F64 //RX_FDEQ_GAIN_12
+52 0x625A //RX_FDEQ_GAIN_13
+53 0x5D80 //RX_FDEQ_GAIN_14
+54 0x8890 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
57 0x4848 //RX_FDEQ_GAIN_18
@@ -52207,15 +52207,15 @@
63 0x0202 //RX_FDEQ_BIN_0
64 0x0202 //RX_FDEQ_BIN_1
65 0x0301 //RX_FDEQ_BIN_2
-66 0x0404 //RX_FDEQ_BIN_3
+66 0x0503 //RX_FDEQ_BIN_3
67 0x0406 //RX_FDEQ_BIN_4
68 0x0109 //RX_FDEQ_BIN_5
69 0x0708 //RX_FDEQ_BIN_6
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D09 //RX_FDEQ_BIN_9
-73 0x0819 //RX_FDEQ_BIN_10
-74 0x1E19 //RX_FDEQ_BIN_11
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
75 0x1B0F //RX_FDEQ_BIN_12
76 0x141E //RX_FDEQ_BIN_13
77 0x3728 //RX_FDEQ_BIN_14
@@ -52252,7 +52252,7 @@
108 0x5333 //RX_FDDRC_SLANT_1_2
109 0x5333 //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0035 //RX_SPK_VOL
+129 0x0032 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
6 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -52277,24 +52277,24 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x056F //RX_TDDRC_DRC_GAIN
+124 0x057F //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x483E //RX_FDEQ_GAIN_0
40 0x3E3E //RX_FDEQ_GAIN_1
-41 0x3E4C //RX_FDEQ_GAIN_2
-42 0x586E //RX_FDEQ_GAIN_3
-43 0x8496 //RX_FDEQ_GAIN_4
-44 0x968E //RX_FDEQ_GAIN_5
-45 0x8488 //RX_FDEQ_GAIN_6
-46 0x8884 //RX_FDEQ_GAIN_7
-47 0x9CA4 //RX_FDEQ_GAIN_8
-48 0x98A8 //RX_FDEQ_GAIN_9
-49 0xBEB8 //RX_FDEQ_GAIN_10
-50 0x918D //RX_FDEQ_GAIN_11
-51 0x7566 //RX_FDEQ_GAIN_12
-52 0x6460 //RX_FDEQ_GAIN_13
-53 0x6174 //RX_FDEQ_GAIN_14
-54 0x7890 //RX_FDEQ_GAIN_15
+41 0x3E4A //RX_FDEQ_GAIN_2
+42 0x5464 //RX_FDEQ_GAIN_3
+43 0x7072 //RX_FDEQ_GAIN_4
+44 0x8576 //RX_FDEQ_GAIN_5
+45 0x7880 //RX_FDEQ_GAIN_6
+46 0x8888 //RX_FDEQ_GAIN_7
+47 0x949C //RX_FDEQ_GAIN_8
+48 0x96A4 //RX_FDEQ_GAIN_9
+49 0xA994 //RX_FDEQ_GAIN_10
+50 0x9487 //RX_FDEQ_GAIN_11
+51 0x6F64 //RX_FDEQ_GAIN_12
+52 0x625A //RX_FDEQ_GAIN_13
+53 0x5D80 //RX_FDEQ_GAIN_14
+54 0x8890 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
57 0x4848 //RX_FDEQ_GAIN_18
@@ -52306,15 +52306,15 @@
63 0x0202 //RX_FDEQ_BIN_0
64 0x0202 //RX_FDEQ_BIN_1
65 0x0301 //RX_FDEQ_BIN_2
-66 0x0404 //RX_FDEQ_BIN_3
+66 0x0503 //RX_FDEQ_BIN_3
67 0x0406 //RX_FDEQ_BIN_4
68 0x0109 //RX_FDEQ_BIN_5
69 0x0708 //RX_FDEQ_BIN_6
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D09 //RX_FDEQ_BIN_9
-73 0x0819 //RX_FDEQ_BIN_10
-74 0x1E19 //RX_FDEQ_BIN_11
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
75 0x1B0F //RX_FDEQ_BIN_12
76 0x141E //RX_FDEQ_BIN_13
77 0x3728 //RX_FDEQ_BIN_14
@@ -52376,24 +52376,24 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x056F //RX_TDDRC_DRC_GAIN
+124 0x057F //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x483E //RX_FDEQ_GAIN_0
40 0x3E3E //RX_FDEQ_GAIN_1
-41 0x3E4C //RX_FDEQ_GAIN_2
-42 0x586E //RX_FDEQ_GAIN_3
-43 0x8496 //RX_FDEQ_GAIN_4
-44 0x968E //RX_FDEQ_GAIN_5
-45 0x8488 //RX_FDEQ_GAIN_6
-46 0x8884 //RX_FDEQ_GAIN_7
-47 0x9CA4 //RX_FDEQ_GAIN_8
-48 0x98A8 //RX_FDEQ_GAIN_9
-49 0xBEB8 //RX_FDEQ_GAIN_10
-50 0x918D //RX_FDEQ_GAIN_11
-51 0x7566 //RX_FDEQ_GAIN_12
-52 0x6460 //RX_FDEQ_GAIN_13
-53 0x6174 //RX_FDEQ_GAIN_14
-54 0x7890 //RX_FDEQ_GAIN_15
+41 0x3E4A //RX_FDEQ_GAIN_2
+42 0x5464 //RX_FDEQ_GAIN_3
+43 0x7072 //RX_FDEQ_GAIN_4
+44 0x8576 //RX_FDEQ_GAIN_5
+45 0x7880 //RX_FDEQ_GAIN_6
+46 0x8888 //RX_FDEQ_GAIN_7
+47 0x949C //RX_FDEQ_GAIN_8
+48 0x96A4 //RX_FDEQ_GAIN_9
+49 0xA994 //RX_FDEQ_GAIN_10
+50 0x9487 //RX_FDEQ_GAIN_11
+51 0x6F64 //RX_FDEQ_GAIN_12
+52 0x625A //RX_FDEQ_GAIN_13
+53 0x5D80 //RX_FDEQ_GAIN_14
+54 0x8890 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
57 0x4848 //RX_FDEQ_GAIN_18
@@ -52405,15 +52405,15 @@
63 0x0202 //RX_FDEQ_BIN_0
64 0x0202 //RX_FDEQ_BIN_1
65 0x0301 //RX_FDEQ_BIN_2
-66 0x0404 //RX_FDEQ_BIN_3
+66 0x0503 //RX_FDEQ_BIN_3
67 0x0406 //RX_FDEQ_BIN_4
68 0x0109 //RX_FDEQ_BIN_5
69 0x0708 //RX_FDEQ_BIN_6
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D09 //RX_FDEQ_BIN_9
-73 0x0819 //RX_FDEQ_BIN_10
-74 0x1E19 //RX_FDEQ_BIN_11
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
75 0x1B0F //RX_FDEQ_BIN_12
76 0x141E //RX_FDEQ_BIN_13
77 0x3728 //RX_FDEQ_BIN_14
@@ -52475,24 +52475,24 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x056F //RX_TDDRC_DRC_GAIN
+124 0x057F //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x483E //RX_FDEQ_GAIN_0
40 0x3E3E //RX_FDEQ_GAIN_1
-41 0x3E4C //RX_FDEQ_GAIN_2
-42 0x586E //RX_FDEQ_GAIN_3
-43 0x8496 //RX_FDEQ_GAIN_4
-44 0x968E //RX_FDEQ_GAIN_5
-45 0x8488 //RX_FDEQ_GAIN_6
-46 0x8884 //RX_FDEQ_GAIN_7
-47 0x9CA4 //RX_FDEQ_GAIN_8
-48 0x98A8 //RX_FDEQ_GAIN_9
-49 0xBEB8 //RX_FDEQ_GAIN_10
-50 0x918D //RX_FDEQ_GAIN_11
-51 0x7566 //RX_FDEQ_GAIN_12
-52 0x6460 //RX_FDEQ_GAIN_13
-53 0x6174 //RX_FDEQ_GAIN_14
-54 0x7890 //RX_FDEQ_GAIN_15
+41 0x3E4A //RX_FDEQ_GAIN_2
+42 0x5464 //RX_FDEQ_GAIN_3
+43 0x7072 //RX_FDEQ_GAIN_4
+44 0x8576 //RX_FDEQ_GAIN_5
+45 0x7880 //RX_FDEQ_GAIN_6
+46 0x8888 //RX_FDEQ_GAIN_7
+47 0x949C //RX_FDEQ_GAIN_8
+48 0x96A4 //RX_FDEQ_GAIN_9
+49 0xA994 //RX_FDEQ_GAIN_10
+50 0x9487 //RX_FDEQ_GAIN_11
+51 0x6F64 //RX_FDEQ_GAIN_12
+52 0x625A //RX_FDEQ_GAIN_13
+53 0x5D80 //RX_FDEQ_GAIN_14
+54 0x8890 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
57 0x4848 //RX_FDEQ_GAIN_18
@@ -52504,15 +52504,15 @@
63 0x0202 //RX_FDEQ_BIN_0
64 0x0202 //RX_FDEQ_BIN_1
65 0x0301 //RX_FDEQ_BIN_2
-66 0x0404 //RX_FDEQ_BIN_3
+66 0x0503 //RX_FDEQ_BIN_3
67 0x0406 //RX_FDEQ_BIN_4
68 0x0109 //RX_FDEQ_BIN_5
69 0x0708 //RX_FDEQ_BIN_6
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D09 //RX_FDEQ_BIN_9
-73 0x0819 //RX_FDEQ_BIN_10
-74 0x1E19 //RX_FDEQ_BIN_11
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
75 0x1B0F //RX_FDEQ_BIN_12
76 0x141E //RX_FDEQ_BIN_13
77 0x3728 //RX_FDEQ_BIN_14
@@ -61985,23 +61985,23 @@
564 0x0000 //TX_BVE_MICALPHA_DOWN
565 0x0000 //TX_PB_RESRV_1
566 0x0030 //TX_FDEQ_SUBNUM
-567 0x5C54 //TX_FDEQ_GAIN_0
+567 0x5C58 //TX_FDEQ_GAIN_0
568 0x5048 //TX_FDEQ_GAIN_1
569 0x4C4C //TX_FDEQ_GAIN_2
570 0x494D //TX_FDEQ_GAIN_3
571 0x4442 //TX_FDEQ_GAIN_4
-572 0x4448 //TX_FDEQ_GAIN_5
-573 0x4C53 //TX_FDEQ_GAIN_6
-574 0x6244 //TX_FDEQ_GAIN_7
-575 0x4348 //TX_FDEQ_GAIN_8
-576 0x4848 //TX_FDEQ_GAIN_9
-577 0x4A49 //TX_FDEQ_GAIN_10
+572 0x444C //TX_FDEQ_GAIN_5
+573 0x5053 //TX_FDEQ_GAIN_6
+574 0x6248 //TX_FDEQ_GAIN_7
+575 0x434A //TX_FDEQ_GAIN_8
+576 0x484D //TX_FDEQ_GAIN_9
+577 0x4C4B //TX_FDEQ_GAIN_10
578 0x4E4A //TX_FDEQ_GAIN_11
-579 0x4840 //TX_FDEQ_GAIN_12
-580 0x4040 //TX_FDEQ_GAIN_13
-581 0x4054 //TX_FDEQ_GAIN_14
-582 0x687A //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
+579 0x4842 //TX_FDEQ_GAIN_12
+580 0x4C44 //TX_FDEQ_GAIN_13
+581 0x3A4A //TX_FDEQ_GAIN_14
+582 0x6478 //TX_FDEQ_GAIN_15
+583 0x5848 //TX_FDEQ_GAIN_16
584 0x4848 //TX_FDEQ_GAIN_17
585 0x4848 //TX_FDEQ_GAIN_18
586 0x4848 //TX_FDEQ_GAIN_19
@@ -62021,9 +62021,9 @@
600 0x0F0F //TX_FDEQ_BIN_9
601 0x0E0D //TX_FDEQ_BIN_10
602 0x0F28 //TX_FDEQ_BIN_11
-603 0x111B //TX_FDEQ_BIN_12
-604 0x291E //TX_FDEQ_BIN_13
-605 0x1E10 //TX_FDEQ_BIN_14
+603 0x110F //TX_FDEQ_BIN_12
+604 0x350F //TX_FDEQ_BIN_13
+605 0x1924 //TX_FDEQ_BIN_14
606 0x1810 //TX_FDEQ_BIN_15
607 0x1021 //TX_FDEQ_BIN_16
608 0x1000 //TX_FDEQ_BIN_17
@@ -62284,7 +62284,7 @@
863 0x199A //TX_TDDRC_HMNC_GAIN
864 0x0000 //TX_TDDRC_SMT_FLAG
865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0650 //TX_TDDRC_DRC_GAIN
+866 0x06EC //TX_TDDRC_DRC_GAIN
867 0x7FFF //TX_TDDRC_LMT_THRD
868 0x0000 //TX_TDDRC_LMT_ALPHA
869 0x0000 //TX_TFMASKLTH
diff --git a/audio/cheetah/tuning/fortemedia/HANDSFREE.dat b/audio/cheetah/tuning/fortemedia/HANDSFREE.dat
index a8c66640dd47b5060120b45fa754aedaab3a7513..f396a90e0f5e52d40cc49f5ef56e1d468099bd04 100644
GIT binary patch
delta 3718
zcmeHJZA@Eb6h7znwlH9Dqf0iGbd9M<X(`CavUP-2Hn#>EYycO`YH2nCxR9->3li<%
z6#236kxXCX#a|McMvY-j?hlYC5T_HJ!_FVm_%X`H7*m3YCX0y+db&+qHe%MLGjrLG
zH}Ac<Ip=+!bI$YJXHuk0ij>HAtA%g2NvoWDU)C0~=Q9kyfdrv_TFg={p`u3K#4;%$
zsiqtplme^OXb##9A4=1ZTBY`T&?p^3b=-ran!_%m1d4DLoI?H3m<5mOMN6F`Dl;A#
z`lSO&T7gG&@61GWoWxm#)o4}=z4)Lg?Fnfe8~vCTyT6S<ZYNK=TIj<Tu~=VQYJwbU
z>U@-HYI4a}YoWc(dE{-flB>o>UT;3R-F99D<nk1f%k>!Ta24^lb>y!p=3Vq}sY<gd
z<y4eaK}JPnJG!t!OqDb`lAAMl8*&bE&bl%MLzLVa%sYQgBKmpfF|p8VF6)+-zh`~G
zN*@1py>j17uP$x5xc=I%-*ToQ+h+V`r5LlMi-u~&@Z6Q@4pmo460H@{r^?d$rFUTh
z-h+rikgY*<>}bkFn1Vh>3~F#14nA>t(6Lq>^Po*jm-|qBUu#QsHsFbjMkJB-^Z@F$
z7Y*$wCOb`9)y{7XX|OcxBHCRp+IFo#vvzRT#T&+4TdWTuZsTt6)=oE=5u5*cJiPQM
z{SG4Xst<d$pP${0@seYw_D6HJg8Q^J2jWB(&F$;ZDf-)I?SEh1El-1~@(duH1#r#)
zn9c!6vjEC@0GQ)-0oI_1>8#om9Y-{Y_CKxSR7Wey+LJFmpL!X@cr4CX2El|C=AImB
zr$Ie*1j~hQqgfm2S)R9ftC+X@nYZ5NTnaQ<sI@hZ_Uvcg*4xO%ymh(kv~_C%m6V9c
zUWYLDj^i`pjh7p95)A6Tm7tSxYS}k2wGz9gwjfMs*Yl_+7AF?OrFhHiA72ga<jVM8
z$fZ4A3x$GtL|hq9z(%E&`Ltn!or;SKsIV|z8Ex@3K2p|SIr8S?_{a&Z^7Z1b|4hy0
zduskKf1P`3o+LF_S<MGf9*S<p5k#F@H;S9sIXn~wIXleGA^JGBtRHSWOyGZuKzW;n
z+lG04!0#gj&W~tSaFif*i~v@KCCCgrby?w9h7tx4fuM04-~(Y39A(q-37d{j*>oIZ
z)A1RbjtMptpR?)sf(^%UUSG25IKe_T$)@8g{ubr-pXB{(>g#)D`@^NE`+@ZMBk82m
zq?e{hmSbelPm>~_p)~zjN=cug%=^w!rZP)b<ve?oIrb<QDBt)KIrD{odq-IX82Mgn
z!{8ra40i{n;9ZDmFgci%J7o6MfE&9Ui42{5BasIG_h2A<Nfo-K<yE0RFv0frI#qDr
cK2=DpGZIUj;c92D0n;kq8DNHZ%zOv_0%j>l?*IS*
delta 1226
zcmd6mPe{~36vyYytUq;I*A7Znw*9m;|EzAU7OC5^D99?S*sjTDQj3Z%w%8ve_V6nw
zlhPC+CYtS{(k&_7n!}QTd6We6Qb>hbhwu<~^I|NGn%W`ILx&Cz-n{uT^XBvBJHujU
zSZw&?K2bT56eE^XzZ(>RFw!hyG24S9V^1I!i{gA8U}}%38VnLKZ~cjr9S9Q#BBUJY
z2tqL=5h)}w@~#Vpus+Q=CTn4$R&$3HJlxU%2P30a_zXPrB2X4>_KL2eqW~3b!PYA7
z7O4PNx6@}by+q<c6Ss>pfSXFdzpi1?QeSB|)~JdyslWRebvd(WeQh>v^XE{XKbN{1
z%+%}6qb^sz3=4HSkIOhA!%CgC1=LqtNWBe=o^dOA#!7l*Kc6gs0iJJ%z^Q+8mN1t4
z6O@7tfSSjRF~V&2T&bSIQ#6G}P*`Eq+`_u*{Kh4+fI`KKC>Zkvt(NiO8ZhA{!Y6AW
zSM1S+fPM0sA&!ULkj`?>_wW@BlEi=#05;RD3ipLMMb8bJpxJC+CA-xa531;CT-o3(
zqRkqBOVVr-^DPp0$9DQ+i}9hR3}B-VeS}Nk>kEk)M#O3$buU;%%1sXj%mSSSpt9l4
zZ|o&Wh7>kM%ESVl2KM#6nSJOA@_LW#uJKNDoIa%gqbZL;MHC^BfhpocR_GJs{l4vw
zU`mq1)Z{Q5gIRKr*)-UZL))+C(uRPUI_tz-zXH(4h90yY*hw|GE7gy+m#1F_jqc*+
zH8AOR`Q>(_mE6b(*4V55G`+)_Pi-~}JzdDc?ZqPcNCgtq{cVpevnf&ixbS{t{08Xa
zcW~D#1}!4}^co03SNK^Uoa7VtAjG0J=Z29g_?uohyuH3A-}~ER&o{RmTkevcGVr&(
aki_jJuyMjxiJ8hA|G(d=5+bAurnO(GJf+0|
diff --git a/audio/cheetah/tuning/fortemedia/HANDSFREE.mods b/audio/cheetah/tuning/fortemedia/HANDSFREE.mods
index 536b7c18..9dfc4ed1 100644
--- a/audio/cheetah/tuning/fortemedia/HANDSFREE.mods
+++ b/audio/cheetah/tuning/fortemedia/HANDSFREE.mods
@@ -1,7 +1,7 @@
#PLATFORM_NAME gChip
#EXPORT_FLAG HANDSFREE
#SINGLE_API_VER 1.2.1
-#SAVE_TIME 2022-04-01 10:48:02
+#SAVE_TIME 2022-04-15 16:36:15
#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-FB
#PARAM_MODE FULL
@@ -1522,7 +1522,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0035 //RX_SPK_VOL
+129 0x0028 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
6 0x4000 //RX_TDDRC_ALPHA_UP_1
@@ -2680,8 +2680,8 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x00B3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0003 //TX_SAMPLINGFREQ_SIG
@@ -2830,7 +2830,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x7600 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x2000 //TX_MIN_EQ_RE_EST_0
+152 0x1000 //TX_MIN_EQ_RE_EST_0
153 0x0600 //TX_MIN_EQ_RE_EST_1
154 0x3000 //TX_MIN_EQ_RE_EST_2
155 0x3000 //TX_MIN_EQ_RE_EST_3
@@ -2847,7 +2847,7 @@
166 0x3000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x4000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x0270 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
171 0x0880 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
@@ -2891,7 +2891,7 @@
210 0x5000 //TX_DTD_THR2_6
211 0x7FFF //TX_DTD_THR3
212 0x0000 //TX_SPK_CUT_K
-213 0x36B0 //TX_DT_CUT_K
+213 0x1770 //TX_DT_CUT_K
214 0x0100 //TX_DT_CUT_THR
215 0x04EB //TX_COMFORT_G
216 0x01F4 //TX_POWER_YOUT_TH
@@ -2903,8 +2903,8 @@
222 0x023E //TX_ADPT_STRICT_H
223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x07D0 //TX_RATIO_DT_L_TH_HIGH
-226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+225 0x02BC //TX_RATIO_DT_L_TH_HIGH
+226 0x5208 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -2912,7 +2912,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x02BC //TX_RATIO_DT_L0_TH_HIGH
+234 0x0190 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -3025,7 +3025,7 @@
344 0x7F00 //TX_LAMBDA_PFILT_S_5
345 0x7F00 //TX_LAMBDA_PFILT_S_6
346 0x7F00 //TX_LAMBDA_PFILT_S_7
-347 0x3E80 //TX_K_PEPPER
+347 0x1000 //TX_K_PEPPER
348 0x0400 //TX_A_PEPPER
349 0x1EAA //TX_K_PEPPER_HF
350 0x0600 //TX_A_PEPPER_HF
@@ -3079,7 +3079,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -3448,13 +3448,13 @@
767 0x0050 //TX_MIC_CALIBRATION_2
768 0x0050 //TX_MIC_CALIBRATION_3
769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
775 0x000F //TX_GAIN_LIMIT_2
-776 0x0000 //TX_GAIN_LIMIT_3
+776 0x000F //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
778 0x7FDE //TX_BVE_VAD0_ALPHAUP
779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
@@ -3621,9 +3621,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0E21 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE4A8 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -3641,7 +3641,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x207C //RX_RECVFUNC_MODE_0
+0 0x247C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0003 //RX_SAMPLINGFREQ_SIG
3 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -3767,9 +3767,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0109 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
+126 0x13E0 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0B50 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -3823,21 +3823,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -3852,15 +3852,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -3895,7 +3895,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0049 //RX_SPK_VOL
+129 0x004B //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -3922,21 +3922,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -3951,15 +3951,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -3994,7 +3994,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0070 //RX_SPK_VOL
+129 0x0072 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -4021,21 +4021,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -4050,15 +4050,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -4093,7 +4093,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00AC //RX_SPK_VOL
+129 0x00AE //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -4118,23 +4118,23 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0109 //RX_TDDRC_DRC_GAIN
+124 0x0110 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -4149,15 +4149,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -4219,21 +4219,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x01AE //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -4248,15 +4248,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -4316,23 +4316,23 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0284 //RX_TDDRC_DRC_GAIN
+124 0x028B //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x8468 //RX_FDEQ_GAIN_0
-40 0x484C //RX_FDEQ_GAIN_1
-41 0x545A //RX_FDEQ_GAIN_2
-42 0x686A //RX_FDEQ_GAIN_3
-43 0x6860 //RX_FDEQ_GAIN_4
-44 0x5C4C //RX_FDEQ_GAIN_5
-45 0x5858 //RX_FDEQ_GAIN_6
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x7064 //RX_FDEQ_GAIN_4
+44 0x6050 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
46 0x4C4C //RX_FDEQ_GAIN_7
47 0x4C4C //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+48 0x4C48 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
52 0x5460 //RX_FDEQ_GAIN_13
-53 0x5C58 //RX_FDEQ_GAIN_14
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -4353,9 +4353,9 @@
71 0x0B07 //RX_FDEQ_BIN_8
72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E2D //RX_FDEQ_BIN_11
-75 0x1923 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -4418,20 +4418,20 @@
124 0x0478 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x8468 //RX_FDEQ_GAIN_0
-40 0x484C //RX_FDEQ_GAIN_1
-41 0x545A //RX_FDEQ_GAIN_2
-42 0x686A //RX_FDEQ_GAIN_3
-43 0x6860 //RX_FDEQ_GAIN_4
-44 0x5C4C //RX_FDEQ_GAIN_5
-45 0x5858 //RX_FDEQ_GAIN_6
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x7064 //RX_FDEQ_GAIN_4
+44 0x6050 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
46 0x4C4C //RX_FDEQ_GAIN_7
47 0x4C4C //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+48 0x4C48 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
52 0x5460 //RX_FDEQ_GAIN_13
-53 0x5C58 //RX_FDEQ_GAIN_14
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -4452,9 +4452,9 @@
71 0x0B07 //RX_FDEQ_BIN_8
72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E2D //RX_FDEQ_BIN_11
-75 0x1923 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -5350,8 +5350,8 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x0073 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0001 //TX_SAMPLINGFREQ_SIG
@@ -5500,7 +5500,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x6800 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x0200 //TX_MIN_EQ_RE_EST_0
+152 0x1F80 //TX_MIN_EQ_RE_EST_0
153 0x0100 //TX_MIN_EQ_RE_EST_1
154 0x0200 //TX_MIN_EQ_RE_EST_2
155 0x0200 //TX_MIN_EQ_RE_EST_3
@@ -5517,7 +5517,7 @@
166 0x4000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x5000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x02A0 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
171 0x06B0 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
@@ -5571,10 +5571,10 @@
220 0x0000 //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x03E8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x0578 //TX_RATIO_DT_L_TH_HIGH
-226 0x43FB //TX_RATIO_DT_H_TH_HIGH
+225 0x0154 //TX_RATIO_DT_L_TH_HIGH
+226 0x4588 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -5582,7 +5582,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH
+234 0x0258 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -5706,9 +5706,9 @@
355 0x0200 //TX_DT_BINVAD_TH_2
356 0x0800 //TX_DT_BINVAD_TH_3
357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0800 //TX_C_POST_FLT_DT
+358 0x4000 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0140 //TX_DT_BOOST
+360 0x0180 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
362 0x0005 //TX_BF_DVG_TH
363 0x001E //TX_SN_C_F
@@ -5749,7 +5749,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x4000 //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -6291,9 +6291,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0C97 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE4A8 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -6311,7 +6311,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x207C //RX_RECVFUNC_MODE_0
+0 0x247C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0001 //RX_SAMPLINGFREQ_SIG
3 0x0001 //RX_SAMPLINGFREQ_PROC
@@ -6437,9 +6437,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x01AE //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
+126 0x13E0 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0B50 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -6565,7 +6565,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x004C //RX_SPK_VOL
+129 0x0046 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -6664,7 +6664,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0074 //RX_SPK_VOL
+129 0x006C //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -6763,7 +6763,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00B1 //RX_SPK_VOL
+129 0x00A4 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -6788,7 +6788,7 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0109 //RX_TDDRC_DRC_GAIN
+124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
39 0x8474 //RX_FDEQ_GAIN_0
40 0x6864 //RX_FDEQ_GAIN_1
@@ -6862,7 +6862,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
+129 0x00F8 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -6887,7 +6887,7 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0197 //RX_TDDRC_DRC_GAIN
+124 0x018D //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
39 0x8474 //RX_FDEQ_GAIN_0
40 0x6864 //RX_FDEQ_GAIN_1
@@ -6986,7 +6986,7 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x02AA //RX_TDDRC_DRC_GAIN
+124 0x0284 //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
39 0x8470 //RX_FDEQ_GAIN_0
40 0x6468 //RX_FDEQ_GAIN_1
@@ -8021,7 +8021,7 @@
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
2 0x00F3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0000 //TX_SAMPLINGFREQ_SIG
@@ -8170,7 +8170,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x7A00 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x0200 //TX_MIN_EQ_RE_EST_0
+152 0x1000 //TX_MIN_EQ_RE_EST_0
153 0x0200 //TX_MIN_EQ_RE_EST_1
154 0x0200 //TX_MIN_EQ_RE_EST_2
155 0x0200 //TX_MIN_EQ_RE_EST_3
@@ -8183,7 +8183,7 @@
162 0x4000 //TX_MIN_EQ_RE_EST_10
163 0x6000 //TX_MIN_EQ_RE_EST_11
164 0x7FFF //TX_MIN_EQ_RE_EST_12
-165 0x2000 //TX_LAMBDA_RE_EST
+165 0x4000 //TX_LAMBDA_RE_EST
166 0x0000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x2000 //TX_GAIN_NP
@@ -8241,18 +8241,18 @@
220 0x0000 //TX_DTD_MIC_BLK
221 0x1000 //TX_ADPT_STRICT_L
222 0x1000 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+225 0x044C //TX_RATIO_DT_L_TH_HIGH
226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x1800 //TX_B_POST_FILT_ECHO_L
+227 0x0001 //TX_RATIO_DT_L0_TH
+228 0x4000 //TX_B_POST_FILT_ECHO_L
229 0x2000 //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+234 0x0118 //TX_RATIO_DT_L0_TH_HIGH
235 0x3A98 //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -8378,7 +8378,7 @@
357 0x0FA0 //TX_DT_BINVAD_ENDF
358 0x0400 //TX_C_POST_FLT_DT
359 0x4000 //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
+360 0x0120 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
362 0x0005 //TX_BF_DVG_TH
363 0x001E //TX_SN_C_F
@@ -8419,7 +8419,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0004 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -8961,9 +8961,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0A98 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE0C0 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -8981,7 +8981,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x207C //RX_RECVFUNC_MODE_0
+0 0x247C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0000 //RX_SAMPLINGFREQ_SIG
3 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -8991,7 +8991,7 @@
7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
+10 0x065B //RX_PGA
11 0x7652 //RX_A_HP
12 0x4000 //RX_B_PE
13 0x7800 //RX_THR_PITCH_DET_0
@@ -9107,9 +9107,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x01E3 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
+126 0x13E0 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0B50 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -9163,16 +9163,16 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x7862 //RX_FDEQ_GAIN_1
-41 0x686A //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x726E //RX_FDEQ_GAIN_4
-44 0x6C5C //RX_FDEQ_GAIN_5
-45 0x5648 //RX_FDEQ_GAIN_6
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x6C5C //RX_FDEQ_GAIN_1
+41 0x6870 //RX_FDEQ_GAIN_2
+42 0x7878 //RX_FDEQ_GAIN_3
+43 0x746A //RX_FDEQ_GAIN_4
+44 0x6448 //RX_FDEQ_GAIN_5
+45 0x5C48 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+47 0x4444 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -9235,7 +9235,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x006A //RX_SPK_VOL
+129 0x005D //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -9262,16 +9262,16 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x7862 //RX_FDEQ_GAIN_1
-41 0x686A //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x726E //RX_FDEQ_GAIN_4
-44 0x6C5C //RX_FDEQ_GAIN_5
-45 0x5648 //RX_FDEQ_GAIN_6
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x6C5C //RX_FDEQ_GAIN_1
+41 0x6870 //RX_FDEQ_GAIN_2
+42 0x7878 //RX_FDEQ_GAIN_3
+43 0x746A //RX_FDEQ_GAIN_4
+44 0x6448 //RX_FDEQ_GAIN_5
+45 0x5C48 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+47 0x4444 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -9334,7 +9334,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x009E //RX_SPK_VOL
+129 0x008B //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -9361,16 +9361,16 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x7862 //RX_FDEQ_GAIN_1
-41 0x686A //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x726E //RX_FDEQ_GAIN_4
-44 0x6C5C //RX_FDEQ_GAIN_5
-45 0x5648 //RX_FDEQ_GAIN_6
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x6C5C //RX_FDEQ_GAIN_1
+41 0x6870 //RX_FDEQ_GAIN_2
+42 0x7878 //RX_FDEQ_GAIN_3
+43 0x746A //RX_FDEQ_GAIN_4
+44 0x6448 //RX_FDEQ_GAIN_5
+45 0x5C48 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+47 0x4444 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -9433,7 +9433,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00EF //RX_SPK_VOL
+129 0x00D1 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -9458,18 +9458,18 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x016B //RX_TDDRC_DRC_GAIN
+124 0x013B //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x7862 //RX_FDEQ_GAIN_1
-41 0x686A //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x726E //RX_FDEQ_GAIN_4
-44 0x6C5C //RX_FDEQ_GAIN_5
-45 0x5648 //RX_FDEQ_GAIN_6
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x6C5C //RX_FDEQ_GAIN_1
+41 0x6870 //RX_FDEQ_GAIN_2
+42 0x7878 //RX_FDEQ_GAIN_3
+43 0x746A //RX_FDEQ_GAIN_4
+44 0x6448 //RX_FDEQ_GAIN_5
+45 0x5C48 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+47 0x4444 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -9557,18 +9557,18 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x023E //RX_TDDRC_DRC_GAIN
+124 0x0205 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x7862 //RX_FDEQ_GAIN_1
-41 0x686A //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x726E //RX_FDEQ_GAIN_4
-44 0x6C5C //RX_FDEQ_GAIN_5
-45 0x5648 //RX_FDEQ_GAIN_6
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x6C5C //RX_FDEQ_GAIN_1
+41 0x6870 //RX_FDEQ_GAIN_2
+42 0x7878 //RX_FDEQ_GAIN_3
+43 0x746A //RX_FDEQ_GAIN_4
+44 0x6448 //RX_FDEQ_GAIN_5
+45 0x5C48 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+47 0x4444 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -9656,18 +9656,18 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x02AA //RX_TDDRC_DRC_GAIN
+124 0x02C2 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x785C //RX_FDEQ_GAIN_1
-41 0x6068 //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x7478 //RX_FDEQ_GAIN_4
-44 0x705C //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4840 //RX_FDEQ_GAIN_7
-47 0x3C3C //RX_FDEQ_GAIN_8
-48 0x3438 //RX_FDEQ_GAIN_9
+39 0x8484 //RX_FDEQ_GAIN_0
+40 0x7A60 //RX_FDEQ_GAIN_1
+41 0x5C6A //RX_FDEQ_GAIN_2
+42 0x727C //RX_FDEQ_GAIN_3
+43 0x7480 //RX_FDEQ_GAIN_4
+44 0x7050 //RX_FDEQ_GAIN_5
+45 0x4E3E //RX_FDEQ_GAIN_6
+46 0x3838 //RX_FDEQ_GAIN_7
+47 0x3434 //RX_FDEQ_GAIN_8
+48 0x3030 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -9755,18 +9755,18 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0478 //RX_TDDRC_DRC_GAIN
+124 0x0504 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x785C //RX_FDEQ_GAIN_1
-41 0x6068 //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x7478 //RX_FDEQ_GAIN_4
-44 0x705C //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4840 //RX_FDEQ_GAIN_7
-47 0x3C3C //RX_FDEQ_GAIN_8
-48 0x3438 //RX_FDEQ_GAIN_9
+39 0x8484 //RX_FDEQ_GAIN_0
+40 0x7A60 //RX_FDEQ_GAIN_1
+41 0x5C6A //RX_FDEQ_GAIN_2
+42 0x727C //RX_FDEQ_GAIN_3
+43 0x7480 //RX_FDEQ_GAIN_4
+44 0x7050 //RX_FDEQ_GAIN_5
+45 0x4E3E //RX_FDEQ_GAIN_6
+46 0x3838 //RX_FDEQ_GAIN_7
+47 0x3434 //RX_FDEQ_GAIN_8
+48 0x3030 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -18700,9 +18700,9 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x0073 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0003 //TX_SAMPLINGFREQ_SIG
7 0x0003 //TX_SAMPLINGFREQ_PROC
@@ -18850,7 +18850,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x7600 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x2000 //TX_MIN_EQ_RE_EST_0
+152 0x1000 //TX_MIN_EQ_RE_EST_0
153 0x0600 //TX_MIN_EQ_RE_EST_1
154 0x3000 //TX_MIN_EQ_RE_EST_2
155 0x3000 //TX_MIN_EQ_RE_EST_3
@@ -18867,7 +18867,7 @@
166 0x3000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x4000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x0270 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
171 0x0880 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
@@ -18911,7 +18911,7 @@
210 0x5000 //TX_DTD_THR2_6
211 0x7FFF //TX_DTD_THR3
212 0x0000 //TX_SPK_CUT_K
-213 0x36B0 //TX_DT_CUT_K
+213 0x1770 //TX_DT_CUT_K
214 0x0100 //TX_DT_CUT_THR
215 0x04EB //TX_COMFORT_G
216 0x01F4 //TX_POWER_YOUT_TH
@@ -18923,8 +18923,8 @@
222 0x023E //TX_ADPT_STRICT_H
223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x07D0 //TX_RATIO_DT_L_TH_HIGH
-226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+225 0x02BC //TX_RATIO_DT_L_TH_HIGH
+226 0x5208 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -18932,7 +18932,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x02BC //TX_RATIO_DT_L0_TH_HIGH
+234 0x0190 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -18980,12 +18980,12 @@
279 0x2000 //TX_B_POST_FLT_0
280 0x1000 //TX_B_POST_FLT_1
281 0x0010 //TX_NS_LVL_CTRL_0
-282 0x003C //TX_NS_LVL_CTRL_1
+282 0x001A //TX_NS_LVL_CTRL_1
283 0x0024 //TX_NS_LVL_CTRL_2
-284 0x003C //TX_NS_LVL_CTRL_3
+284 0x001A //TX_NS_LVL_CTRL_3
285 0x0014 //TX_NS_LVL_CTRL_4
286 0x0011 //TX_NS_LVL_CTRL_5
-287 0x003C //TX_NS_LVL_CTRL_6
+287 0x001A //TX_NS_LVL_CTRL_6
288 0x0011 //TX_NS_LVL_CTRL_7
289 0x0020 //TX_MIN_GAIN_S_0
290 0x0020 //TX_MIN_GAIN_S_1
@@ -19045,7 +19045,7 @@
344 0x7F00 //TX_LAMBDA_PFILT_S_5
345 0x7F00 //TX_LAMBDA_PFILT_S_6
346 0x7F00 //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
+347 0x1000 //TX_K_PEPPER
348 0x0400 //TX_A_PEPPER
349 0x1EAA //TX_K_PEPPER_HF
350 0x0600 //TX_A_PEPPER_HF
@@ -19099,7 +19099,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -19468,13 +19468,13 @@
767 0x0050 //TX_MIC_CALIBRATION_2
768 0x0050 //TX_MIC_CALIBRATION_3
769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
775 0x000F //TX_GAIN_LIMIT_2
-776 0x0000 //TX_GAIN_LIMIT_3
+776 0x000F //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
778 0x7FDE //TX_BVE_VAD0_ALPHAUP
779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
@@ -19641,9 +19641,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x0000 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE4A8 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -19661,14 +19661,14 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x207C //RX_RECVFUNC_MODE_0
+0 0x047C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0003 //RX_SAMPLINGFREQ_SIG
3 0x0003 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
6 0x6000 //RX_TDDRC_ALPHA_UP_1
-7 0x6000 //RX_TDDRC_ALPHA_UP_2
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
10 0x0800 //RX_PGA
@@ -19690,32 +19690,32 @@
26 0x0190 //RX_FENS_RESRV_1
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
30 0x0002 //RX_EXTRA_NS_L
31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
33 0x7214 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
35 0x199A //RX_A_POST_FLT
36 0x0000 //RX_LMT_THRD
37 0x4000 //RX_LMT_ALPHA
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4340 //RX_FDEQ_GAIN_2
-42 0x3F3D //RX_FDEQ_GAIN_3
-43 0x3935 //RX_FDEQ_GAIN_4
-44 0x3635 //RX_FDEQ_GAIN_5
-45 0x3E46 //RX_FDEQ_GAIN_6
-46 0x494C //RX_FDEQ_GAIN_7
-47 0x4E56 //RX_FDEQ_GAIN_8
-48 0x5F5B //RX_FDEQ_GAIN_9
-49 0x5B48 //RX_FDEQ_GAIN_10
-50 0x4856 //RX_FDEQ_GAIN_11
-51 0x5B60 //RX_FDEQ_GAIN_12
-52 0x7476 //RX_FDEQ_GAIN_13
-53 0x7F7C //RX_FDEQ_GAIN_14
-54 0x7068 //RX_FDEQ_GAIN_15
+39 0x8462 //RX_FDEQ_GAIN_0
+40 0x5A5A //RX_FDEQ_GAIN_1
+41 0x5A5A //RX_FDEQ_GAIN_2
+42 0x645C //RX_FDEQ_GAIN_3
+43 0x5A54 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x585C //RX_FDEQ_GAIN_6
+46 0x4C48 //RX_FDEQ_GAIN_7
+47 0x5658 //RX_FDEQ_GAIN_8
+48 0x5C5A //RX_FDEQ_GAIN_9
+49 0x544C //RX_FDEQ_GAIN_10
+50 0x484E //RX_FDEQ_GAIN_11
+51 0x5448 //RX_FDEQ_GAIN_12
+52 0x5068 //RX_FDEQ_GAIN_13
+53 0x6064 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
57 0x4848 //RX_FDEQ_GAIN_18
@@ -19724,22 +19724,22 @@
60 0x4848 //RX_FDEQ_GAIN_21
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0209 //RX_FDEQ_BIN_5
-69 0x0808 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
+68 0x0605 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E32 //RX_FDEQ_BIN_11
+75 0x1423 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -19773,23 +19773,23 @@
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
111 0x0003 //RX_FILTINDX
-112 0x0002 //RX_TDDRC_THRD_0
-113 0x0004 //RX_TDDRC_THRD_1
-114 0x1500 //RX_TDDRC_THRD_2
-115 0x1500 //RX_TDDRC_THRD_3
-116 0x3000 //RX_TDDRC_SLANT_0
-117 0x6E00 //RX_TDDRC_SLANT_1
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x6000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x02FD //RX_TDDRC_DRC_GAIN
+124 0x0109 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
+126 0x13E0 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0B50 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -19820,7 +19820,7 @@
156 0x0000 //RX_BWE_RESRV_2
#VOL 0
6 0x6000 //RX_TDDRC_ALPHA_UP_1
-7 0x6000 //RX_TDDRC_ALPHA_UP_2
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -19843,21 +19843,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -19872,15 +19872,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -19915,11 +19915,11 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0049 //RX_SPK_VOL
+129 0x004B //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
-7 0x6000 //RX_TDDRC_ALPHA_UP_2
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -19942,21 +19942,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -19971,15 +19971,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -20014,7 +20014,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0071 //RX_SPK_VOL
+129 0x0072 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -20041,21 +20041,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -20070,15 +20070,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -20113,11 +20113,11 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00AD //RX_SPK_VOL
+129 0x00AE //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
-7 0x6000 //RX_TDDRC_ALPHA_UP_2
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -20138,23 +20138,23 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0109 //RX_TDDRC_DRC_GAIN
+124 0x0110 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -20169,15 +20169,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -20216,7 +20216,7 @@
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
6 0x6000 //RX_TDDRC_ALPHA_UP_1
-7 0x6000 //RX_TDDRC_ALPHA_UP_2
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -20239,21 +20239,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x01AE //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -20268,15 +20268,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -20315,7 +20315,7 @@
130 0x0000 //RX_VOL_RESRV_0
#VOL 5
6 0x6000 //RX_TDDRC_ALPHA_UP_1
-7 0x6000 //RX_TDDRC_ALPHA_UP_2
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -20336,23 +20336,23 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0284 //RX_TDDRC_DRC_GAIN
+124 0x028B //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x8468 //RX_FDEQ_GAIN_0
-40 0x484C //RX_FDEQ_GAIN_1
-41 0x545A //RX_FDEQ_GAIN_2
-42 0x686A //RX_FDEQ_GAIN_3
-43 0x6860 //RX_FDEQ_GAIN_4
-44 0x5C4C //RX_FDEQ_GAIN_5
-45 0x5858 //RX_FDEQ_GAIN_6
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x7064 //RX_FDEQ_GAIN_4
+44 0x6050 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
46 0x4C4C //RX_FDEQ_GAIN_7
47 0x4C4C //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+48 0x4C48 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
52 0x5460 //RX_FDEQ_GAIN_13
-53 0x5C58 //RX_FDEQ_GAIN_14
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -20373,9 +20373,9 @@
71 0x0B07 //RX_FDEQ_BIN_8
72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E2D //RX_FDEQ_BIN_11
-75 0x1923 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -20438,20 +20438,20 @@
124 0x0478 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x8468 //RX_FDEQ_GAIN_0
-40 0x484C //RX_FDEQ_GAIN_1
-41 0x545A //RX_FDEQ_GAIN_2
-42 0x686A //RX_FDEQ_GAIN_3
-43 0x6860 //RX_FDEQ_GAIN_4
-44 0x5C4C //RX_FDEQ_GAIN_5
-45 0x5858 //RX_FDEQ_GAIN_6
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x7064 //RX_FDEQ_GAIN_4
+44 0x6050 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
46 0x4C4C //RX_FDEQ_GAIN_7
47 0x4C4C //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+48 0x4C48 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
52 0x5460 //RX_FDEQ_GAIN_13
-53 0x5C58 //RX_FDEQ_GAIN_14
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -20472,9 +20472,9 @@
71 0x0B07 //RX_FDEQ_BIN_8
72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E2D //RX_FDEQ_BIN_11
-75 0x1923 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -20512,7 +20512,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x027C //RX_RECVFUNC_MODE_0
+157 0x047C //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0003 //RX_SAMPLINGFREQ_SIG
160 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -20623,7 +20623,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0002 //RX_FILTINDX
+268 0x0003 //RX_FILTINDX
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
271 0x1A00 //RX_TDDRC_THRD_2
@@ -20638,9 +20638,9 @@
280 0x0CCD //RX_TDDRC_SMT_W
281 0x04BC //RX_TDDRC_DRC_GAIN
282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
+283 0x13E0 //RX_TPKA_FP
+284 0x0400 //RX_MIN_G_FP
+285 0x0B50 //RX_MAX_G_FP
286 0x0019 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
288 0x0000 //RX_MAXLEVEL_CNG
@@ -20671,45 +20671,45 @@
313 0x0000 //RX_BWE_RESRV_2
#VOL 0
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
-270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x04BC //RX_TDDRC_DRC_GAIN
+281 0x0100 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x484E //RX_FDEQ_GAIN_0
-197 0x4E4E //RX_FDEQ_GAIN_1
-198 0x4E4E //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x484E //RX_FDEQ_GAIN_4
-201 0x6E4E //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6666 //RX_FDEQ_GAIN_11
-208 0x6666 //RX_FDEQ_GAIN_12
-209 0x6666 //RX_FDEQ_GAIN_13
-210 0x6060 //RX_FDEQ_GAIN_14
-211 0x6060 //RX_FDEQ_GAIN_15
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x685C //RX_FDEQ_GAIN_4
+201 0x5448 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x5048 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -20718,22 +20718,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0209 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -20766,49 +20766,49 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0019 //RX_SPK_VOL
+286 0x004B //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
-270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x04BC //RX_TDDRC_DRC_GAIN
+281 0x0100 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x484E //RX_FDEQ_GAIN_0
-197 0x4E4E //RX_FDEQ_GAIN_1
-198 0x4E4E //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x484E //RX_FDEQ_GAIN_4
-201 0x6E4E //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6666 //RX_FDEQ_GAIN_11
-208 0x6666 //RX_FDEQ_GAIN_12
-209 0x6666 //RX_FDEQ_GAIN_13
-210 0x6060 //RX_FDEQ_GAIN_14
-211 0x6060 //RX_FDEQ_GAIN_15
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x685C //RX_FDEQ_GAIN_4
+201 0x5448 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x5048 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -20817,22 +20817,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0209 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -20865,49 +20865,49 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0023 //RX_SPK_VOL
+286 0x0072 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
-270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x04BC //RX_TDDRC_DRC_GAIN
+281 0x0100 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x484E //RX_FDEQ_GAIN_0
-197 0x4E4E //RX_FDEQ_GAIN_1
-198 0x4E4E //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x484E //RX_FDEQ_GAIN_4
-201 0x6E4E //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6666 //RX_FDEQ_GAIN_11
-208 0x6666 //RX_FDEQ_GAIN_12
-209 0x6666 //RX_FDEQ_GAIN_13
-210 0x6060 //RX_FDEQ_GAIN_14
-211 0x6060 //RX_FDEQ_GAIN_15
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x685C //RX_FDEQ_GAIN_4
+201 0x5448 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x5048 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -20916,22 +20916,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0209 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -20964,49 +20964,49 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0032 //RX_SPK_VOL
+286 0x00AE //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
-270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x04BC //RX_TDDRC_DRC_GAIN
+281 0x0110 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x484E //RX_FDEQ_GAIN_0
-197 0x4E4E //RX_FDEQ_GAIN_1
-198 0x4E4E //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x484E //RX_FDEQ_GAIN_4
-201 0x6E4E //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6666 //RX_FDEQ_GAIN_11
-208 0x6666 //RX_FDEQ_GAIN_12
-209 0x6666 //RX_FDEQ_GAIN_13
-210 0x6060 //RX_FDEQ_GAIN_14
-211 0x6060 //RX_FDEQ_GAIN_15
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x685C //RX_FDEQ_GAIN_4
+201 0x5448 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x5048 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -21015,22 +21015,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0209 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -21063,49 +21063,49 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0048 //RX_SPK_VOL
+286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
+269 0x0000 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x04BC //RX_TDDRC_DRC_GAIN
+281 0x01AE //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x484E //RX_FDEQ_GAIN_0
-197 0x4E4E //RX_FDEQ_GAIN_1
-198 0x4E4E //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x484E //RX_FDEQ_GAIN_4
-201 0x6E4E //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6666 //RX_FDEQ_GAIN_11
-208 0x6666 //RX_FDEQ_GAIN_12
-209 0x6666 //RX_FDEQ_GAIN_13
-210 0x6060 //RX_FDEQ_GAIN_14
-211 0x6060 //RX_FDEQ_GAIN_15
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x685C //RX_FDEQ_GAIN_4
+201 0x5448 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x5048 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -21114,22 +21114,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0209 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -21162,49 +21162,49 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0068 //RX_SPK_VOL
+286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
+269 0x0000 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x04BC //RX_TDDRC_DRC_GAIN
+281 0x028B //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x484E //RX_FDEQ_GAIN_0
-197 0x4E4E //RX_FDEQ_GAIN_1
-198 0x4E4E //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x484E //RX_FDEQ_GAIN_4
-201 0x6E4E //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6666 //RX_FDEQ_GAIN_11
-208 0x6666 //RX_FDEQ_GAIN_12
-209 0x6666 //RX_FDEQ_GAIN_13
-210 0x6060 //RX_FDEQ_GAIN_14
-211 0x6060 //RX_FDEQ_GAIN_15
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x7064 //RX_FDEQ_GAIN_4
+201 0x6050 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x4C48 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -21213,22 +21213,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0209 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -21261,49 +21261,49 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0097 //RX_SPK_VOL
+286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
-270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+270 0x0006 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x04BC //RX_TDDRC_DRC_GAIN
+281 0x0478 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x484E //RX_FDEQ_GAIN_0
-197 0x4E4E //RX_FDEQ_GAIN_1
-198 0x4E4E //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x484E //RX_FDEQ_GAIN_4
-201 0x6E4E //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6666 //RX_FDEQ_GAIN_11
-208 0x6666 //RX_FDEQ_GAIN_12
-209 0x6666 //RX_FDEQ_GAIN_13
-210 0x6060 //RX_FDEQ_GAIN_14
-211 0x6060 //RX_FDEQ_GAIN_15
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x7064 //RX_FDEQ_GAIN_4
+201 0x6050 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x4C48 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -21312,22 +21312,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0209 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
diff --git a/audio/cheetah/tuning/fortemedia/HEADSET.dat b/audio/cheetah/tuning/fortemedia/HEADSET.dat
index 38055faae118eca0ced6daee721493905d6487fe..ea4615c7bc9c2c8d2c4a880d8a73231dcd4139dc 100644
GIT binary patch
delta 7036
zcmeHLeQZ<L6~FhM7w5&0!~+vba2$(9A#ohzh74t)VqVl{CU~hAtj;ZNa0vppiW-Zd
z5n4ArZZeXQc8%tV3#~M<!rFbHWFdk_86Vr4FK9?9(kg*A5()*1x~^JBSE{MnaU4pO
zMlA$~Ak;rjZr*!7=XcM&=brOB_r(jwPcgGC0|Kb)oU<sM=X80}U&`k>jqjIe@0ajb
z_p5cl7*iO?2M)q_wNoGQRKX4M;$^;&JEiGke%{X65ZhWh%-qTuW~qFKadwt5=Q+kK
z?=mLNGiJCzCN7e^$L`{q<G=i4&Mk7KTNKEuE4)5h*=W>GU*W4&J>wnl=ixs>Xm<2?
zYem=IJ@uI~ElZemKW2i3>oiA}s1gFRWmC2&6WfLC&lYc|U7diJpJ6Tc%Uu>>7Cxa3
zSj4}$>RiK*O<&6~hBsH9o+ny(lD774u_2E3+jF0zRSm__rpvwM!l3&o4mnURmd8A{
zEEQ$?koX<zXTN8tM$xuLo>(fJy3p*uF~*~9kRk0A!l*kS&M>tqK8rRkX%+=qv_eQO
zm_gdy;%&l*ABfkJQp=fuat0&{uxR$r^0bxtB8O|)Ua^9Yti`q2X&<P3bb4A<NZ5u%
zI49~!pZ%?X4)--ABMYd=3@NxmCp}A*40-4QaLCOYAx}1}083P7xL+>z!eLNYo&3u~
zaL<ghJd7;-G!D;fK&Cu{o@o+)2q$vaH_b<XZ61b#`B-0X#mCndplh`aUH(FJx$Jn~
zeGBm3d$)MuQ~rode;R76MwW{=pw&7dt+!%YEA5ME*4K}x8GZy-E~^`1x@`CZ<k*wM
z#MB-3zm94)(eebI%)`h1`50bjMWp5NglxE^vJgv3>{wj903D7P@FFgM-cFcGQXKR8
zH3g4WZd3IlxrMJ6w$!lLg39dZhHW$Dzio<94xWU&Wcw!i^VvzrGaK3Kh}exj>_M-$
z7yaHo+OU4wtRv|1$<QP4V019sFCPwoSN^0Lif6IpIT04lj4;bw5>o_ORwP3nu7>Th
zu^Q&ji+#Tlt2{$?1fXPM%JM`xH_4*`$eNfwx8DRf|K80g`)@{h^Td?3&5uD_Ivsv#
z+6cKirs`2VC2;_(GHnMqwcQ)R$7i&Ud$<R+OHV-#=j9rmrDo1+N5`G<QGCLrqY+9+
zjtYNXdj_F~%fW|8rAd3C5&DD(3+dYgxzSDA^5xJ;NREY}%j^sGpwHJ!(uaP3KYD#f
z(Cs~nZuc7)aBIe9DB`m^bYBiSWAp`cNWRemGmZNiUZXs=pX4AK*BwHp9!8nb0uF0T
z(L^yG3{s4LC6Xkh&$v<6?SZ)oG?<xSgYr-fq{t0>66*E0zh;u=tIJql-;K5PJy=`Y
zi>p@kVc=ofuqQRO8T6d{5@O}2iLfG1KL#dkOB5_4(Z26x$Q4W-Q{1$)S1CFHsHpvV
zITf{(@#B7pg-TSAGPl>8ht<A(e4^Hh{vZ`LuZ<$MkRsJivH)Ek2j$Is@IhA*eOrhD
zZ!wMXxgAiYFECVKQTj486Bl>|HuGh%ic~Wxrq@lL>GqiEm1PE6s01&Ha~Jf+QirWH
zfh$c$FO{`Y?HzBjt3y<K17mj3eO)_9cK6GQ6;M3x{@sLOPY1jlOOyZUh{x-PHX>tJ
zE4H)LLW!)>)s2;vJtVypY<=|HkCjgxL67SwJyXhb4PbEnF$@F-am|`HNsg1qz$sWH
ztD8ZUzd8jzd8ip4m4E7l`LhlvU(T#^z9zHo?gYn@m}254)X)l{@w4tEfRXoJe)m`8
znaRQ|ngUGM6krCY08`$2%y^Y4ItZQlQ`zZi=P$!AGjBzgt38{o5Ylbd+?tmv;Y-mE
z!YN$s@-Ht)=So-0s>P`^bk`N7ibvJ1fh+WuX`iT^UNddy0lqMmemv&2u|~vR%U$K-
zcJndXuqx#X4isl_a;!$xO#c)kp1J-fMm%du0s633)t-xjm8g#*zo9;fA#C4JpAqsp
z$<#-=CDg~uL3VV)!q3Ui@JzbPP)rfew5-So`T0&@2Q`yB>0<0RbTRe{{lAaoHG1BU
z%z3TJWGpozSX#sh>5<{-h6rPF`))9oGae^L!KQ9%8+xd1=%u!S8r&dVt$2@6+YoPX
z-R=Qu8;%ik8>F`3P5O46+J?7iJb_!c{^I-dmT>qxCh>nDh|`!PhEP$4QI~WE4az&H
zPdbaq)6QYqjCV23a2^W`7pTd&NKM9jSZKb4&O+JN49}J=V`iFJc7)wgUah+$y=qU8
zSBBdu0%Jr;ExnQOQ^q+|?RSPt%ycbJw2JZb#OhE#HK$|pgnN?n#EtEepwy=u-K8(O
zR6p7mj!k`2=8{1KZ%a-miMPf`-G`Tnv+4Dt_w`P;7nK+d)oO>85pFlmcWdhZ0Y#Mp
A1^@s6
delta 3928
zcmc&%Yitx%6u$SK-Dz2&TP)iLly<GPFP65-1{c}X5t_Qx39jv?F0#s~HLlpmstp#|
z>Zv7CgaqOcFX#`6CYa!Z){2wh1EWA+OI!SbuY}e_3;IL;h(<_^XSyOj_6H_i{c*FI
znLFP(_nh;6-_8Y`|Kgc>yK(`S*!v2WI*lWTx{dui=JiiG?UlybiF{-Ej-2k?WoGU&
z-g!8)1{h;D2J-d~;AVNc*Pbx<|HyCQT*$NM`4aAyg+K8r<85#i<bT7M`&-7u6l2+E
z=(V%7zGFQ(X6?`XCvH4elP~Lj;X61tM}FZ?WIFaZ4ib7VxK|tF+Z+4eJ=8H@W-Szj
z$`U46yvD3uD4K*|LT)J*D+F>mSS(IuorMXu=cY;4VgH(4Tq)mhiz0Cr%!FH<<2+M_
zHBll@mxvw;^We3D!pPZw3DY!@3^Q9E24%K`GtT;x@e&Q9S<s2xtCHbr`|WRu-lcM~
z-(IbZXMD{*Uo#z!zb{AJ!eg#`$1b_RI_c5GDGE3CuKg2xfyxA^44{G8=yY~)GKE$K
zFms|wyd)ggWL-)}29MaA&7U**hUs(9Hk)F?Ga=gCM$nl@ZEz}Jb6~?pi3zBZS+7FA
z{5Sy>Rr6RGB9>ziD^LwoqN-M5tbP&teIE4t7o*o(jheRxBVi*uyHSCRm8jSZJ-bB~
zHA85Yjcq`|VrVnAFJI(nnG;7A@5J46r8Wwi<<8Bpw#bSQ-%^hEbyVQ`XeD;ESK%X%
zEy75f2Lmle_T;T{a}bX3_0ri1_h0e$m;c@NbJq5CB@gpBUO_@@?}Cf6tO-g>>ckbj
zaNC{q!sr?(g##ikT|v0Up$4j{f;H&#N;L=<_#IXTHL`In)Ix{tADhhVJ3(+`_1;W}
z$mrqi!ZXKT`U2YWj3@Rw?O=Ni8)R`Wtdzfg0TooGPpEB2F@(o37(9;Q-~h%VgBS=5
zp%##_yP-v~DU;MInYbHHyD+1mi^b=6?Vh`!i`fdhSmwemmppP0>@%7h%d4%&mmq@#
zsRoYIBn)6w8$`c4gg*Z;)_O<KUz@<7X6!m=O~NJg1N>@vPzT>kAT5|Nq_P=9y74kn
z%be78iq%t{d_&alVPeb(F(zR#=I?d#%ox%gGlgWHehB<d(g|6(3CgBLLTvs+BvkY5
zO%Ub|Nwl$u9d}I=+azK?&ADdML~rHthtFV^nb&FE>YJt+%;IsgZxdX{Wpy|B<x{T{
zF$m-GJ)IvgcXq>o5dKmbeiq6E*d#s+8?SDS9>Z9SCR!iB2u*aT$JBR%gUh%2V2&*A
zfpUlI_hF`NdcGo=8R>x>IjqA%d%m-a<-f2EO6shME+mpfB1bV0I!45xi4F|VFOfta
zLRA|^pE`m8KXoc}0$Zb_7><phzkVEjKB;em@A+K0;SelH1G1dzhr%@A^3rr=%)Kd*
zmtB>tax{7rBh<KP^f+pv0Su9DXt89KRjP8NK7mpF1T}UP+v8)X>*LtgmaMWbZOD2W
zkj-7sLs_=Pm+=+$JUR9XB%QUp^AFP0-xMXg(*hNESE!OKuL||(BGe)t42Kt^rjem)
zH8hB|w63Rh0}bdB)I(kjM`SEdX>u&iYQ$>`Zo?v%bnl1f<f$hid)i$bTgZ+qBJOi0
z9rkvYvd-L?qqsR=CC74=2Y<ha{rTd}%cOiXNBI*eJ;~h`Nn7jO<kK^lxcUYho;JG`
zWOg{i;K76NilrQr3F<+OTd{iZ8d4A3z3_+}&E>Aj_z;zLnAQmD0h+${6I6cUcz6s$
zk#Q>dNqY7vUCY|7uvBD%-1jB4$Pc%|z4E<2D0c<zNz2^lylk2CjGaZXRC?23>5ZH8
z#$rN%m|*FR*E@i!ZxDTC%JrdP(iX~v^hR$bz0pTWo5oNLjg!-!q?Iz4P-+oMTewup
zl(t~}x>N*BU$~_y!&#nwsdGWAbM$x0?<1#B2T>&rt0$)jQ0JmFMX~q^jFX17b<h;G
zj-#fZB%l8jvHc%Y6iO|b4QUIv=07{#>Ix-d7JUH6D*wYzI&<ng?4F<2&pGp%VjG3{
SzrNr;dO&G5%U9VR|Nb}B?2l6b
diff --git a/audio/cheetah/tuning/fortemedia/HEADSET.mods b/audio/cheetah/tuning/fortemedia/HEADSET.mods
index b83c7f54..18d20c13 100644
--- a/audio/cheetah/tuning/fortemedia/HEADSET.mods
+++ b/audio/cheetah/tuning/fortemedia/HEADSET.mods
@@ -1,7 +1,7 @@
#PLATFORM_NAME gChip
#EXPORT_FLAG HEADSET
#SINGLE_API_VER 1.2.1
-#SAVE_TIME 2022-04-01 12:45:38
+#SAVE_TIME 2022-04-15 16:37:55
#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
#PARAM_MODE FULL
@@ -971,7 +971,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x202C //RX_RECVFUNC_MODE_0
+0 0x242C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0000 //RX_SAMPLINGFREQ_SIG
3 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -3641,7 +3641,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x202C //RX_RECVFUNC_MODE_0
+0 0x242C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0001 //RX_SAMPLINGFREQ_SIG
3 0x0001 //RX_SAMPLINGFREQ_PROC
@@ -16024,7 +16024,7 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB
-#PARAM_MODE Full
+#PARAM_MODE FULL
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -18694,7 +18694,7 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB
-#PARAM_MODE Full
+#PARAM_MODE FULL
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -32051,7 +32051,7 @@
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
2 0x00F3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0000 //TX_SAMPLINGFREQ_SIG
@@ -32200,7 +32200,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x7A00 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x0200 //TX_MIN_EQ_RE_EST_0
+152 0x1000 //TX_MIN_EQ_RE_EST_0
153 0x0200 //TX_MIN_EQ_RE_EST_1
154 0x0200 //TX_MIN_EQ_RE_EST_2
155 0x0200 //TX_MIN_EQ_RE_EST_3
@@ -32213,7 +32213,7 @@
162 0x4000 //TX_MIN_EQ_RE_EST_10
163 0x6000 //TX_MIN_EQ_RE_EST_11
164 0x7FFF //TX_MIN_EQ_RE_EST_12
-165 0x2000 //TX_LAMBDA_RE_EST
+165 0x4000 //TX_LAMBDA_RE_EST
166 0x0000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x2000 //TX_GAIN_NP
@@ -32271,18 +32271,18 @@
220 0x0000 //TX_DTD_MIC_BLK
221 0x1000 //TX_ADPT_STRICT_L
222 0x1000 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+225 0x044C //TX_RATIO_DT_L_TH_HIGH
226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x1800 //TX_B_POST_FILT_ECHO_L
+227 0x0001 //TX_RATIO_DT_L0_TH
+228 0x4000 //TX_B_POST_FILT_ECHO_L
229 0x2000 //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+234 0x0118 //TX_RATIO_DT_L0_TH_HIGH
235 0x3A98 //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -32408,7 +32408,7 @@
357 0x0FA0 //TX_DT_BINVAD_ENDF
358 0x0400 //TX_C_POST_FLT_DT
359 0x4000 //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
+360 0x0120 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
362 0x0005 //TX_BF_DVG_TH
363 0x001E //TX_SN_C_F
@@ -32449,7 +32449,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0004 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -32991,9 +32991,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0A98 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE0C0 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -34720,8 +34720,8 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x0073 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0001 //TX_SAMPLINGFREQ_SIG
@@ -34870,7 +34870,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x6800 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x0200 //TX_MIN_EQ_RE_EST_0
+152 0x1F80 //TX_MIN_EQ_RE_EST_0
153 0x0100 //TX_MIN_EQ_RE_EST_1
154 0x0200 //TX_MIN_EQ_RE_EST_2
155 0x0200 //TX_MIN_EQ_RE_EST_3
@@ -34887,7 +34887,7 @@
166 0x4000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x5000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x02A0 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
171 0x06B0 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
@@ -34941,10 +34941,10 @@
220 0x0000 //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x03E8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x0578 //TX_RATIO_DT_L_TH_HIGH
-226 0x43FB //TX_RATIO_DT_H_TH_HIGH
+225 0x0154 //TX_RATIO_DT_L_TH_HIGH
+226 0x4588 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -34952,7 +34952,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH
+234 0x0258 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -35076,9 +35076,9 @@
355 0x0200 //TX_DT_BINVAD_TH_2
356 0x0800 //TX_DT_BINVAD_TH_3
357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0800 //TX_C_POST_FLT_DT
+358 0x4000 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0140 //TX_DT_BOOST
+360 0x0180 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
362 0x0005 //TX_BF_DVG_TH
363 0x001E //TX_SN_C_F
@@ -35119,7 +35119,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x4000 //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -35661,9 +35661,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0C97 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE4A8 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -37390,8 +37390,8 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x00B3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0003 //TX_SAMPLINGFREQ_SIG
@@ -37540,7 +37540,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x7600 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x2000 //TX_MIN_EQ_RE_EST_0
+152 0x1000 //TX_MIN_EQ_RE_EST_0
153 0x0600 //TX_MIN_EQ_RE_EST_1
154 0x3000 //TX_MIN_EQ_RE_EST_2
155 0x3000 //TX_MIN_EQ_RE_EST_3
@@ -37557,7 +37557,7 @@
166 0x3000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x4000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x0270 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
171 0x0880 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
@@ -37601,7 +37601,7 @@
210 0x5000 //TX_DTD_THR2_6
211 0x7FFF //TX_DTD_THR3
212 0x0000 //TX_SPK_CUT_K
-213 0x36B0 //TX_DT_CUT_K
+213 0x1770 //TX_DT_CUT_K
214 0x0100 //TX_DT_CUT_THR
215 0x04EB //TX_COMFORT_G
216 0x01F4 //TX_POWER_YOUT_TH
@@ -37613,8 +37613,8 @@
222 0x023E //TX_ADPT_STRICT_H
223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x07D0 //TX_RATIO_DT_L_TH_HIGH
-226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+225 0x02BC //TX_RATIO_DT_L_TH_HIGH
+226 0x5208 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -37622,7 +37622,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x02BC //TX_RATIO_DT_L0_TH_HIGH
+234 0x0190 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -37735,7 +37735,7 @@
344 0x7F00 //TX_LAMBDA_PFILT_S_5
345 0x7F00 //TX_LAMBDA_PFILT_S_6
346 0x7F00 //TX_LAMBDA_PFILT_S_7
-347 0x3E80 //TX_K_PEPPER
+347 0x1000 //TX_K_PEPPER
348 0x0400 //TX_A_PEPPER
349 0x1EAA //TX_K_PEPPER_HF
350 0x0600 //TX_A_PEPPER_HF
@@ -37789,7 +37789,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -38158,13 +38158,13 @@
767 0x0050 //TX_MIC_CALIBRATION_2
768 0x0050 //TX_MIC_CALIBRATION_3
769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
775 0x000F //TX_GAIN_LIMIT_2
-776 0x0000 //TX_GAIN_LIMIT_3
+776 0x000F //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
778 0x7FDE //TX_BVE_VAD0_ALPHAUP
779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
@@ -38331,9 +38331,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0E21 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE4A8 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -54371,18 +54371,18 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x247C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0000 //RX_SAMPLINGFREQ_SIG
3 0x0000 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0403 //RX_PGA
-11 0x7646 //RX_A_HP
+10 0x065B //RX_PGA
+11 0x7652 //RX_A_HP
12 0x4000 //RX_B_PE
13 0x7800 //RX_THR_PITCH_DET_0
14 0x7000 //RX_THR_PITCH_DET_1
@@ -54399,8 +54399,8 @@
25 0x000A //RX_FENS_RESRV_0
26 0x0190 //RX_FENS_RESRV_1
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x4000 //RX_TDDRC_ALPHA_DWN_2
-29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
30 0x0002 //RX_EXTRA_NS_L
31 0x0800 //RX_EXTRA_NS_A
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
@@ -54410,16 +54410,16 @@
36 0x0000 //RX_LMT_THRD
37 0x4000 //RX_LMT_ALPHA
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8080 //RX_FDEQ_GAIN_0
-40 0x8050 //RX_FDEQ_GAIN_1
-41 0x4840 //RX_FDEQ_GAIN_2
-42 0x4040 //RX_FDEQ_GAIN_3
-43 0x4470 //RX_FDEQ_GAIN_4
-44 0x383C //RX_FDEQ_GAIN_5
-45 0x3C3C //RX_FDEQ_GAIN_6
-46 0x3434 //RX_FDEQ_GAIN_7
-47 0x344C //RX_FDEQ_GAIN_8
-48 0x585C //RX_FDEQ_GAIN_9
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x785C //RX_FDEQ_GAIN_1
+41 0x6068 //RX_FDEQ_GAIN_2
+42 0x7478 //RX_FDEQ_GAIN_3
+43 0x7478 //RX_FDEQ_GAIN_4
+44 0x705C //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -54434,16 +54434,16 @@
60 0x4848 //RX_FDEQ_GAIN_21
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0703 //RX_FDEQ_BIN_4
-68 0x0406 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
+63 0x0302 //RX_FDEQ_BIN_0
+64 0x0104 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0605 //RX_FDEQ_BIN_5
+69 0x0C08 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D08 //RX_FDEQ_BIN_9
+72 0x1407 //RX_FDEQ_BIN_9
73 0x0000 //RX_FDEQ_BIN_10
74 0x0000 //RX_FDEQ_BIN_11
75 0x0000 //RX_FDEQ_BIN_12
@@ -54483,23 +54483,23 @@
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
111 0x0004 //RX_FILTINDX
-112 0x0002 //RX_TDDRC_THRD_0
+112 0x0000 //RX_TDDRC_THRD_0
113 0x0004 //RX_TDDRC_THRD_1
-114 0x1800 //RX_TDDRC_THRD_2
-115 0x1800 //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0D56 //RX_TDDRC_DRC_GAIN
+124 0x01E3 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x1194 //RX_TPKA_FP
+126 0x13E0 //RX_TPKA_FP
127 0x0400 //RX_MIN_G_FP
-128 0x0800 //RX_MAX_G_FP
+128 0x0B50 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -54553,16 +54553,16 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x7862 //RX_FDEQ_GAIN_1
-41 0x686A //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x726E //RX_FDEQ_GAIN_4
-44 0x6C5C //RX_FDEQ_GAIN_5
-45 0x5648 //RX_FDEQ_GAIN_6
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x6C5C //RX_FDEQ_GAIN_1
+41 0x6870 //RX_FDEQ_GAIN_2
+42 0x7878 //RX_FDEQ_GAIN_3
+43 0x746A //RX_FDEQ_GAIN_4
+44 0x6448 //RX_FDEQ_GAIN_5
+45 0x5C48 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+47 0x4444 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -54625,7 +54625,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x006A //RX_SPK_VOL
+129 0x005D //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -54652,16 +54652,16 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x7862 //RX_FDEQ_GAIN_1
-41 0x686A //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x726E //RX_FDEQ_GAIN_4
-44 0x6C5C //RX_FDEQ_GAIN_5
-45 0x5648 //RX_FDEQ_GAIN_6
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x6C5C //RX_FDEQ_GAIN_1
+41 0x6870 //RX_FDEQ_GAIN_2
+42 0x7878 //RX_FDEQ_GAIN_3
+43 0x746A //RX_FDEQ_GAIN_4
+44 0x6448 //RX_FDEQ_GAIN_5
+45 0x5C48 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+47 0x4444 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -54724,7 +54724,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x009F //RX_SPK_VOL
+129 0x008B //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -54751,16 +54751,16 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x7862 //RX_FDEQ_GAIN_1
-41 0x686A //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x726E //RX_FDEQ_GAIN_4
-44 0x6C5C //RX_FDEQ_GAIN_5
-45 0x5648 //RX_FDEQ_GAIN_6
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x6C5C //RX_FDEQ_GAIN_1
+41 0x6870 //RX_FDEQ_GAIN_2
+42 0x7878 //RX_FDEQ_GAIN_3
+43 0x746A //RX_FDEQ_GAIN_4
+44 0x6448 //RX_FDEQ_GAIN_5
+45 0x5C48 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+47 0x4444 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -54823,7 +54823,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00EF //RX_SPK_VOL
+129 0x00D1 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -54848,18 +54848,18 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x016B //RX_TDDRC_DRC_GAIN
+124 0x013B //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x7862 //RX_FDEQ_GAIN_1
-41 0x686A //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x726E //RX_FDEQ_GAIN_4
-44 0x6C5C //RX_FDEQ_GAIN_5
-45 0x5648 //RX_FDEQ_GAIN_6
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x6C5C //RX_FDEQ_GAIN_1
+41 0x6870 //RX_FDEQ_GAIN_2
+42 0x7878 //RX_FDEQ_GAIN_3
+43 0x746A //RX_FDEQ_GAIN_4
+44 0x6448 //RX_FDEQ_GAIN_5
+45 0x5C48 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+47 0x4444 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -54935,8 +54935,8 @@
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
33 0x7214 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0002 //RX_TDDRC_THRD_0
-113 0x0006 //RX_TDDRC_THRD_1
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
114 0x0340 //RX_TDDRC_THRD_2
115 0x0CE0 //RX_TDDRC_THRD_3
116 0x0000 //RX_TDDRC_SLANT_0
@@ -54947,18 +54947,18 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x023E //RX_TDDRC_DRC_GAIN
+124 0x0205 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x7862 //RX_FDEQ_GAIN_1
-41 0x686A //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x726E //RX_FDEQ_GAIN_4
-44 0x6C5C //RX_FDEQ_GAIN_5
-45 0x5648 //RX_FDEQ_GAIN_6
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x6C5C //RX_FDEQ_GAIN_1
+41 0x6870 //RX_FDEQ_GAIN_2
+42 0x7878 //RX_FDEQ_GAIN_3
+43 0x746A //RX_FDEQ_GAIN_4
+44 0x6448 //RX_FDEQ_GAIN_5
+45 0x5C48 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+47 0x4444 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -55046,18 +55046,18 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x02AA //RX_TDDRC_DRC_GAIN
+124 0x02C2 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x785C //RX_FDEQ_GAIN_1
-41 0x6068 //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x7478 //RX_FDEQ_GAIN_4
-44 0x705C //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4840 //RX_FDEQ_GAIN_7
-47 0x3C3C //RX_FDEQ_GAIN_8
-48 0x3438 //RX_FDEQ_GAIN_9
+39 0x8484 //RX_FDEQ_GAIN_0
+40 0x7A60 //RX_FDEQ_GAIN_1
+41 0x5C6A //RX_FDEQ_GAIN_2
+42 0x727C //RX_FDEQ_GAIN_3
+43 0x7480 //RX_FDEQ_GAIN_4
+44 0x7050 //RX_FDEQ_GAIN_5
+45 0x4E3E //RX_FDEQ_GAIN_6
+46 0x3838 //RX_FDEQ_GAIN_7
+47 0x3434 //RX_FDEQ_GAIN_8
+48 0x3030 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -55120,7 +55120,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0051 //RX_SPK_VOL
+129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 6
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -55145,18 +55145,18 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0478 //RX_TDDRC_DRC_GAIN
+124 0x0504 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x847C //RX_FDEQ_GAIN_0
-40 0x785C //RX_FDEQ_GAIN_1
-41 0x6068 //RX_FDEQ_GAIN_2
-42 0x7478 //RX_FDEQ_GAIN_3
-43 0x7478 //RX_FDEQ_GAIN_4
-44 0x705C //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4840 //RX_FDEQ_GAIN_7
-47 0x3C3C //RX_FDEQ_GAIN_8
-48 0x3438 //RX_FDEQ_GAIN_9
+39 0x8484 //RX_FDEQ_GAIN_0
+40 0x7A60 //RX_FDEQ_GAIN_1
+41 0x5C6A //RX_FDEQ_GAIN_2
+42 0x727C //RX_FDEQ_GAIN_3
+43 0x7480 //RX_FDEQ_GAIN_4
+44 0x7050 //RX_FDEQ_GAIN_5
+45 0x4E3E //RX_FDEQ_GAIN_6
+46 0x3838 //RX_FDEQ_GAIN_7
+47 0x3434 //RX_FDEQ_GAIN_8
+48 0x3030 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -55222,7 +55222,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x243C //RX_RECVFUNC_MODE_0
+157 0x027C //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0000 //RX_SAMPLINGFREQ_SIG
160 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -55232,8 +55232,8 @@
164 0x1000 //RX_TDDRC_ALPHA_UP_2
165 0x1000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
-167 0x0403 //RX_PGA
-168 0x7646 //RX_A_HP
+167 0x0800 //RX_PGA
+168 0x7652 //RX_A_HP
169 0x4000 //RX_B_PE
170 0x7800 //RX_THR_PITCH_DET_0
171 0x7000 //RX_THR_PITCH_DET_1
@@ -55262,12 +55262,12 @@
194 0x4000 //RX_LMT_ALPHA
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8054 //RX_FDEQ_GAIN_1
-198 0x5050 //RX_FDEQ_GAIN_2
-199 0x5058 //RX_FDEQ_GAIN_3
-200 0x5C70 //RX_FDEQ_GAIN_4
+197 0x8058 //RX_FDEQ_GAIN_1
+198 0x5454 //RX_FDEQ_GAIN_2
+199 0x545C //RX_FDEQ_GAIN_3
+200 0x6448 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x484C //RX_FDEQ_GAIN_6
+202 0x5848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x485A //RX_FDEQ_GAIN_8
205 0x5A58 //RX_FDEQ_GAIN_9
@@ -55289,8 +55289,8 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0604 //RX_FDEQ_BIN_4
-225 0x0406 //RX_FDEQ_BIN_5
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -55346,12 +55346,12 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x0700 //RX_TDDRC_DRC_GAIN
282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x1194 //RX_TPKA_FP
-284 0x0400 //RX_MIN_G_FP
-285 0x0800 //RX_MAX_G_FP
-286 0x0015 //RX_SPK_VOL
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0016 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
288 0x0000 //RX_MAXLEVEL_CNG
289 0x3000 //RX_BWE_UV_TH
@@ -55392,8 +55392,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55402,18 +55402,18 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x0700 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4C68 //RX_FDEQ_GAIN_4
-201 0x403C //RX_FDEQ_GAIN_5
-202 0x3C38 //RX_FDEQ_GAIN_6
-203 0x3430 //RX_FDEQ_GAIN_7
-204 0x303C //RX_FDEQ_GAIN_8
-205 0x4C50 //RX_FDEQ_GAIN_9
+197 0x8058 //RX_FDEQ_GAIN_1
+198 0x5454 //RX_FDEQ_GAIN_2
+199 0x545C //RX_FDEQ_GAIN_3
+200 0x6448 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x5848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -55432,8 +55432,8 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
-225 0x0406 //RX_FDEQ_BIN_5
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -55476,7 +55476,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0012 //RX_SPK_VOL
+286 0x0016 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
163 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -55491,8 +55491,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55501,18 +55501,18 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x0700 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4C68 //RX_FDEQ_GAIN_4
-201 0x403C //RX_FDEQ_GAIN_5
-202 0x3C38 //RX_FDEQ_GAIN_6
-203 0x3430 //RX_FDEQ_GAIN_7
-204 0x303C //RX_FDEQ_GAIN_8
-205 0x4C50 //RX_FDEQ_GAIN_9
+197 0x8058 //RX_FDEQ_GAIN_1
+198 0x5454 //RX_FDEQ_GAIN_2
+199 0x545C //RX_FDEQ_GAIN_3
+200 0x6448 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x5848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -55531,8 +55531,8 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
-225 0x0406 //RX_FDEQ_BIN_5
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -55575,7 +55575,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x001B //RX_SPK_VOL
+286 0x0020 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
163 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -55590,8 +55590,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55600,18 +55600,18 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x0700 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4C68 //RX_FDEQ_GAIN_4
-201 0x403C //RX_FDEQ_GAIN_5
-202 0x3C38 //RX_FDEQ_GAIN_6
-203 0x3430 //RX_FDEQ_GAIN_7
-204 0x303C //RX_FDEQ_GAIN_8
-205 0x4C50 //RX_FDEQ_GAIN_9
+197 0x8058 //RX_FDEQ_GAIN_1
+198 0x5454 //RX_FDEQ_GAIN_2
+199 0x545C //RX_FDEQ_GAIN_3
+200 0x6448 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x5848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -55630,8 +55630,8 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
-225 0x0406 //RX_FDEQ_BIN_5
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -55674,7 +55674,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0026 //RX_SPK_VOL
+286 0x002E //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
163 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -55689,8 +55689,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55699,18 +55699,18 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x0700 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4C68 //RX_FDEQ_GAIN_4
-201 0x403C //RX_FDEQ_GAIN_5
-202 0x3C38 //RX_FDEQ_GAIN_6
-203 0x3430 //RX_FDEQ_GAIN_7
-204 0x303C //RX_FDEQ_GAIN_8
-205 0x4C50 //RX_FDEQ_GAIN_9
+197 0x8058 //RX_FDEQ_GAIN_1
+198 0x5454 //RX_FDEQ_GAIN_2
+199 0x545C //RX_FDEQ_GAIN_3
+200 0x6448 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x5848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -55729,8 +55729,8 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
-225 0x0406 //RX_FDEQ_BIN_5
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -55773,7 +55773,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0037 //RX_SPK_VOL
+286 0x0041 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
163 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -55788,8 +55788,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55798,18 +55798,18 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0D56 //RX_TDDRC_DRC_GAIN
+281 0x0700 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4470 //RX_FDEQ_GAIN_4
-201 0x383C //RX_FDEQ_GAIN_5
-202 0x3C3C //RX_FDEQ_GAIN_6
-203 0x3434 //RX_FDEQ_GAIN_7
-204 0x344C //RX_FDEQ_GAIN_8
-205 0x585C //RX_FDEQ_GAIN_9
+197 0x8058 //RX_FDEQ_GAIN_1
+198 0x5454 //RX_FDEQ_GAIN_2
+199 0x545C //RX_FDEQ_GAIN_3
+200 0x6448 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x5848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -55828,8 +55828,8 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
-225 0x0406 //RX_FDEQ_BIN_5
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -55872,7 +55872,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x002C //RX_SPK_VOL
+286 0x005C //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
163 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -55887,8 +55887,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55897,18 +55897,18 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0D56 //RX_TDDRC_DRC_GAIN
+281 0x0700 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4470 //RX_FDEQ_GAIN_4
-201 0x383C //RX_FDEQ_GAIN_5
-202 0x3C3C //RX_FDEQ_GAIN_6
-203 0x3434 //RX_FDEQ_GAIN_7
-204 0x344C //RX_FDEQ_GAIN_8
-205 0x585C //RX_FDEQ_GAIN_9
+197 0x8058 //RX_FDEQ_GAIN_1
+198 0x5454 //RX_FDEQ_GAIN_2
+199 0x545C //RX_FDEQ_GAIN_3
+200 0x6448 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x5848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -55927,8 +55927,8 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
-225 0x0406 //RX_FDEQ_BIN_5
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -55971,7 +55971,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0051 //RX_SPK_VOL
+286 0x008A //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
163 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -55986,8 +55986,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55996,18 +55996,18 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0D56 //RX_TDDRC_DRC_GAIN
+281 0x0700 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4470 //RX_FDEQ_GAIN_4
-201 0x383C //RX_FDEQ_GAIN_5
-202 0x3C3C //RX_FDEQ_GAIN_6
-203 0x3434 //RX_FDEQ_GAIN_7
-204 0x344C //RX_FDEQ_GAIN_8
-205 0x585C //RX_FDEQ_GAIN_9
+197 0x8058 //RX_FDEQ_GAIN_1
+198 0x5454 //RX_FDEQ_GAIN_2
+199 0x545C //RX_FDEQ_GAIN_3
+200 0x6448 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x5848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -56026,8 +56026,8 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
-225 0x0406 //RX_FDEQ_BIN_5
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -57041,7 +57041,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x247C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0001 //RX_SAMPLINGFREQ_SIG
3 0x0001 //RX_SAMPLINGFREQ_PROC
@@ -57051,7 +57051,7 @@
7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0403 //RX_PGA
+10 0x0800 //RX_PGA
11 0x7B02 //RX_A_HP
12 0x4000 //RX_B_PE
13 0x7800 //RX_THR_PITCH_DET_0
@@ -57165,11 +57165,11 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0197 //RX_TDDRC_DRC_GAIN
+124 0x01AE //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x157C //RX_TPKA_FP
+126 0x13E0 //RX_TPKA_FP
127 0x0400 //RX_MIN_G_FP
-128 0x0800 //RX_MAX_G_FP
+128 0x0B50 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -57295,7 +57295,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x004C //RX_SPK_VOL
+129 0x0046 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -57394,7 +57394,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0074 //RX_SPK_VOL
+129 0x006C //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -57493,7 +57493,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00B1 //RX_SPK_VOL
+129 0x00A4 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -57518,7 +57518,7 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0109 //RX_TDDRC_DRC_GAIN
+124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
39 0x8474 //RX_FDEQ_GAIN_0
40 0x6864 //RX_FDEQ_GAIN_1
@@ -57592,7 +57592,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
+129 0x00F8 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -57617,7 +57617,7 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0197 //RX_TDDRC_DRC_GAIN
+124 0x018D //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
39 0x8474 //RX_FDEQ_GAIN_0
40 0x6864 //RX_FDEQ_GAIN_1
@@ -57716,7 +57716,7 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x02AA //RX_TDDRC_DRC_GAIN
+124 0x0284 //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
39 0x8470 //RX_FDEQ_GAIN_0
40 0x6468 //RX_FDEQ_GAIN_1
@@ -57892,7 +57892,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x243C //RX_RECVFUNC_MODE_0
+157 0x027C //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0001 //RX_SAMPLINGFREQ_SIG
160 0x0001 //RX_SAMPLINGFREQ_PROC
@@ -57902,7 +57902,7 @@
164 0x6000 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
-167 0x0403 //RX_PGA
+167 0x0800 //RX_PGA
168 0x7B02 //RX_A_HP
169 0x4000 //RX_B_PE
170 0x7800 //RX_THR_PITCH_DET_0
@@ -57932,14 +57932,14 @@
194 0x4000 //RX_LMT_ALPHA
195 0x001C //RX_FDEQ_SUBNUM
196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6864 //RX_FDEQ_GAIN_1
-198 0x7070 //RX_FDEQ_GAIN_2
-199 0x6058 //RX_FDEQ_GAIN_3
+197 0x6858 //RX_FDEQ_GAIN_1
+198 0x5858 //RX_FDEQ_GAIN_2
+199 0x5858 //RX_FDEQ_GAIN_3
200 0x5C5C //RX_FDEQ_GAIN_4
-201 0x8854 //RX_FDEQ_GAIN_5
-202 0x5448 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
+201 0x5854 //RX_FDEQ_GAIN_5
+202 0x544C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C60 //RX_FDEQ_GAIN_8
205 0x6068 //RX_FDEQ_GAIN_9
206 0x7070 //RX_FDEQ_GAIN_10
207 0x8070 //RX_FDEQ_GAIN_11
@@ -58016,12 +58016,12 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0715 //RX_TDDRC_DRC_GAIN
+281 0x06AF //RX_TDDRC_DRC_GAIN
282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x157C //RX_TPKA_FP
-284 0x0400 //RX_MIN_G_FP
-285 0x0800 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0014 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
288 0x0000 //RX_MAXLEVEL_CNG
289 0x3000 //RX_BWE_UV_TH
@@ -58055,15 +58055,15 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58072,22 +58072,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x06AF //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
-196 0x5C5C //RX_FDEQ_GAIN_0
-197 0x5448 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4840 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x6048 //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4038 //RX_FDEQ_GAIN_7
-204 0x3C48 //RX_FDEQ_GAIN_8
-205 0x545C //RX_FDEQ_GAIN_9
-206 0x6864 //RX_FDEQ_GAIN_10
-207 0x7058 //RX_FDEQ_GAIN_11
-208 0x443C //RX_FDEQ_GAIN_12
-209 0x3838 //RX_FDEQ_GAIN_13
+196 0x6868 //RX_FDEQ_GAIN_0
+197 0x6858 //RX_FDEQ_GAIN_1
+198 0x5858 //RX_FDEQ_GAIN_2
+199 0x5858 //RX_FDEQ_GAIN_3
+200 0x5C5C //RX_FDEQ_GAIN_4
+201 0x5854 //RX_FDEQ_GAIN_5
+202 0x544C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C60 //RX_FDEQ_GAIN_8
+205 0x6068 //RX_FDEQ_GAIN_9
+206 0x7070 //RX_FDEQ_GAIN_10
+207 0x8070 //RX_FDEQ_GAIN_11
+208 0x6060 //RX_FDEQ_GAIN_12
+209 0x7070 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58146,7 +58146,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0011 //RX_SPK_VOL
+286 0x0014 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -58154,15 +58154,15 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58171,22 +58171,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x06AF //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
-196 0x5C5C //RX_FDEQ_GAIN_0
-197 0x5448 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4840 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x6048 //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4038 //RX_FDEQ_GAIN_7
-204 0x3C48 //RX_FDEQ_GAIN_8
-205 0x545C //RX_FDEQ_GAIN_9
-206 0x6864 //RX_FDEQ_GAIN_10
-207 0x7058 //RX_FDEQ_GAIN_11
-208 0x443C //RX_FDEQ_GAIN_12
-209 0x3838 //RX_FDEQ_GAIN_13
+196 0x6868 //RX_FDEQ_GAIN_0
+197 0x6858 //RX_FDEQ_GAIN_1
+198 0x5858 //RX_FDEQ_GAIN_2
+199 0x5858 //RX_FDEQ_GAIN_3
+200 0x5C5C //RX_FDEQ_GAIN_4
+201 0x5854 //RX_FDEQ_GAIN_5
+202 0x544C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C60 //RX_FDEQ_GAIN_8
+205 0x6068 //RX_FDEQ_GAIN_9
+206 0x7070 //RX_FDEQ_GAIN_10
+207 0x8070 //RX_FDEQ_GAIN_11
+208 0x6060 //RX_FDEQ_GAIN_12
+209 0x7070 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58245,7 +58245,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0019 //RX_SPK_VOL
+286 0x001A //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -58253,15 +58253,15 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58270,22 +58270,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x06AF //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
-196 0x5C5C //RX_FDEQ_GAIN_0
-197 0x5448 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4840 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x6048 //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4038 //RX_FDEQ_GAIN_7
-204 0x3C48 //RX_FDEQ_GAIN_8
-205 0x545C //RX_FDEQ_GAIN_9
-206 0x6864 //RX_FDEQ_GAIN_10
-207 0x7058 //RX_FDEQ_GAIN_11
-208 0x443C //RX_FDEQ_GAIN_12
-209 0x3838 //RX_FDEQ_GAIN_13
+196 0x6868 //RX_FDEQ_GAIN_0
+197 0x6858 //RX_FDEQ_GAIN_1
+198 0x5858 //RX_FDEQ_GAIN_2
+199 0x5858 //RX_FDEQ_GAIN_3
+200 0x5C5C //RX_FDEQ_GAIN_4
+201 0x5854 //RX_FDEQ_GAIN_5
+202 0x544C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C60 //RX_FDEQ_GAIN_8
+205 0x6068 //RX_FDEQ_GAIN_9
+206 0x7070 //RX_FDEQ_GAIN_10
+207 0x8070 //RX_FDEQ_GAIN_11
+208 0x6060 //RX_FDEQ_GAIN_12
+209 0x7070 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58344,7 +58344,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0024 //RX_SPK_VOL
+286 0x0026 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -58352,15 +58352,15 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58369,22 +58369,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x06AF //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
-196 0x5C5C //RX_FDEQ_GAIN_0
-197 0x5448 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4840 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x6048 //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4038 //RX_FDEQ_GAIN_7
-204 0x3C48 //RX_FDEQ_GAIN_8
-205 0x545C //RX_FDEQ_GAIN_9
-206 0x6864 //RX_FDEQ_GAIN_10
-207 0x7058 //RX_FDEQ_GAIN_11
-208 0x443C //RX_FDEQ_GAIN_12
-209 0x3838 //RX_FDEQ_GAIN_13
+196 0x6868 //RX_FDEQ_GAIN_0
+197 0x6858 //RX_FDEQ_GAIN_1
+198 0x5858 //RX_FDEQ_GAIN_2
+199 0x5858 //RX_FDEQ_GAIN_3
+200 0x5C5C //RX_FDEQ_GAIN_4
+201 0x5854 //RX_FDEQ_GAIN_5
+202 0x544C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C60 //RX_FDEQ_GAIN_8
+205 0x6068 //RX_FDEQ_GAIN_9
+206 0x7070 //RX_FDEQ_GAIN_10
+207 0x8070 //RX_FDEQ_GAIN_11
+208 0x6060 //RX_FDEQ_GAIN_12
+209 0x7070 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58443,7 +58443,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0034 //RX_SPK_VOL
+286 0x0035 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -58451,15 +58451,15 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58468,22 +58468,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0B39 //RX_TDDRC_DRC_GAIN
+281 0x06AF //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x685C //RX_FDEQ_GAIN_1
-198 0x6868 //RX_FDEQ_GAIN_2
-199 0x544C //RX_FDEQ_GAIN_3
-200 0x4C54 //RX_FDEQ_GAIN_4
-201 0x704C //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x445C //RX_FDEQ_GAIN_8
+196 0x7878 //RX_FDEQ_GAIN_0
+197 0x786C //RX_FDEQ_GAIN_1
+198 0x6C6C //RX_FDEQ_GAIN_2
+199 0x6262 //RX_FDEQ_GAIN_3
+200 0x5A60 //RX_FDEQ_GAIN_4
+201 0x7A54 //RX_FDEQ_GAIN_5
+202 0x5448 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
205 0x6068 //RX_FDEQ_GAIN_9
206 0x7070 //RX_FDEQ_GAIN_10
-207 0x7C74 //RX_FDEQ_GAIN_11
+207 0x8070 //RX_FDEQ_GAIN_11
208 0x6060 //RX_FDEQ_GAIN_12
-209 0x6C6C //RX_FDEQ_GAIN_13
+209 0x7070 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58542,7 +58542,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0038 //RX_SPK_VOL
+286 0x0058 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -58550,15 +58550,15 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58567,22 +58567,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0B39 //RX_TDDRC_DRC_GAIN
+281 0x06AF //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x685C //RX_FDEQ_GAIN_1
-198 0x6868 //RX_FDEQ_GAIN_2
-199 0x544C //RX_FDEQ_GAIN_3
-200 0x4C54 //RX_FDEQ_GAIN_4
-201 0x704C //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x445C //RX_FDEQ_GAIN_8
+196 0x7878 //RX_FDEQ_GAIN_0
+197 0x786C //RX_FDEQ_GAIN_1
+198 0x6C6C //RX_FDEQ_GAIN_2
+199 0x6262 //RX_FDEQ_GAIN_3
+200 0x5A60 //RX_FDEQ_GAIN_4
+201 0x7A54 //RX_FDEQ_GAIN_5
+202 0x5448 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
205 0x6068 //RX_FDEQ_GAIN_9
206 0x7070 //RX_FDEQ_GAIN_10
-207 0x7C74 //RX_FDEQ_GAIN_11
+207 0x8070 //RX_FDEQ_GAIN_11
208 0x6060 //RX_FDEQ_GAIN_12
-209 0x6C6C //RX_FDEQ_GAIN_13
+209 0x7070 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58641,7 +58641,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0060 //RX_SPK_VOL
+286 0x0085 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -58649,15 +58649,15 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58666,22 +58666,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0B39 //RX_TDDRC_DRC_GAIN
+281 0x06AF //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x685C //RX_FDEQ_GAIN_1
-198 0x6868 //RX_FDEQ_GAIN_2
-199 0x544C //RX_FDEQ_GAIN_3
-200 0x4C54 //RX_FDEQ_GAIN_4
-201 0x704C //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x445C //RX_FDEQ_GAIN_8
+196 0x7878 //RX_FDEQ_GAIN_0
+197 0x786C //RX_FDEQ_GAIN_1
+198 0x6C6C //RX_FDEQ_GAIN_2
+199 0x6262 //RX_FDEQ_GAIN_3
+200 0x5A60 //RX_FDEQ_GAIN_4
+201 0x7A54 //RX_FDEQ_GAIN_5
+202 0x5448 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
205 0x6068 //RX_FDEQ_GAIN_9
206 0x7070 //RX_FDEQ_GAIN_10
-207 0x7C74 //RX_FDEQ_GAIN_11
+207 0x8070 //RX_FDEQ_GAIN_11
208 0x6060 //RX_FDEQ_GAIN_12
-209 0x6C6C //RX_FDEQ_GAIN_13
+209 0x7070 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -59711,7 +59711,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x247C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0003 //RX_SAMPLINGFREQ_SIG
3 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -59721,8 +59721,8 @@
7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0403 //RX_PGA
-11 0x7D83 //RX_A_HP
+10 0x0800 //RX_PGA
+11 0x7652 //RX_A_HP
12 0x4000 //RX_B_PE
13 0x7800 //RX_THR_PITCH_DET_0
14 0x7000 //RX_THR_PITCH_DET_1
@@ -59750,21 +59750,164 @@
36 0x0000 //RX_LMT_THRD
37 0x4000 //RX_LMT_ALPHA
38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8462 //RX_FDEQ_GAIN_0
+40 0x5A5A //RX_FDEQ_GAIN_1
+41 0x5A5A //RX_FDEQ_GAIN_2
+42 0x645C //RX_FDEQ_GAIN_3
+43 0x5A54 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x585C //RX_FDEQ_GAIN_6
+46 0x4C48 //RX_FDEQ_GAIN_7
+47 0x5658 //RX_FDEQ_GAIN_8
+48 0x5C5A //RX_FDEQ_GAIN_9
+49 0x544C //RX_FDEQ_GAIN_10
+50 0x484E //RX_FDEQ_GAIN_11
+51 0x5448 //RX_FDEQ_GAIN_12
+52 0x5068 //RX_FDEQ_GAIN_13
+53 0x6064 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0605 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E32 //RX_FDEQ_BIN_11
+75 0x1423 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0109 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x13E0 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0B50 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x8468 //RX_FDEQ_GAIN_0
-40 0x484C //RX_FDEQ_GAIN_1
-41 0x545A //RX_FDEQ_GAIN_2
-42 0x686A //RX_FDEQ_GAIN_3
-43 0x6860 //RX_FDEQ_GAIN_4
-44 0x5C4C //RX_FDEQ_GAIN_5
-45 0x5858 //RX_FDEQ_GAIN_6
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
46 0x4C4C //RX_FDEQ_GAIN_7
47 0x4C4C //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+48 0x5048 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
52 0x5460 //RX_FDEQ_GAIN_13
-53 0x5C58 //RX_FDEQ_GAIN_14
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -59785,9 +59928,9 @@
71 0x0B07 //RX_FDEQ_BIN_8
72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E2D //RX_FDEQ_BIN_11
-75 0x1923 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -59822,150 +59965,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0003 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0004 //RX_TDDRC_THRD_1
-114 0x0340 //RX_TDDRC_THRD_2
-115 0x1C00 //RX_TDDRC_THRD_3
-116 0x0000 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x6000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0284 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x0FA0 //RX_TPKA_FP
-127 0x0400 //RX_MIN_G_FP
-128 0x0800 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x6000 //RX_TDDRC_ALPHA_UP_1
-7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
-8 0x6000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x6000 //RX_TDDRC_ALPHA_DWN_3
-32 0x4000 //RX_TDDRC_ALPHA_DWN_4
-33 0x7214 //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0002 //RX_TDDRC_THRD_1
-114 0x0340 //RX_TDDRC_THRD_2
-115 0x0CE0 //RX_TDDRC_THRD_3
-116 0x0000 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x6000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0100 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
-51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
-54 0x9898 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0301 //RX_FDEQ_BIN_0
-64 0x0105 //RX_FDEQ_BIN_1
-65 0x0203 //RX_FDEQ_BIN_2
-66 0x0205 //RX_FDEQ_BIN_3
-67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
-69 0x0410 //RX_FDEQ_BIN_6
-70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
-77 0x1E2D //RX_FDEQ_BIN_14
-78 0x2D40 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0035 //RX_FDDRC_BAND_MARGIN_1
-91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
-92 0x0120 //RX_FDDRC_BAND_MARGIN_3
-93 0x0004 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x2000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x2000 //RX_FDDRC_THRD_3_2
-101 0x5000 //RX_FDDRC_THRD_3_3
-102 0x4000 //RX_FDDRC_SLANT_0_0
-103 0x4000 //RX_FDDRC_SLANT_0_1
-104 0x4000 //RX_FDDRC_SLANT_0_2
-105 0x4000 //RX_FDDRC_SLANT_0_3
-106 0x7FFF //RX_FDDRC_SLANT_1_0
-107 0x7FFF //RX_FDDRC_SLANT_1_1
-108 0x7FFF //RX_FDDRC_SLANT_1_2
-109 0x7FFF //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0049 //RX_SPK_VOL
+129 0x004B //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -59992,21 +59992,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -60021,15 +60021,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -60064,7 +60064,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0070 //RX_SPK_VOL
+129 0x0072 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -60091,21 +60091,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -60120,15 +60120,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -60163,7 +60163,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00AD //RX_SPK_VOL
+129 0x00AE //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -60188,23 +60188,23 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0109 //RX_TDDRC_DRC_GAIN
+124 0x0110 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -60219,15 +60219,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -60289,21 +60289,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x01AE //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x8462 //RX_FDEQ_GAIN_0
-40 0x5A5A //RX_FDEQ_GAIN_1
-41 0x5A5A //RX_FDEQ_GAIN_2
-42 0x645C //RX_FDEQ_GAIN_3
-43 0x5A54 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x585C //RX_FDEQ_GAIN_6
-46 0x4C48 //RX_FDEQ_GAIN_7
-47 0x5658 //RX_FDEQ_GAIN_8
-48 0x5C5A //RX_FDEQ_GAIN_9
-49 0x544C //RX_FDEQ_GAIN_10
-50 0x484E //RX_FDEQ_GAIN_11
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
-52 0x5068 //RX_FDEQ_GAIN_13
-53 0x6064 //RX_FDEQ_GAIN_14
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -60318,15 +60318,15 @@
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
+68 0x0506 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E32 //RX_FDEQ_BIN_11
-75 0x1423 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -60386,23 +60386,23 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0284 //RX_TDDRC_DRC_GAIN
+124 0x028B //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x8468 //RX_FDEQ_GAIN_0
-40 0x484C //RX_FDEQ_GAIN_1
-41 0x545A //RX_FDEQ_GAIN_2
-42 0x686A //RX_FDEQ_GAIN_3
-43 0x6860 //RX_FDEQ_GAIN_4
-44 0x5C4C //RX_FDEQ_GAIN_5
-45 0x5858 //RX_FDEQ_GAIN_6
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x7064 //RX_FDEQ_GAIN_4
+44 0x6050 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
46 0x4C4C //RX_FDEQ_GAIN_7
47 0x4C4C //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+48 0x4C48 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
52 0x5460 //RX_FDEQ_GAIN_13
-53 0x5C58 //RX_FDEQ_GAIN_14
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -60423,9 +60423,9 @@
71 0x0B07 //RX_FDEQ_BIN_8
72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E2D //RX_FDEQ_BIN_11
-75 0x1923 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -60488,20 +60488,20 @@
124 0x0478 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
39 0x8468 //RX_FDEQ_GAIN_0
-40 0x484C //RX_FDEQ_GAIN_1
-41 0x545A //RX_FDEQ_GAIN_2
-42 0x686A //RX_FDEQ_GAIN_3
-43 0x6860 //RX_FDEQ_GAIN_4
-44 0x5C4C //RX_FDEQ_GAIN_5
-45 0x5858 //RX_FDEQ_GAIN_6
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x7064 //RX_FDEQ_GAIN_4
+44 0x6050 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
46 0x4C4C //RX_FDEQ_GAIN_7
47 0x4C4C //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+48 0x4C48 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
+50 0x4856 //RX_FDEQ_GAIN_11
51 0x5448 //RX_FDEQ_GAIN_12
52 0x5460 //RX_FDEQ_GAIN_13
-53 0x5C58 //RX_FDEQ_GAIN_14
+53 0x5448 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -60522,9 +60522,9 @@
71 0x0B07 //RX_FDEQ_BIN_8
72 0x120E //RX_FDEQ_BIN_9
73 0x100E //RX_FDEQ_BIN_10
-74 0x0E2D //RX_FDEQ_BIN_11
-75 0x1923 //RX_FDEQ_BIN_12
-76 0x151E //RX_FDEQ_BIN_13
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
77 0x1E2D //RX_FDEQ_BIN_14
78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -60562,7 +60562,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x243C //RX_RECVFUNC_MODE_0
+157 0x027C //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0003 //RX_SAMPLINGFREQ_SIG
160 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -60572,8 +60572,8 @@
164 0x6000 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
-167 0x0403 //RX_PGA
-168 0x7D83 //RX_A_HP
+167 0x0800 //RX_PGA
+168 0x7652 //RX_A_HP
169 0x4000 //RX_B_PE
170 0x7800 //RX_THR_PITCH_DET_0
171 0x7000 //RX_THR_PITCH_DET_1
@@ -60601,22 +60601,22 @@
193 0x0000 //RX_LMT_THRD
194 0x4000 //RX_LMT_ALPHA
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
+196 0x484E //RX_FDEQ_GAIN_0
+197 0x4E4E //RX_FDEQ_GAIN_1
+198 0x4E4E //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x7C48 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
+200 0x484E //RX_FDEQ_GAIN_4
+201 0x6E4E //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4860 //RX_FDEQ_GAIN_8
205 0x7468 //RX_FDEQ_GAIN_9
-206 0x5858 //RX_FDEQ_GAIN_10
-207 0x5858 //RX_FDEQ_GAIN_11
-208 0x5C54 //RX_FDEQ_GAIN_12
-209 0x5448 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x5858 //RX_FDEQ_GAIN_15
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6666 //RX_FDEQ_GAIN_11
+208 0x6666 //RX_FDEQ_GAIN_12
+209 0x6666 //RX_FDEQ_GAIN_13
+210 0x6060 //RX_FDEQ_GAIN_14
+211 0x6060 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -60630,7 +60630,7 @@
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
+225 0x0209 //RX_FDEQ_BIN_5
226 0x0808 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -60686,12 +60686,12 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0550 //RX_TDDRC_DRC_GAIN
+281 0x04BC //RX_TDDRC_DRC_GAIN
282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x0FA0 //RX_TPKA_FP
-284 0x0400 //RX_MIN_G_FP
-285 0x0800 //RX_MAX_G_FP
-286 0x0014 //RX_SPK_VOL
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0019 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
288 0x0000 //RX_MAXLEVEL_CNG
289 0x3000 //RX_BWE_UV_TH
@@ -60725,41 +60725,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x04BC //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x3434 //RX_FDEQ_GAIN_3
-200 0x3840 //RX_FDEQ_GAIN_4
-201 0x4838 //RX_FDEQ_GAIN_5
-202 0x5444 //RX_FDEQ_GAIN_6
-203 0x443C //RX_FDEQ_GAIN_7
-204 0x3C60 //RX_FDEQ_GAIN_8
-205 0x6460 //RX_FDEQ_GAIN_9
-206 0x6064 //RX_FDEQ_GAIN_10
-207 0x5C5C //RX_FDEQ_GAIN_11
-208 0x5440 //RX_FDEQ_GAIN_12
-209 0x4040 //RX_FDEQ_GAIN_13
-210 0x4040 //RX_FDEQ_GAIN_14
-211 0x5858 //RX_FDEQ_GAIN_15
+196 0x484E //RX_FDEQ_GAIN_0
+197 0x4E4E //RX_FDEQ_GAIN_1
+198 0x4E4E //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x484E //RX_FDEQ_GAIN_4
+201 0x6E4E //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6666 //RX_FDEQ_GAIN_11
+208 0x6666 //RX_FDEQ_GAIN_12
+209 0x6666 //RX_FDEQ_GAIN_13
+210 0x6060 //RX_FDEQ_GAIN_14
+211 0x6060 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -60773,7 +60773,7 @@
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
+225 0x0209 //RX_FDEQ_BIN_5
226 0x0808 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -60816,7 +60816,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0011 //RX_SPK_VOL
+286 0x0019 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -60824,41 +60824,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x04BC //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x3434 //RX_FDEQ_GAIN_3
-200 0x3840 //RX_FDEQ_GAIN_4
-201 0x4838 //RX_FDEQ_GAIN_5
-202 0x5444 //RX_FDEQ_GAIN_6
-203 0x443C //RX_FDEQ_GAIN_7
-204 0x3C60 //RX_FDEQ_GAIN_8
-205 0x6460 //RX_FDEQ_GAIN_9
-206 0x6064 //RX_FDEQ_GAIN_10
-207 0x5C5C //RX_FDEQ_GAIN_11
-208 0x5440 //RX_FDEQ_GAIN_12
-209 0x4040 //RX_FDEQ_GAIN_13
-210 0x4040 //RX_FDEQ_GAIN_14
-211 0x5858 //RX_FDEQ_GAIN_15
+196 0x484E //RX_FDEQ_GAIN_0
+197 0x4E4E //RX_FDEQ_GAIN_1
+198 0x4E4E //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x484E //RX_FDEQ_GAIN_4
+201 0x6E4E //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6666 //RX_FDEQ_GAIN_11
+208 0x6666 //RX_FDEQ_GAIN_12
+209 0x6666 //RX_FDEQ_GAIN_13
+210 0x6060 //RX_FDEQ_GAIN_14
+211 0x6060 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -60872,7 +60872,7 @@
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
+225 0x0209 //RX_FDEQ_BIN_5
226 0x0808 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -60915,7 +60915,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0019 //RX_SPK_VOL
+286 0x0023 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -60923,41 +60923,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x04BC //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x3434 //RX_FDEQ_GAIN_3
-200 0x3840 //RX_FDEQ_GAIN_4
-201 0x4838 //RX_FDEQ_GAIN_5
-202 0x5444 //RX_FDEQ_GAIN_6
-203 0x443C //RX_FDEQ_GAIN_7
-204 0x3C60 //RX_FDEQ_GAIN_8
-205 0x6460 //RX_FDEQ_GAIN_9
-206 0x6064 //RX_FDEQ_GAIN_10
-207 0x5C5C //RX_FDEQ_GAIN_11
-208 0x5440 //RX_FDEQ_GAIN_12
-209 0x4040 //RX_FDEQ_GAIN_13
-210 0x4040 //RX_FDEQ_GAIN_14
-211 0x5858 //RX_FDEQ_GAIN_15
+196 0x484E //RX_FDEQ_GAIN_0
+197 0x4E4E //RX_FDEQ_GAIN_1
+198 0x4E4E //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x484E //RX_FDEQ_GAIN_4
+201 0x6E4E //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6666 //RX_FDEQ_GAIN_11
+208 0x6666 //RX_FDEQ_GAIN_12
+209 0x6666 //RX_FDEQ_GAIN_13
+210 0x6060 //RX_FDEQ_GAIN_14
+211 0x6060 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -60971,7 +60971,7 @@
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
+225 0x0209 //RX_FDEQ_BIN_5
226 0x0808 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -61014,7 +61014,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0025 //RX_SPK_VOL
+286 0x0032 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -61022,41 +61022,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x04BC //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x3434 //RX_FDEQ_GAIN_3
-200 0x3840 //RX_FDEQ_GAIN_4
-201 0x4838 //RX_FDEQ_GAIN_5
-202 0x5444 //RX_FDEQ_GAIN_6
-203 0x443C //RX_FDEQ_GAIN_7
-204 0x3C60 //RX_FDEQ_GAIN_8
-205 0x6460 //RX_FDEQ_GAIN_9
-206 0x6064 //RX_FDEQ_GAIN_10
-207 0x5C5C //RX_FDEQ_GAIN_11
-208 0x5440 //RX_FDEQ_GAIN_12
-209 0x4040 //RX_FDEQ_GAIN_13
-210 0x4040 //RX_FDEQ_GAIN_14
-211 0x5858 //RX_FDEQ_GAIN_15
+196 0x484E //RX_FDEQ_GAIN_0
+197 0x4E4E //RX_FDEQ_GAIN_1
+198 0x4E4E //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x484E //RX_FDEQ_GAIN_4
+201 0x6E4E //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6666 //RX_FDEQ_GAIN_11
+208 0x6666 //RX_FDEQ_GAIN_12
+209 0x6666 //RX_FDEQ_GAIN_13
+210 0x6060 //RX_FDEQ_GAIN_14
+211 0x6060 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -61070,7 +61070,7 @@
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
+225 0x0209 //RX_FDEQ_BIN_5
226 0x0808 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -61113,7 +61113,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0036 //RX_SPK_VOL
+286 0x0048 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -61121,41 +61121,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0D56 //RX_TDDRC_DRC_GAIN
+281 0x04BC //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6850 //RX_FDEQ_GAIN_1
-198 0x5048 //RX_FDEQ_GAIN_2
-199 0x383C //RX_FDEQ_GAIN_3
-200 0x4048 //RX_FDEQ_GAIN_4
-201 0x7040 //RX_FDEQ_GAIN_5
-202 0x4C44 //RX_FDEQ_GAIN_6
-203 0x4448 //RX_FDEQ_GAIN_7
-204 0x4868 //RX_FDEQ_GAIN_8
-205 0x7C70 //RX_FDEQ_GAIN_9
-206 0x707C //RX_FDEQ_GAIN_10
-207 0x786C //RX_FDEQ_GAIN_11
-208 0x6454 //RX_FDEQ_GAIN_12
-209 0x604C //RX_FDEQ_GAIN_13
-210 0x585C //RX_FDEQ_GAIN_14
-211 0x7480 //RX_FDEQ_GAIN_15
+196 0x484E //RX_FDEQ_GAIN_0
+197 0x4E4E //RX_FDEQ_GAIN_1
+198 0x4E4E //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x484E //RX_FDEQ_GAIN_4
+201 0x6E4E //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6666 //RX_FDEQ_GAIN_11
+208 0x6666 //RX_FDEQ_GAIN_12
+209 0x6666 //RX_FDEQ_GAIN_13
+210 0x6060 //RX_FDEQ_GAIN_14
+211 0x6060 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -61169,7 +61169,7 @@
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
+225 0x0209 //RX_FDEQ_BIN_5
226 0x0808 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -61212,7 +61212,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0034 //RX_SPK_VOL
+286 0x0068 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -61220,41 +61220,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0D56 //RX_TDDRC_DRC_GAIN
+281 0x04BC //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6850 //RX_FDEQ_GAIN_1
-198 0x5048 //RX_FDEQ_GAIN_2
-199 0x383C //RX_FDEQ_GAIN_3
-200 0x4048 //RX_FDEQ_GAIN_4
-201 0x7040 //RX_FDEQ_GAIN_5
-202 0x4C44 //RX_FDEQ_GAIN_6
-203 0x4448 //RX_FDEQ_GAIN_7
-204 0x4868 //RX_FDEQ_GAIN_8
-205 0x7C70 //RX_FDEQ_GAIN_9
-206 0x707C //RX_FDEQ_GAIN_10
-207 0x786C //RX_FDEQ_GAIN_11
-208 0x6454 //RX_FDEQ_GAIN_12
-209 0x604C //RX_FDEQ_GAIN_13
-210 0x585C //RX_FDEQ_GAIN_14
-211 0x7480 //RX_FDEQ_GAIN_15
+196 0x484E //RX_FDEQ_GAIN_0
+197 0x4E4E //RX_FDEQ_GAIN_1
+198 0x4E4E //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x484E //RX_FDEQ_GAIN_4
+201 0x6E4E //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6666 //RX_FDEQ_GAIN_11
+208 0x6666 //RX_FDEQ_GAIN_12
+209 0x6666 //RX_FDEQ_GAIN_13
+210 0x6060 //RX_FDEQ_GAIN_14
+211 0x6060 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -61268,7 +61268,7 @@
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
+225 0x0209 //RX_FDEQ_BIN_5
226 0x0808 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -61311,7 +61311,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0059 //RX_SPK_VOL
+286 0x0097 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -61319,41 +61319,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0D56 //RX_TDDRC_DRC_GAIN
+281 0x04BC //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6850 //RX_FDEQ_GAIN_1
-198 0x5048 //RX_FDEQ_GAIN_2
-199 0x383C //RX_FDEQ_GAIN_3
-200 0x4048 //RX_FDEQ_GAIN_4
-201 0x7040 //RX_FDEQ_GAIN_5
-202 0x4C44 //RX_FDEQ_GAIN_6
-203 0x4448 //RX_FDEQ_GAIN_7
-204 0x4868 //RX_FDEQ_GAIN_8
-205 0x7C70 //RX_FDEQ_GAIN_9
-206 0x707C //RX_FDEQ_GAIN_10
-207 0x786C //RX_FDEQ_GAIN_11
-208 0x6454 //RX_FDEQ_GAIN_12
-209 0x604C //RX_FDEQ_GAIN_13
-210 0x585C //RX_FDEQ_GAIN_14
-211 0x7480 //RX_FDEQ_GAIN_15
+196 0x484E //RX_FDEQ_GAIN_0
+197 0x4E4E //RX_FDEQ_GAIN_1
+198 0x4E4E //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x484E //RX_FDEQ_GAIN_4
+201 0x6E4E //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6666 //RX_FDEQ_GAIN_11
+208 0x6666 //RX_FDEQ_GAIN_12
+209 0x6666 //RX_FDEQ_GAIN_13
+210 0x6060 //RX_FDEQ_GAIN_14
+211 0x6060 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -61367,7 +61367,7 @@
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
+225 0x0209 //RX_FDEQ_BIN_5
226 0x0808 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
@@ -64091,7 +64091,7 @@
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
2 0x00F3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0000 //TX_SAMPLINGFREQ_SIG
@@ -64240,7 +64240,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x7A00 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x0200 //TX_MIN_EQ_RE_EST_0
+152 0x1000 //TX_MIN_EQ_RE_EST_0
153 0x0200 //TX_MIN_EQ_RE_EST_1
154 0x0200 //TX_MIN_EQ_RE_EST_2
155 0x0200 //TX_MIN_EQ_RE_EST_3
@@ -64253,7 +64253,7 @@
162 0x4000 //TX_MIN_EQ_RE_EST_10
163 0x6000 //TX_MIN_EQ_RE_EST_11
164 0x7FFF //TX_MIN_EQ_RE_EST_12
-165 0x2000 //TX_LAMBDA_RE_EST
+165 0x4000 //TX_LAMBDA_RE_EST
166 0x0000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x2000 //TX_GAIN_NP
@@ -64311,18 +64311,18 @@
220 0x0000 //TX_DTD_MIC_BLK
221 0x1000 //TX_ADPT_STRICT_L
222 0x1000 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+225 0x044C //TX_RATIO_DT_L_TH_HIGH
226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x1800 //TX_B_POST_FILT_ECHO_L
+227 0x0001 //TX_RATIO_DT_L0_TH
+228 0x4000 //TX_B_POST_FILT_ECHO_L
229 0x2000 //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+234 0x0118 //TX_RATIO_DT_L0_TH_HIGH
235 0x3A98 //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -64448,7 +64448,7 @@
357 0x0FA0 //TX_DT_BINVAD_ENDF
358 0x0400 //TX_C_POST_FLT_DT
359 0x4000 //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
+360 0x0120 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
362 0x0005 //TX_BF_DVG_TH
363 0x001E //TX_SN_C_F
@@ -64489,7 +64489,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0004 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -65031,9 +65031,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0A98 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE0C0 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -66760,8 +66760,8 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x0073 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0001 //TX_SAMPLINGFREQ_SIG
@@ -66910,7 +66910,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x6800 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x0200 //TX_MIN_EQ_RE_EST_0
+152 0x1F80 //TX_MIN_EQ_RE_EST_0
153 0x0100 //TX_MIN_EQ_RE_EST_1
154 0x0200 //TX_MIN_EQ_RE_EST_2
155 0x0200 //TX_MIN_EQ_RE_EST_3
@@ -66927,7 +66927,7 @@
166 0x4000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x5000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x02A0 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
171 0x06B0 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
@@ -66981,10 +66981,10 @@
220 0x0000 //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x03E8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x0578 //TX_RATIO_DT_L_TH_HIGH
-226 0x43FB //TX_RATIO_DT_H_TH_HIGH
+225 0x0154 //TX_RATIO_DT_L_TH_HIGH
+226 0x4588 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -66992,7 +66992,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH
+234 0x0258 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -67116,9 +67116,9 @@
355 0x0200 //TX_DT_BINVAD_TH_2
356 0x0800 //TX_DT_BINVAD_TH_3
357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0800 //TX_C_POST_FLT_DT
+358 0x4000 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0140 //TX_DT_BOOST
+360 0x0180 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
362 0x0005 //TX_BF_DVG_TH
363 0x001E //TX_SN_C_F
@@ -67159,7 +67159,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x4000 //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -67701,9 +67701,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0C97 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE4A8 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -69430,8 +69430,8 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x00B3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0003 //TX_SAMPLINGFREQ_SIG
@@ -69580,7 +69580,7 @@
149 0x0800 //TX_AEC_REF_GAIN_2
150 0x7600 //TX_EAD_THR
151 0x1000 //TX_THR_RE_EST
-152 0x2000 //TX_MIN_EQ_RE_EST_0
+152 0x1000 //TX_MIN_EQ_RE_EST_0
153 0x0600 //TX_MIN_EQ_RE_EST_1
154 0x3000 //TX_MIN_EQ_RE_EST_2
155 0x3000 //TX_MIN_EQ_RE_EST_3
@@ -69597,7 +69597,7 @@
166 0x3000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x4000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x0270 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
171 0x0880 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
@@ -69641,7 +69641,7 @@
210 0x5000 //TX_DTD_THR2_6
211 0x7FFF //TX_DTD_THR3
212 0x0000 //TX_SPK_CUT_K
-213 0x36B0 //TX_DT_CUT_K
+213 0x1770 //TX_DT_CUT_K
214 0x0100 //TX_DT_CUT_THR
215 0x04EB //TX_COMFORT_G
216 0x01F4 //TX_POWER_YOUT_TH
@@ -69653,8 +69653,8 @@
222 0x023E //TX_ADPT_STRICT_H
223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x07D0 //TX_RATIO_DT_L_TH_HIGH
-226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+225 0x02BC //TX_RATIO_DT_L_TH_HIGH
+226 0x5208 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -69662,7 +69662,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x02BC //TX_RATIO_DT_L0_TH_HIGH
+234 0x0190 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -69775,7 +69775,7 @@
344 0x7F00 //TX_LAMBDA_PFILT_S_5
345 0x7F00 //TX_LAMBDA_PFILT_S_6
346 0x7F00 //TX_LAMBDA_PFILT_S_7
-347 0x3E80 //TX_K_PEPPER
+347 0x1000 //TX_K_PEPPER
348 0x0400 //TX_A_PEPPER
349 0x1EAA //TX_K_PEPPER_HF
350 0x0600 //TX_A_PEPPER_HF
@@ -69829,7 +69829,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -70198,13 +70198,13 @@
767 0x0050 //TX_MIC_CALIBRATION_2
768 0x0050 //TX_MIC_CALIBRATION_3
769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
775 0x000F //TX_GAIN_LIMIT_2
-776 0x0000 //TX_GAIN_LIMIT_3
+776 0x000F //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
778 0x7FDE //TX_BVE_VAD0_ALPHAUP
779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
@@ -70371,9 +70371,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0E21 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE4A8 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -80749,22 +80749,21382 @@
638 0x4848 //TX_PREEQ_GAIN_MIC0_21
639 0x4848 //TX_PREEQ_GAIN_MIC0_22
640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0000 //TX_PREEQ_BIN_MIC0_0
-642 0x0000 //TX_PREEQ_BIN_MIC0_1
-643 0x0000 //TX_PREEQ_BIN_MIC0_2
-644 0x0000 //TX_PREEQ_BIN_MIC0_3
-645 0x0000 //TX_PREEQ_BIN_MIC0_4
-646 0x0000 //TX_PREEQ_BIN_MIC0_5
-647 0x0000 //TX_PREEQ_BIN_MIC0_6
-648 0x0000 //TX_PREEQ_BIN_MIC0_7
-649 0x0000 //TX_PREEQ_BIN_MIC0_8
-650 0x0000 //TX_PREEQ_BIN_MIC0_9
-651 0x0000 //TX_PREEQ_BIN_MIC0_10
-652 0x0000 //TX_PREEQ_BIN_MIC0_11
-653 0x0000 //TX_PREEQ_BIN_MIC0_12
-654 0x0000 //TX_PREEQ_BIN_MIC0_13
-655 0x0000 //TX_PREEQ_BIN_MIC0_14
-656 0x0000 //TX_PREEQ_BIN_MIC0_15
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x2040 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x050D //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0000 //RX_PITCH_BFR_LEN
+17 0x0000 //RX_SBD_PITCH_DET
+18 0x0000 //RX_PP_RESRV_0
+19 0x0000 //RX_PP_RESRV_1
+20 0xF800 //RX_N_SN_EST
+21 0x0000 //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0000 //RX_FENS_RESRV_1
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+30 0x0000 //RX_EXTRA_NS_L
+31 0x0000 //RX_EXTRA_NS_A
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x0000 //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x0080 //RX_MIN_G_FP
+128 0x2000 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0010 //RX_MAXLEVEL_CNG
+132 0x0000 //RX_BWE_UV_TH
+133 0x0000 //RX_BWE_UV_TH2
+134 0x0000 //RX_BWE_UV_TH3
+135 0x0000 //RX_BWE_V_TH
+136 0x0000 //RX_BWE_GAIN1_V_TH1
+137 0x0000 //RX_BWE_GAIN1_V_TH2
+138 0x0000 //RX_BWE_UV_EQ
+139 0x0000 //RX_BWE_V_EQ
+140 0x0000 //RX_BWE_TONE_TH
+141 0x0000 //RX_BWE_UV_HOLD_T
+142 0x0000 //RX_BWE_GAIN2_ALPHA
+143 0x0000 //RX_BWE_GAIN3_ALPHA
+144 0x0000 //RX_BWE_CUTOFF
+145 0x0000 //RX_BWE_GAINFILL
+146 0x0000 //RX_BWE_MAXTH_TONE
+147 0x0000 //RX_BWE_EQ_0
+148 0x0000 //RX_BWE_EQ_1
+149 0x0000 //RX_BWE_EQ_2
+150 0x0000 //RX_BWE_EQ_3
+151 0x0000 //RX_BWE_EQ_4
+152 0x0000 //RX_BWE_EQ_5
+153 0x0000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x2040 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0000 //RX_SAMPLINGFREQ_SIG
+160 0x0000 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x050D //RX_PGA
+168 0x7652 //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0000 //RX_PITCH_BFR_LEN
+174 0x0000 //RX_SBD_PITCH_DET
+175 0x0000 //RX_PP_RESRV_0
+176 0x0000 //RX_PP_RESRV_1
+177 0xF800 //RX_N_SN_EST
+178 0x0000 //RX_N2_SN_EST
+179 0x000F //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7E00 //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0000 //RX_FENS_RESRV_1
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+187 0x0000 //RX_EXTRA_NS_L
+188 0x0000 //RX_EXTRA_NS_A
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x0000 //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0003 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x0080 //RX_MIN_G_FP
+285 0x2000 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0010 //RX_MAXLEVEL_CNG
+289 0x0000 //RX_BWE_UV_TH
+290 0x0000 //RX_BWE_UV_TH2
+291 0x0000 //RX_BWE_UV_TH3
+292 0x0000 //RX_BWE_V_TH
+293 0x0000 //RX_BWE_GAIN1_V_TH1
+294 0x0000 //RX_BWE_GAIN1_V_TH2
+295 0x0000 //RX_BWE_UV_EQ
+296 0x0000 //RX_BWE_V_EQ
+297 0x0000 //RX_BWE_TONE_TH
+298 0x0000 //RX_BWE_UV_HOLD_T
+299 0x0000 //RX_BWE_GAIN2_ALPHA
+300 0x0000 //RX_BWE_GAIN3_ALPHA
+301 0x0000 //RX_BWE_CUTOFF
+302 0x0000 //RX_BWE_GAINFILL
+303 0x0000 //RX_BWE_MAXTH_TONE
+304 0x0000 //RX_BWE_EQ_0
+305 0x0000 //RX_BWE_EQ_1
+306 0x0000 //RX_BWE_EQ_2
+307 0x0000 //RX_BWE_EQ_3
+308 0x0000 //RX_BWE_EQ_4
+309 0x0000 //RX_BWE_EQ_5
+310 0x0000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0000 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0078 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0302 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0000 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0000 //TX_MICS_OF_PAIR0
+38 0x0000 //TX_MICS_OF_PAIR1
+39 0x0000 //TX_MICS_OF_PAIR2
+40 0x0000 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0003 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x0000 //TX_HD_BIN_MASK
+53 0x0000 //TX_HD_SUBAND_MASK
+54 0x0000 //TX_HD_FRAME_AVG_MASK
+55 0x0000 //TX_HD_MIN_FRQ
+56 0x0000 //TX_HD_ALPHA_PSD
+57 0x0000 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0x0000 //TX_T_PSDVAT
+63 0x0000 //TX_CNT
+64 0x0000 //TX_ANTI_HOWL_GAIN
+65 0x0000 //TX_MICFORBFMARK_0
+66 0x0000 //TX_MICFORBFMARK_1
+67 0x0000 //TX_MICFORBFMARK_2
+68 0x0000 //TX_MICFORBFMARK_3
+69 0x0000 //TX_MICFORBFMARK_4
+70 0x0000 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x0000 //TX_ADCS_GAIN
+112 0x0000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x7FFF //TX_BLMIC_BLKFACTOR
+116 0x7FFF //TX_BRMIC_BLKFACTOR
+117 0x000A //TX_MICBLK_START_BIN
+118 0x0041 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0020 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7800 //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6000 //TX_THR_PITCH_DET_2
+133 0x0000 //TX_PITCH_BFR_LEN
+134 0x0000 //TX_SBD_PITCH_DET
+135 0x0000 //TX_TD_AEC_L
+136 0x0000 //TX_MU0_UNP_TD_AEC
+137 0x0000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x2000 //TX_AEC_REF_GAIN_0
+148 0x2000 //TX_AEC_REF_GAIN_1
+149 0x2000 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x0200 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0100 //TX_MIN_EQ_RE_EST_3
+156 0x0100 //TX_MIN_EQ_RE_EST_4
+157 0x0100 //TX_MIN_EQ_RE_EST_5
+158 0x0100 //TX_MIN_EQ_RE_EST_6
+159 0x0100 //TX_MIN_EQ_RE_EST_7
+160 0x0100 //TX_MIN_EQ_RE_EST_8
+161 0x0100 //TX_MIN_EQ_RE_EST_9
+162 0x0100 //TX_MIN_EQ_RE_EST_10
+163 0x0100 //TX_MIN_EQ_RE_EST_11
+164 0x0100 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0008 //TX_SE_HOLD_N
+170 0x0050 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x0000 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x0000 //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0000 //TX_FRQ_LIN_LEN
+184 0x0000 //TX_FRQ_AEC_LEN_RHO
+185 0x0000 //TX_MU0_UNP_FRQ_AEC
+186 0x0000 //TX_MU0_PTD_FRQ_AEC
+187 0x0000 //TX_MINENOISETH
+188 0x0000 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x0000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7333 //TX_DTD_THR1_0
+198 0x7333 //TX_DTD_THR1_1
+199 0x7333 //TX_DTD_THR1_2
+200 0x7333 //TX_DTD_THR1_3
+201 0x7333 //TX_DTD_THR1_4
+202 0x7333 //TX_DTD_THR1_5
+203 0x7333 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0400 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x0000 //TX_COMFORT_G
+216 0x0000 //TX_POWER_YOUT_TH
+217 0x0000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x0800 //TX_B_POST_FILT_ECHO_H
+230 0x0000 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0000 //TX_DT_RESRV_7
+240 0x0000 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF800 //TX_THR_SN_EST_2
+245 0xF600 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0A00 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0000 //TX_INBEAMHOLDT
+269 0x1FFF //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x001A //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x000C //TX_NS_LVL_CTRL_3
+285 0x000C //TX_NS_LVL_CTRL_4
+286 0x000C //TX_NS_LVL_CTRL_5
+287 0x001A //TX_NS_LVL_CTRL_6
+288 0x000C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0014 //TX_MIN_GAIN_S_1
+291 0x0014 //TX_MIN_GAIN_S_2
+292 0x0014 //TX_MIN_GAIN_S_3
+293 0x0014 //TX_MIN_GAIN_S_4
+294 0x0014 //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0064 //TX_NS_MAX_PRI_SNR_TH
+299 0x7FFF //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x1200 //TX_THR_LFNS
+309 0x0147 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x7FFF //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x7FFF //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x1000 //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x6666 //TX_A_POST_FILT_S_3
+318 0x6666 //TX_A_POST_FILT_S_4
+319 0x6666 //TX_A_POST_FILT_S_5
+320 0x199A //TX_A_POST_FILT_S_6
+321 0x6666 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7E00 //TX_LAMBDA_PFILT_S_0
+340 0x7E00 //TX_LAMBDA_PFILT_S_1
+341 0x7E00 //TX_LAMBDA_PFILT_S_2
+342 0x7E00 //TX_LAMBDA_PFILT_S_3
+343 0x7E00 //TX_LAMBDA_PFILT_S_4
+344 0x7E00 //TX_LAMBDA_PFILT_S_5
+345 0x7E00 //TX_LAMBDA_PFILT_S_6
+346 0x7E00 //TX_LAMBDA_PFILT_S_7
+347 0x0010 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0001 //TX_BF_SGRAD_FLG
+362 0x0000 //TX_BF_DVG_TH
+363 0x0000 //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x05A0 //TX_NDETCT
+367 0x04E8 //TX_NOISE_TH_0
+368 0x1388 //TX_NOISE_TH_0_2
+369 0x3A98 //TX_NOISE_TH_0_3
+370 0x0C80 //TX_NOISE_TH_1
+371 0x0032 //TX_NOISE_TH_2
+372 0x3D54 //TX_NOISE_TH_3
+373 0x012C //TX_NOISE_TH_4
+374 0x07D0 //TX_NOISE_TH_5
+375 0x6590 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00C8 //TX_NOISE_TH_6
+379 0x02BC //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x1482 //TX_DT_CUT_K1
+384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
+385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x6400 //TX_OUT_ENER_S_TH_NOISY
+387 0x6400 //TX_OUT_ENER_TH_NOISE
+388 0x7D00 //TX_OUT_ENER_TH_SPEECH
+389 0x0000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0000 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0000 //TX_MIN_G_LOW300HZ
+401 0x0010 //TX_MAXLEVEL_CNG
+402 0x0000 //TX_STN_NOISE_TH
+403 0x0000 //TX_POST_MASK_SUP
+404 0x0000 //TX_POST_MASK_ADJUST
+405 0x0014 //TX_NS_ENOISE_MIC0_TH
+406 0x04E7 //TX_MINENOISE_MIC0_TH
+407 0x0226 //TX_MINENOISE_MIC0_S_TH
+408 0x2879 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0080 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x2000 //TX_RHO_UPB
+415 0x0020 //TX_N_HOLD_HS
+416 0x0009 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0000 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x0219 //TX_THR_STD_PLH
+421 0x09C4 //TX_N_HOLD_STD
+422 0x0166 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x0000 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x1000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0000 //TX_HS_VAD_BIN
+435 0x0000 //TX_THR_VAD_HS
+436 0x0000 //TX_MEAN_RTO_MIN_TH2
+437 0x0000 //TX_SILENCE_T
+438 0x4000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x099A //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x001E //TX_DOA_VAD_THR_1
+445 0x001E //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x005A //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x005A //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x005A //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0172 //TX_BF_HOLDOFF_T
+473 0x8000 //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x071C //TX_DOA_TRACK_HT
+477 0x0280 //TX_N1_HOLD_HF
+478 0x0140 //TX_N2_HOLD_HF
+479 0x2AAB //TX_BF_RESET_THR_HF
+480 0x4000 //TX_DOA_SMOOTH
+481 0x0000 //TX_MU_BF
+482 0x0200 //TX_BF_MU_LF_B2
+483 0x0000 //TX_BF_FC_END_BIN_B2
+484 0x0000 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0000 //TX_N_DOA_SEED
+488 0x0000 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x0000 //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x0000 //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x0000 //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0168 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0004 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0230 //TX_NOR_OFF_TH1
+503 0xD333 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x6666 //TX_MICTOBFGAIN0
+513 0x0014 //TX_FASTMUE_TH
+514 0xC000 //TX_DEREVERB_LF_MU
+515 0xC000 //TX_DEREVERB_HF_MU
+516 0xCCCC //TX_DEREVERB_DELAY
+517 0xD999 //TX_DEREVERB_COEF_LEN
+518 0x1F40 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x7000 //TX_GSC_RTOH_TH
+523 0x0064 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0028 //TX_SNR_THR
+531 0x03E8 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x0000 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x000A //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0000 //TX_BVE_NOISE_FLOOR_1
+554 0x0000 //TX_BVE_NOISE_FLOOR_2
+555 0x0000 //TX_BVE_NOISE_FLOOR_3
+556 0x0000 //TX_BVE_NOISE_FLOOR_4
+557 0x0000 //TX_BVE_NOISE_FLOOR_5
+558 0x0000 //TX_BVE_NOISE_FLOOR_6
+559 0x0000 //TX_BVE_NOISE_FLOOR_7
+560 0x0000 //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x2040 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x050D //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0000 //RX_PITCH_BFR_LEN
+17 0x0000 //RX_SBD_PITCH_DET
+18 0x0000 //RX_PP_RESRV_0
+19 0x0000 //RX_PP_RESRV_1
+20 0xF800 //RX_N_SN_EST
+21 0x0000 //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0000 //RX_FENS_RESRV_1
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+30 0x0000 //RX_EXTRA_NS_L
+31 0x0000 //RX_EXTRA_NS_A
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x0000 //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x0080 //RX_MIN_G_FP
+128 0x2000 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0010 //RX_MAXLEVEL_CNG
+132 0x0000 //RX_BWE_UV_TH
+133 0x0000 //RX_BWE_UV_TH2
+134 0x0000 //RX_BWE_UV_TH3
+135 0x0000 //RX_BWE_V_TH
+136 0x0000 //RX_BWE_GAIN1_V_TH1
+137 0x0000 //RX_BWE_GAIN1_V_TH2
+138 0x0000 //RX_BWE_UV_EQ
+139 0x0000 //RX_BWE_V_EQ
+140 0x0000 //RX_BWE_TONE_TH
+141 0x0000 //RX_BWE_UV_HOLD_T
+142 0x0000 //RX_BWE_GAIN2_ALPHA
+143 0x0000 //RX_BWE_GAIN3_ALPHA
+144 0x0000 //RX_BWE_CUTOFF
+145 0x0000 //RX_BWE_GAINFILL
+146 0x0000 //RX_BWE_MAXTH_TONE
+147 0x0000 //RX_BWE_EQ_0
+148 0x0000 //RX_BWE_EQ_1
+149 0x0000 //RX_BWE_EQ_2
+150 0x0000 //RX_BWE_EQ_3
+151 0x0000 //RX_BWE_EQ_4
+152 0x0000 //RX_BWE_EQ_5
+153 0x0000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x2040 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0000 //RX_SAMPLINGFREQ_SIG
+160 0x0000 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x050D //RX_PGA
+168 0x7652 //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0000 //RX_PITCH_BFR_LEN
+174 0x0000 //RX_SBD_PITCH_DET
+175 0x0000 //RX_PP_RESRV_0
+176 0x0000 //RX_PP_RESRV_1
+177 0xF800 //RX_N_SN_EST
+178 0x0000 //RX_N2_SN_EST
+179 0x000F //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7E00 //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0000 //RX_FENS_RESRV_1
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+187 0x0000 //RX_EXTRA_NS_L
+188 0x0000 //RX_EXTRA_NS_A
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x0000 //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0003 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x0080 //RX_MIN_G_FP
+285 0x2000 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0010 //RX_MAXLEVEL_CNG
+289 0x0000 //RX_BWE_UV_TH
+290 0x0000 //RX_BWE_UV_TH2
+291 0x0000 //RX_BWE_UV_TH3
+292 0x0000 //RX_BWE_V_TH
+293 0x0000 //RX_BWE_GAIN1_V_TH1
+294 0x0000 //RX_BWE_GAIN1_V_TH2
+295 0x0000 //RX_BWE_UV_EQ
+296 0x0000 //RX_BWE_V_EQ
+297 0x0000 //RX_BWE_TONE_TH
+298 0x0000 //RX_BWE_UV_HOLD_T
+299 0x0000 //RX_BWE_GAIN2_ALPHA
+300 0x0000 //RX_BWE_GAIN3_ALPHA
+301 0x0000 //RX_BWE_CUTOFF
+302 0x0000 //RX_BWE_GAINFILL
+303 0x0000 //RX_BWE_MAXTH_TONE
+304 0x0000 //RX_BWE_EQ_0
+305 0x0000 //RX_BWE_EQ_1
+306 0x0000 //RX_BWE_EQ_2
+307 0x0000 //RX_BWE_EQ_3
+308 0x0000 //RX_BWE_EQ_4
+309 0x0000 //RX_BWE_EQ_5
+310 0x0000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-USB_BLACKBIRD-RESERVE2-SWB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x6B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6D60 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7D00 //TX_DTD_THR1_0
+198 0x7D00 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xF700 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0100 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0018 //TX_NS_LVL_CTRL_2
+284 0x0012 //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x0018 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x0009 //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x5000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x3000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7000 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7F00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0383 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x2904 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x044C //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x0DAC //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x02F3 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0xC000 //TX_DEREVERB_LF_MU
+515 0xC000 //TX_DEREVERB_HF_MU
+516 0xCCCC //TX_DEREVERB_DELAY
+517 0xD999 //TX_DEREVERB_COEF_LEN
+518 0x1F40 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x7000 //TX_GSC_RTOH_TH
+523 0x0064 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4040 //TX_FDEQ_GAIN_6
+574 0x4040 //TX_FDEQ_GAIN_7
+575 0x4040 //TX_FDEQ_GAIN_8
+576 0x3838 //TX_FDEQ_GAIN_9
+577 0x3838 //TX_FDEQ_GAIN_10
+578 0x3828 //TX_FDEQ_GAIN_11
+579 0x2828 //TX_FDEQ_GAIN_12
+580 0x2828 //TX_FDEQ_GAIN_13
+581 0x1C1C //TX_FDEQ_GAIN_14
+582 0x1C1C //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x284A //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0020 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x042C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4E52 //RX_FDEQ_GAIN_0
+40 0x5252 //RX_FDEQ_GAIN_1
+41 0x5252 //RX_FDEQ_GAIN_2
+42 0x5250 //RX_FDEQ_GAIN_3
+43 0x4C46 //RX_FDEQ_GAIN_4
+44 0x4748 //RX_FDEQ_GAIN_5
+45 0x5768 //RX_FDEQ_GAIN_6
+46 0x6162 //RX_FDEQ_GAIN_7
+47 0x5252 //RX_FDEQ_GAIN_8
+48 0x5256 //RX_FDEQ_GAIN_9
+49 0x5248 //RX_FDEQ_GAIN_10
+50 0x3434 //RX_FDEQ_GAIN_11
+51 0x3436 //RX_FDEQ_GAIN_12
+52 0x2A18 //RX_FDEQ_GAIN_13
+53 0x1830 //RX_FDEQ_GAIN_14
+54 0x3648 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x023E //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x280A //RX_TPKA_FP
+127 0x032D //RX_MIN_G_FP
+128 0x0A00 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000A //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0011 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x001C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x002F //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x004F //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0086 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x042C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4E52 //RX_FDEQ_GAIN_0
+197 0x5252 //RX_FDEQ_GAIN_1
+198 0x5252 //RX_FDEQ_GAIN_2
+199 0x5250 //RX_FDEQ_GAIN_3
+200 0x4C46 //RX_FDEQ_GAIN_4
+201 0x4748 //RX_FDEQ_GAIN_5
+202 0x5768 //RX_FDEQ_GAIN_6
+203 0x6162 //RX_FDEQ_GAIN_7
+204 0x5252 //RX_FDEQ_GAIN_8
+205 0x5256 //RX_FDEQ_GAIN_9
+206 0x5248 //RX_FDEQ_GAIN_10
+207 0x3434 //RX_FDEQ_GAIN_11
+208 0x3436 //RX_FDEQ_GAIN_12
+209 0x2A18 //RX_FDEQ_GAIN_13
+210 0x1830 //RX_FDEQ_GAIN_14
+211 0x3648 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0002 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x023E //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x280A //RX_TPKA_FP
+284 0x032D //RX_MIN_G_FP
+285 0x0A00 //RX_MAX_G_FP
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x000A //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0011 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x001C //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x002F //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x004F //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0086 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR-RESERVE2-SWB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0383 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x044C //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x0DAC //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x02F3 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0xC000 //TX_DEREVERB_LF_MU
+515 0xC000 //TX_DEREVERB_HF_MU
+516 0xCCCC //TX_DEREVERB_DELAY
+517 0xD999 //TX_DEREVERB_COEF_LEN
+518 0x1F40 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x7000 //TX_GSC_RTOH_TH
+523 0x0064 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x002C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0013 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0020 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0036 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x002C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0002 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0013 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0020 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0036 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x005B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0099 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-RESERVE1-RESERVE2-SWB
+#PARAM_MODE Simple
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0383 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x044C //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x0DAC //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x02F3 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0xC000 //TX_DEREVERB_LF_MU
+515 0xC000 //TX_DEREVERB_HF_MU
+516 0xCCCC //TX_DEREVERB_DELAY
+517 0xD999 //TX_DEREVERB_COEF_LEN
+518 0x1F40 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x7000 //TX_GSC_RTOH_TH
+523 0x0064 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x002C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0013 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0020 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0036 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x002C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0002 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0013 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0020 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0036 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x005B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0099 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-RESERVE2-SWB
+#PARAM_MODE Simple
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x00A3 //TX_DIST2REF1
+22 0x001B //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0002 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0CAE //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0400 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x1000 //TX_MIN_EQ_RE_EST_0
+153 0x0600 //TX_MIN_EQ_RE_EST_1
+154 0x3000 //TX_MIN_EQ_RE_EST_2
+155 0x3000 //TX_MIN_EQ_RE_EST_3
+156 0x3000 //TX_MIN_EQ_RE_EST_4
+157 0x3000 //TX_MIN_EQ_RE_EST_5
+158 0x3000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x7800 //TX_MIN_EQ_RE_EST_8
+161 0x7800 //TX_MIN_EQ_RE_EST_9
+162 0x7800 //TX_MIN_EQ_RE_EST_10
+163 0x7800 //TX_MIN_EQ_RE_EST_11
+164 0x7800 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x3000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0270 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x0880 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7148 //TX_DTD_THR1_0
+198 0x7148 //TX_DTD_THR1_1
+199 0x7148 //TX_DTD_THR1_2
+200 0x7148 //TX_DTD_THR1_3
+201 0x7148 //TX_DTD_THR1_4
+202 0x7700 //TX_DTD_THR1_5
+203 0x7148 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x1770 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x02BC //TX_RATIO_DT_L_TH_HIGH
+226 0x5208 //TX_RATIO_DT_H_TH_HIGH
+227 0x0001 //TX_RATIO_DT_L0_TH
+228 0x7FFF //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x0190 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0000 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0100 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0024 //TX_NS_LVL_CTRL_2
+284 0x001A //TX_NS_LVL_CTRL_3
+285 0x0014 //TX_NS_LVL_CTRL_4
+286 0x0011 //TX_NS_LVL_CTRL_5
+287 0x001A //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x0020 //TX_MIN_GAIN_S_0
+290 0x0020 //TX_MIN_GAIN_S_1
+291 0x0020 //TX_MIN_GAIN_S_2
+292 0x0020 //TX_MIN_GAIN_S_3
+293 0x0020 //TX_MIN_GAIN_S_4
+294 0x0020 //TX_MIN_GAIN_S_5
+295 0x0020 //TX_MIN_GAIN_S_6
+296 0x0020 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x7FFF //TX_A_POST_FILT_S_0
+315 0x7FFF //TX_A_POST_FILT_S_1
+316 0x7FFF //TX_A_POST_FILT_S_2
+317 0x7FFF //TX_A_POST_FILT_S_3
+318 0x7FFF //TX_A_POST_FILT_S_4
+319 0x7FFF //TX_A_POST_FILT_S_5
+320 0x7FFF //TX_A_POST_FILT_S_6
+321 0x7FFF //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x6000 //TX_B_POST_FILT_1
+324 0x6000 //TX_B_POST_FILT_2
+325 0x6000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7F00 //TX_LAMBDA_PFILT
+339 0x7F00 //TX_LAMBDA_PFILT_S_0
+340 0x7F00 //TX_LAMBDA_PFILT_S_1
+341 0x7F00 //TX_LAMBDA_PFILT_S_2
+342 0x7F00 //TX_LAMBDA_PFILT_S_3
+343 0x7F00 //TX_LAMBDA_PFILT_S_4
+344 0x7F00 //TX_LAMBDA_PFILT_S_5
+345 0x7F00 //TX_LAMBDA_PFILT_S_6
+346 0x7F00 //TX_LAMBDA_PFILT_S_7
+347 0x1000 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0040 //TX_DT_BINVAD_TH_0
+354 0x0040 //TX_DT_BINVAD_TH_1
+355 0x0100 //TX_DT_BINVAD_TH_2
+356 0x0100 //TX_DT_BINVAD_TH_3
+357 0x36B0 //TX_DT_BINVAD_ENDF
+358 0x0200 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x01F4 //TX_NOISE_TH_2
+372 0x36B0 //TX_NOISE_TH_3
+373 0x2710 //TX_NOISE_TH_4
+374 0x2CEC //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0DAC //TX_NOISE_TH_6
+379 0x0050 //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x07D0 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0005 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0050 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4000 //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x3000 //TX_DEREVERB_LF_MU
+515 0x34CD //TX_DEREVERB_HF_MU
+516 0x0007 //TX_DEREVERB_DELAY
+517 0x0004 //TX_DEREVERB_COEF_LEN
+518 0x0003 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x3A98 //TX_GSC_RTOL_TH
+522 0x3A98 //TX_GSC_RTOH_TH
+523 0x7E2C //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4850 //TX_FDEQ_GAIN_2
+570 0x5050 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4850 //TX_FDEQ_GAIN_5
+573 0x5261 //TX_FDEQ_GAIN_6
+574 0x5C4C //TX_FDEQ_GAIN_7
+575 0x4C4E //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4C4F //TX_FDEQ_GAIN_10
+578 0x5153 //TX_FDEQ_GAIN_11
+579 0x5A5B //TX_FDEQ_GAIN_12
+580 0x5A7F //TX_FDEQ_GAIN_13
+581 0x7C77 //TX_FDEQ_GAIN_14
+582 0x6D75 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x284A //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0202 //TX_PREEQ_BIN_MIC0_0
+642 0x0203 //TX_PREEQ_BIN_MIC0_1
+643 0x0303 //TX_PREEQ_BIN_MIC0_2
+644 0x0304 //TX_PREEQ_BIN_MIC0_3
+645 0x0405 //TX_PREEQ_BIN_MIC0_4
+646 0x0506 //TX_PREEQ_BIN_MIC0_5
+647 0x0708 //TX_PREEQ_BIN_MIC0_6
+648 0x090A //TX_PREEQ_BIN_MIC0_7
+649 0x0B0C //TX_PREEQ_BIN_MIC0_8
+650 0x0D0E //TX_PREEQ_BIN_MIC0_9
+651 0x1013 //TX_PREEQ_BIN_MIC0_10
+652 0x1719 //TX_PREEQ_BIN_MIC0_11
+653 0x1B1E //TX_PREEQ_BIN_MIC0_12
+654 0x1E1E //TX_PREEQ_BIN_MIC0_13
+655 0x1E28 //TX_PREEQ_BIN_MIC0_14
+656 0x3042 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x494A //TX_PREEQ_GAIN_MIC1_6
+673 0x4B4C //TX_PREEQ_GAIN_MIC1_7
+674 0x4D4E //TX_PREEQ_GAIN_MIC1_8
+675 0x4F52 //TX_PREEQ_GAIN_MIC1_9
+676 0x5355 //TX_PREEQ_GAIN_MIC1_10
+677 0x585C //TX_PREEQ_GAIN_MIC1_11
+678 0x616A //TX_PREEQ_GAIN_MIC1_12
+679 0x726E //TX_PREEQ_GAIN_MIC1_13
+680 0x5C48 //TX_PREEQ_GAIN_MIC1_14
+681 0x3B38 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0202 //TX_PREEQ_BIN_MIC1_0
+691 0x0203 //TX_PREEQ_BIN_MIC1_1
+692 0x0303 //TX_PREEQ_BIN_MIC1_2
+693 0x0304 //TX_PREEQ_BIN_MIC1_3
+694 0x0405 //TX_PREEQ_BIN_MIC1_4
+695 0x0506 //TX_PREEQ_BIN_MIC1_5
+696 0x0708 //TX_PREEQ_BIN_MIC1_6
+697 0x090A //TX_PREEQ_BIN_MIC1_7
+698 0x0B0C //TX_PREEQ_BIN_MIC1_8
+699 0x0D0E //TX_PREEQ_BIN_MIC1_9
+700 0x1013 //TX_PREEQ_BIN_MIC1_10
+701 0x1719 //TX_PREEQ_BIN_MIC1_11
+702 0x1B1E //TX_PREEQ_BIN_MIC1_12
+703 0x1E1E //TX_PREEQ_BIN_MIC1_13
+704 0x1E28 //TX_PREEQ_BIN_MIC1_14
+705 0x3042 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4849 //TX_PREEQ_GAIN_MIC2_6
+722 0x4A4A //TX_PREEQ_GAIN_MIC2_7
+723 0x4B4B //TX_PREEQ_GAIN_MIC2_8
+724 0x4C4D //TX_PREEQ_GAIN_MIC2_9
+725 0x4D4E //TX_PREEQ_GAIN_MIC2_10
+726 0x4F4F //TX_PREEQ_GAIN_MIC2_11
+727 0x504F //TX_PREEQ_GAIN_MIC2_12
+728 0x4C49 //TX_PREEQ_GAIN_MIC2_13
+729 0x4A4C //TX_PREEQ_GAIN_MIC2_14
+730 0x4F5E //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0202 //TX_PREEQ_BIN_MIC2_0
+740 0x0203 //TX_PREEQ_BIN_MIC2_1
+741 0x0303 //TX_PREEQ_BIN_MIC2_2
+742 0x0304 //TX_PREEQ_BIN_MIC2_3
+743 0x0405 //TX_PREEQ_BIN_MIC2_4
+744 0x0506 //TX_PREEQ_BIN_MIC2_5
+745 0x0708 //TX_PREEQ_BIN_MIC2_6
+746 0x090A //TX_PREEQ_BIN_MIC2_7
+747 0x0B0C //TX_PREEQ_BIN_MIC2_8
+748 0x0D0E //TX_PREEQ_BIN_MIC2_9
+749 0x1013 //TX_PREEQ_BIN_MIC2_10
+750 0x1719 //TX_PREEQ_BIN_MIC2_11
+751 0x1B1E //TX_PREEQ_BIN_MIC2_12
+752 0x1E1E //TX_PREEQ_BIN_MIC2_13
+753 0x1E28 //TX_PREEQ_BIN_MIC2_14
+754 0x363C //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0002 //TX_TDDRC_THRD_1
+856 0x1000 //TX_TDDRC_THRD_2
+857 0x1000 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0E21 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE4A8 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x002C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0013 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0020 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0036 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x002C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0002 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0013 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0020 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0036 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x005B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0099 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-RESERVE2-SWB
+#PARAM_MODE Simple
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0383 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x044C //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x0DAC //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x02F3 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0xC000 //TX_DEREVERB_LF_MU
+515 0xC000 //TX_DEREVERB_HF_MU
+516 0xCCCC //TX_DEREVERB_DELAY
+517 0xD999 //TX_DEREVERB_COEF_LEN
+518 0x1F40 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x7000 //TX_GSC_RTOH_TH
+523 0x0064 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x0024 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0002 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x000C //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x000C //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0014 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0021 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0037 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x005B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0099 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_HCO-RESERVE2-SWB
+#PARAM_MODE Simple
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0000 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0078 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0302 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0000 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0000 //TX_MICS_OF_PAIR0
+38 0x0000 //TX_MICS_OF_PAIR1
+39 0x0000 //TX_MICS_OF_PAIR2
+40 0x0000 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0003 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x0000 //TX_HD_BIN_MASK
+53 0x0000 //TX_HD_SUBAND_MASK
+54 0x0000 //TX_HD_FRAME_AVG_MASK
+55 0x0000 //TX_HD_MIN_FRQ
+56 0x0000 //TX_HD_ALPHA_PSD
+57 0x0000 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0x0000 //TX_T_PSDVAT
+63 0x0000 //TX_CNT
+64 0x0000 //TX_ANTI_HOWL_GAIN
+65 0x0000 //TX_MICFORBFMARK_0
+66 0x0000 //TX_MICFORBFMARK_1
+67 0x0000 //TX_MICFORBFMARK_2
+68 0x0000 //TX_MICFORBFMARK_3
+69 0x0000 //TX_MICFORBFMARK_4
+70 0x0000 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x0000 //TX_ADCS_GAIN
+112 0x0000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x7FFF //TX_BLMIC_BLKFACTOR
+116 0x7FFF //TX_BRMIC_BLKFACTOR
+117 0x000A //TX_MICBLK_START_BIN
+118 0x0041 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0020 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7800 //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6000 //TX_THR_PITCH_DET_2
+133 0x0000 //TX_PITCH_BFR_LEN
+134 0x0000 //TX_SBD_PITCH_DET
+135 0x0000 //TX_TD_AEC_L
+136 0x0000 //TX_MU0_UNP_TD_AEC
+137 0x0000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x2000 //TX_AEC_REF_GAIN_0
+148 0x2000 //TX_AEC_REF_GAIN_1
+149 0x2000 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x0200 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0100 //TX_MIN_EQ_RE_EST_3
+156 0x0100 //TX_MIN_EQ_RE_EST_4
+157 0x0100 //TX_MIN_EQ_RE_EST_5
+158 0x0100 //TX_MIN_EQ_RE_EST_6
+159 0x0100 //TX_MIN_EQ_RE_EST_7
+160 0x0100 //TX_MIN_EQ_RE_EST_8
+161 0x0100 //TX_MIN_EQ_RE_EST_9
+162 0x0100 //TX_MIN_EQ_RE_EST_10
+163 0x0100 //TX_MIN_EQ_RE_EST_11
+164 0x0100 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0008 //TX_SE_HOLD_N
+170 0x0050 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x0000 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x0000 //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0000 //TX_FRQ_LIN_LEN
+184 0x0000 //TX_FRQ_AEC_LEN_RHO
+185 0x0000 //TX_MU0_UNP_FRQ_AEC
+186 0x0000 //TX_MU0_PTD_FRQ_AEC
+187 0x0000 //TX_MINENOISETH
+188 0x0000 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x0000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7333 //TX_DTD_THR1_0
+198 0x7333 //TX_DTD_THR1_1
+199 0x7333 //TX_DTD_THR1_2
+200 0x7333 //TX_DTD_THR1_3
+201 0x7333 //TX_DTD_THR1_4
+202 0x7333 //TX_DTD_THR1_5
+203 0x7333 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0400 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x0000 //TX_COMFORT_G
+216 0x0000 //TX_POWER_YOUT_TH
+217 0x0000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x0800 //TX_B_POST_FILT_ECHO_H
+230 0x0000 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0000 //TX_DT_RESRV_7
+240 0x0000 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF800 //TX_THR_SN_EST_2
+245 0xF600 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0A00 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0000 //TX_INBEAMHOLDT
+269 0x1FFF //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x001A //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x000C //TX_NS_LVL_CTRL_3
+285 0x000C //TX_NS_LVL_CTRL_4
+286 0x000C //TX_NS_LVL_CTRL_5
+287 0x001A //TX_NS_LVL_CTRL_6
+288 0x000C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0014 //TX_MIN_GAIN_S_1
+291 0x0014 //TX_MIN_GAIN_S_2
+292 0x0014 //TX_MIN_GAIN_S_3
+293 0x0014 //TX_MIN_GAIN_S_4
+294 0x0014 //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0064 //TX_NS_MAX_PRI_SNR_TH
+299 0x7FFF //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x1200 //TX_THR_LFNS
+309 0x0147 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x7FFF //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x7FFF //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x1000 //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x6666 //TX_A_POST_FILT_S_3
+318 0x6666 //TX_A_POST_FILT_S_4
+319 0x6666 //TX_A_POST_FILT_S_5
+320 0x199A //TX_A_POST_FILT_S_6
+321 0x6666 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7E00 //TX_LAMBDA_PFILT_S_0
+340 0x7E00 //TX_LAMBDA_PFILT_S_1
+341 0x7E00 //TX_LAMBDA_PFILT_S_2
+342 0x7E00 //TX_LAMBDA_PFILT_S_3
+343 0x7E00 //TX_LAMBDA_PFILT_S_4
+344 0x7E00 //TX_LAMBDA_PFILT_S_5
+345 0x7E00 //TX_LAMBDA_PFILT_S_6
+346 0x7E00 //TX_LAMBDA_PFILT_S_7
+347 0x0010 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0001 //TX_BF_SGRAD_FLG
+362 0x0000 //TX_BF_DVG_TH
+363 0x0000 //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x05A0 //TX_NDETCT
+367 0x0383 //TX_NOISE_TH_0
+368 0x1388 //TX_NOISE_TH_0_2
+369 0x3A98 //TX_NOISE_TH_0_3
+370 0x0C80 //TX_NOISE_TH_1
+371 0x0032 //TX_NOISE_TH_2
+372 0x3D54 //TX_NOISE_TH_3
+373 0x012C //TX_NOISE_TH_4
+374 0x07D0 //TX_NOISE_TH_5
+375 0x6590 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00C8 //TX_NOISE_TH_6
+379 0x044C //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x0DAC //TX_DT_CUT_K1
+384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
+385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x6400 //TX_OUT_ENER_S_TH_NOISY
+387 0x6400 //TX_OUT_ENER_TH_NOISE
+388 0x7D00 //TX_OUT_ENER_TH_SPEECH
+389 0x0000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0000 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0000 //TX_MIN_G_LOW300HZ
+401 0x0010 //TX_MAXLEVEL_CNG
+402 0x0000 //TX_STN_NOISE_TH
+403 0x0000 //TX_POST_MASK_SUP
+404 0x0000 //TX_POST_MASK_ADJUST
+405 0x0014 //TX_NS_ENOISE_MIC0_TH
+406 0x02F3 //TX_MINENOISE_MIC0_TH
+407 0x0226 //TX_MINENOISE_MIC0_S_TH
+408 0x2879 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0080 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x2000 //TX_RHO_UPB
+415 0x0020 //TX_N_HOLD_HS
+416 0x0009 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0000 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x0219 //TX_THR_STD_PLH
+421 0x09C4 //TX_N_HOLD_STD
+422 0x0166 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x0000 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x1000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0000 //TX_HS_VAD_BIN
+435 0x0000 //TX_THR_VAD_HS
+436 0x0000 //TX_MEAN_RTO_MIN_TH2
+437 0x0000 //TX_SILENCE_T
+438 0x4000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x099A //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x001E //TX_DOA_VAD_THR_1
+445 0x001E //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x005A //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x005A //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x005A //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0172 //TX_BF_HOLDOFF_T
+473 0x8000 //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x071C //TX_DOA_TRACK_HT
+477 0x0280 //TX_N1_HOLD_HF
+478 0x0140 //TX_N2_HOLD_HF
+479 0x2AAB //TX_BF_RESET_THR_HF
+480 0x4000 //TX_DOA_SMOOTH
+481 0x0000 //TX_MU_BF
+482 0x0200 //TX_BF_MU_LF_B2
+483 0x0000 //TX_BF_FC_END_BIN_B2
+484 0x0000 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0000 //TX_N_DOA_SEED
+488 0x0000 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x0000 //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x0000 //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x0000 //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0168 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0004 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0230 //TX_NOR_OFF_TH1
+503 0xD333 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x6666 //TX_MICTOBFGAIN0
+513 0x0014 //TX_FASTMUE_TH
+514 0xC000 //TX_DEREVERB_LF_MU
+515 0xC000 //TX_DEREVERB_HF_MU
+516 0xCCCC //TX_DEREVERB_DELAY
+517 0xD999 //TX_DEREVERB_COEF_LEN
+518 0x1F40 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x7000 //TX_GSC_RTOH_TH
+523 0x0064 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0028 //TX_SNR_THR
+531 0x03E8 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x0000 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x000A //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0000 //TX_BVE_NOISE_FLOOR_1
+554 0x0000 //TX_BVE_NOISE_FLOOR_2
+555 0x0000 //TX_BVE_NOISE_FLOOR_3
+556 0x0000 //TX_BVE_NOISE_FLOOR_4
+557 0x0000 //TX_BVE_NOISE_FLOOR_5
+558 0x0000 //TX_BVE_NOISE_FLOOR_6
+559 0x0000 //TX_BVE_NOISE_FLOOR_7
+560 0x0000 //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x047C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8462 //RX_FDEQ_GAIN_0
+40 0x5A5A //RX_FDEQ_GAIN_1
+41 0x5A5A //RX_FDEQ_GAIN_2
+42 0x645C //RX_FDEQ_GAIN_3
+43 0x5A54 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x585C //RX_FDEQ_GAIN_6
+46 0x4C48 //RX_FDEQ_GAIN_7
+47 0x5658 //RX_FDEQ_GAIN_8
+48 0x5C5A //RX_FDEQ_GAIN_9
+49 0x544C //RX_FDEQ_GAIN_10
+50 0x484E //RX_FDEQ_GAIN_11
+51 0x5448 //RX_FDEQ_GAIN_12
+52 0x5068 //RX_FDEQ_GAIN_13
+53 0x6064 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0605 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E32 //RX_FDEQ_BIN_11
+75 0x1423 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0109 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x13E0 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0B50 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
+51 0x5448 //RX_FDEQ_GAIN_12
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x004B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
+51 0x5448 //RX_FDEQ_GAIN_12
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0072 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
+51 0x5448 //RX_FDEQ_GAIN_12
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x00AE //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0110 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
+51 0x5448 //RX_FDEQ_GAIN_12
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x685C //RX_FDEQ_GAIN_4
+44 0x5448 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x5048 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
+51 0x5448 //RX_FDEQ_GAIN_12
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x028B //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x7064 //RX_FDEQ_GAIN_4
+44 0x6050 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x4C48 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
+51 0x5448 //RX_FDEQ_GAIN_12
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0006 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0478 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8468 //RX_FDEQ_GAIN_0
+40 0x5454 //RX_FDEQ_GAIN_1
+41 0x585E //RX_FDEQ_GAIN_2
+42 0x6C6E //RX_FDEQ_GAIN_3
+43 0x7064 //RX_FDEQ_GAIN_4
+44 0x6050 //RX_FDEQ_GAIN_5
+45 0x5C5C //RX_FDEQ_GAIN_6
+46 0x4C4C //RX_FDEQ_GAIN_7
+47 0x4C4C //RX_FDEQ_GAIN_8
+48 0x4C48 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4856 //RX_FDEQ_GAIN_11
+51 0x5448 //RX_FDEQ_GAIN_12
+52 0x5460 //RX_FDEQ_GAIN_13
+53 0x5448 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x102B //RX_FDEQ_BIN_11
+75 0x0F32 //RX_FDEQ_BIN_12
+76 0x101E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x047C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x6000 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7652 //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0010 //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7E00 //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x484E //RX_FDEQ_GAIN_0
+197 0x4E4E //RX_FDEQ_GAIN_1
+198 0x4E4E //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x484E //RX_FDEQ_GAIN_4
+201 0x6E4E //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6666 //RX_FDEQ_GAIN_11
+208 0x6666 //RX_FDEQ_GAIN_12
+209 0x6666 //RX_FDEQ_GAIN_13
+210 0x6060 //RX_FDEQ_GAIN_14
+211 0x6060 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0209 //RX_FDEQ_BIN_5
+226 0x0808 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0003 //RX_FILTINDX
+269 0x0002 //RX_TDDRC_THRD_0
+270 0x0004 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x04BC //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x13E0 //RX_TPKA_FP
+284 0x0400 //RX_MIN_G_FP
+285 0x0B50 //RX_MAX_G_FP
+286 0x0019 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x685C //RX_FDEQ_GAIN_4
+201 0x5448 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x5048 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x004B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x685C //RX_FDEQ_GAIN_4
+201 0x5448 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x5048 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0072 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x685C //RX_FDEQ_GAIN_4
+201 0x5448 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x5048 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x00AE //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0110 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x685C //RX_FDEQ_GAIN_4
+201 0x5448 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x5048 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0004 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01AE //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x685C //RX_FDEQ_GAIN_4
+201 0x5448 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x5048 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0004 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x028B //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x7064 //RX_FDEQ_GAIN_4
+201 0x6050 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x4C48 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0002 //RX_TDDRC_THRD_0
+270 0x0006 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0478 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x8468 //RX_FDEQ_GAIN_0
+197 0x5454 //RX_FDEQ_GAIN_1
+198 0x585E //RX_FDEQ_GAIN_2
+199 0x6C6E //RX_FDEQ_GAIN_3
+200 0x7064 //RX_FDEQ_GAIN_4
+201 0x6050 //RX_FDEQ_GAIN_5
+202 0x5C5C //RX_FDEQ_GAIN_6
+203 0x4C4C //RX_FDEQ_GAIN_7
+204 0x4C4C //RX_FDEQ_GAIN_8
+205 0x4C48 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4856 //RX_FDEQ_GAIN_11
+208 0x5448 //RX_FDEQ_GAIN_12
+209 0x5460 //RX_FDEQ_GAIN_13
+210 0x5448 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x102B //RX_FDEQ_BIN_11
+232 0x0F32 //RX_FDEQ_BIN_12
+233 0x101E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_VCO-RESERVE2-SWB
+#PARAM_MODE Simple
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x00A3 //TX_DIST2REF1
+22 0x001B //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0002 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0CAE //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0400 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x1000 //TX_MIN_EQ_RE_EST_0
+153 0x0600 //TX_MIN_EQ_RE_EST_1
+154 0x3000 //TX_MIN_EQ_RE_EST_2
+155 0x3000 //TX_MIN_EQ_RE_EST_3
+156 0x3000 //TX_MIN_EQ_RE_EST_4
+157 0x3000 //TX_MIN_EQ_RE_EST_5
+158 0x3000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x7800 //TX_MIN_EQ_RE_EST_8
+161 0x7800 //TX_MIN_EQ_RE_EST_9
+162 0x7800 //TX_MIN_EQ_RE_EST_10
+163 0x7800 //TX_MIN_EQ_RE_EST_11
+164 0x7800 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x3000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0270 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x0880 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7148 //TX_DTD_THR1_0
+198 0x7148 //TX_DTD_THR1_1
+199 0x7148 //TX_DTD_THR1_2
+200 0x7148 //TX_DTD_THR1_3
+201 0x7148 //TX_DTD_THR1_4
+202 0x7700 //TX_DTD_THR1_5
+203 0x7148 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x1770 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x02BC //TX_RATIO_DT_L_TH_HIGH
+226 0x5208 //TX_RATIO_DT_H_TH_HIGH
+227 0x0001 //TX_RATIO_DT_L0_TH
+228 0x7FFF //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x0190 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0000 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0100 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0024 //TX_NS_LVL_CTRL_2
+284 0x001A //TX_NS_LVL_CTRL_3
+285 0x0014 //TX_NS_LVL_CTRL_4
+286 0x0011 //TX_NS_LVL_CTRL_5
+287 0x001A //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x0020 //TX_MIN_GAIN_S_0
+290 0x0020 //TX_MIN_GAIN_S_1
+291 0x0020 //TX_MIN_GAIN_S_2
+292 0x0020 //TX_MIN_GAIN_S_3
+293 0x0020 //TX_MIN_GAIN_S_4
+294 0x0020 //TX_MIN_GAIN_S_5
+295 0x0020 //TX_MIN_GAIN_S_6
+296 0x0020 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x7FFF //TX_A_POST_FILT_S_0
+315 0x7FFF //TX_A_POST_FILT_S_1
+316 0x7FFF //TX_A_POST_FILT_S_2
+317 0x7FFF //TX_A_POST_FILT_S_3
+318 0x7FFF //TX_A_POST_FILT_S_4
+319 0x7FFF //TX_A_POST_FILT_S_5
+320 0x7FFF //TX_A_POST_FILT_S_6
+321 0x7FFF //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x6000 //TX_B_POST_FILT_1
+324 0x6000 //TX_B_POST_FILT_2
+325 0x6000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7F00 //TX_LAMBDA_PFILT
+339 0x7F00 //TX_LAMBDA_PFILT_S_0
+340 0x7F00 //TX_LAMBDA_PFILT_S_1
+341 0x7F00 //TX_LAMBDA_PFILT_S_2
+342 0x7F00 //TX_LAMBDA_PFILT_S_3
+343 0x7F00 //TX_LAMBDA_PFILT_S_4
+344 0x7F00 //TX_LAMBDA_PFILT_S_5
+345 0x7F00 //TX_LAMBDA_PFILT_S_6
+346 0x7F00 //TX_LAMBDA_PFILT_S_7
+347 0x1000 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0040 //TX_DT_BINVAD_TH_0
+354 0x0040 //TX_DT_BINVAD_TH_1
+355 0x0100 //TX_DT_BINVAD_TH_2
+356 0x0100 //TX_DT_BINVAD_TH_3
+357 0x36B0 //TX_DT_BINVAD_ENDF
+358 0x0200 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x01F4 //TX_NOISE_TH_2
+372 0x36B0 //TX_NOISE_TH_3
+373 0x2710 //TX_NOISE_TH_4
+374 0x2CEC //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0DAC //TX_NOISE_TH_6
+379 0x0050 //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x07D0 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0005 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0050 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4000 //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x3000 //TX_DEREVERB_LF_MU
+515 0x34CD //TX_DEREVERB_HF_MU
+516 0x0007 //TX_DEREVERB_DELAY
+517 0x0004 //TX_DEREVERB_COEF_LEN
+518 0x0003 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x3A98 //TX_GSC_RTOL_TH
+522 0x3A98 //TX_GSC_RTOH_TH
+523 0x7E2C //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4850 //TX_FDEQ_GAIN_2
+570 0x5050 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4850 //TX_FDEQ_GAIN_5
+573 0x5261 //TX_FDEQ_GAIN_6
+574 0x5C4C //TX_FDEQ_GAIN_7
+575 0x4C4E //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4C4F //TX_FDEQ_GAIN_10
+578 0x5153 //TX_FDEQ_GAIN_11
+579 0x5A5B //TX_FDEQ_GAIN_12
+580 0x5A7F //TX_FDEQ_GAIN_13
+581 0x7C77 //TX_FDEQ_GAIN_14
+582 0x6D75 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x284A //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0202 //TX_PREEQ_BIN_MIC0_0
+642 0x0203 //TX_PREEQ_BIN_MIC0_1
+643 0x0303 //TX_PREEQ_BIN_MIC0_2
+644 0x0304 //TX_PREEQ_BIN_MIC0_3
+645 0x0405 //TX_PREEQ_BIN_MIC0_4
+646 0x0506 //TX_PREEQ_BIN_MIC0_5
+647 0x0708 //TX_PREEQ_BIN_MIC0_6
+648 0x090A //TX_PREEQ_BIN_MIC0_7
+649 0x0B0C //TX_PREEQ_BIN_MIC0_8
+650 0x0D0E //TX_PREEQ_BIN_MIC0_9
+651 0x1013 //TX_PREEQ_BIN_MIC0_10
+652 0x1719 //TX_PREEQ_BIN_MIC0_11
+653 0x1B1E //TX_PREEQ_BIN_MIC0_12
+654 0x1E1E //TX_PREEQ_BIN_MIC0_13
+655 0x1E28 //TX_PREEQ_BIN_MIC0_14
+656 0x3042 //TX_PREEQ_BIN_MIC0_15
657 0x0000 //TX_PREEQ_BIN_MIC0_16
658 0x0000 //TX_PREEQ_BIN_MIC0_17
659 0x0000 //TX_PREEQ_BIN_MIC0_18
@@ -80780,16 +102140,16 @@
669 0x4848 //TX_PREEQ_GAIN_MIC1_3
670 0x4848 //TX_PREEQ_GAIN_MIC1_4
671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+672 0x494A //TX_PREEQ_GAIN_MIC1_6
+673 0x4B4C //TX_PREEQ_GAIN_MIC1_7
+674 0x4D4E //TX_PREEQ_GAIN_MIC1_8
+675 0x4F52 //TX_PREEQ_GAIN_MIC1_9
+676 0x5355 //TX_PREEQ_GAIN_MIC1_10
+677 0x585C //TX_PREEQ_GAIN_MIC1_11
+678 0x616A //TX_PREEQ_GAIN_MIC1_12
+679 0x726E //TX_PREEQ_GAIN_MIC1_13
+680 0x5C48 //TX_PREEQ_GAIN_MIC1_14
+681 0x3B38 //TX_PREEQ_GAIN_MIC1_15
682 0x4848 //TX_PREEQ_GAIN_MIC1_16
683 0x4848 //TX_PREEQ_GAIN_MIC1_17
684 0x4848 //TX_PREEQ_GAIN_MIC1_18
@@ -80798,22 +102158,22 @@
687 0x4848 //TX_PREEQ_GAIN_MIC1_21
688 0x4848 //TX_PREEQ_GAIN_MIC1_22
689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0000 //TX_PREEQ_BIN_MIC1_0
-691 0x0000 //TX_PREEQ_BIN_MIC1_1
-692 0x0000 //TX_PREEQ_BIN_MIC1_2
-693 0x0000 //TX_PREEQ_BIN_MIC1_3
-694 0x0000 //TX_PREEQ_BIN_MIC1_4
-695 0x0000 //TX_PREEQ_BIN_MIC1_5
-696 0x0000 //TX_PREEQ_BIN_MIC1_6
-697 0x0000 //TX_PREEQ_BIN_MIC1_7
-698 0x0000 //TX_PREEQ_BIN_MIC1_8
-699 0x0000 //TX_PREEQ_BIN_MIC1_9
-700 0x0000 //TX_PREEQ_BIN_MIC1_10
-701 0x0000 //TX_PREEQ_BIN_MIC1_11
-702 0x0000 //TX_PREEQ_BIN_MIC1_12
-703 0x0000 //TX_PREEQ_BIN_MIC1_13
-704 0x0000 //TX_PREEQ_BIN_MIC1_14
-705 0x0000 //TX_PREEQ_BIN_MIC1_15
+690 0x0202 //TX_PREEQ_BIN_MIC1_0
+691 0x0203 //TX_PREEQ_BIN_MIC1_1
+692 0x0303 //TX_PREEQ_BIN_MIC1_2
+693 0x0304 //TX_PREEQ_BIN_MIC1_3
+694 0x0405 //TX_PREEQ_BIN_MIC1_4
+695 0x0506 //TX_PREEQ_BIN_MIC1_5
+696 0x0708 //TX_PREEQ_BIN_MIC1_6
+697 0x090A //TX_PREEQ_BIN_MIC1_7
+698 0x0B0C //TX_PREEQ_BIN_MIC1_8
+699 0x0D0E //TX_PREEQ_BIN_MIC1_9
+700 0x1013 //TX_PREEQ_BIN_MIC1_10
+701 0x1719 //TX_PREEQ_BIN_MIC1_11
+702 0x1B1E //TX_PREEQ_BIN_MIC1_12
+703 0x1E1E //TX_PREEQ_BIN_MIC1_13
+704 0x1E28 //TX_PREEQ_BIN_MIC1_14
+705 0x3042 //TX_PREEQ_BIN_MIC1_15
706 0x0000 //TX_PREEQ_BIN_MIC1_16
707 0x0000 //TX_PREEQ_BIN_MIC1_17
708 0x0000 //TX_PREEQ_BIN_MIC1_18
@@ -80829,16 +102189,16 @@
718 0x4848 //TX_PREEQ_GAIN_MIC2_3
719 0x4848 //TX_PREEQ_GAIN_MIC2_4
720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+721 0x4849 //TX_PREEQ_GAIN_MIC2_6
+722 0x4A4A //TX_PREEQ_GAIN_MIC2_7
+723 0x4B4B //TX_PREEQ_GAIN_MIC2_8
+724 0x4C4D //TX_PREEQ_GAIN_MIC2_9
+725 0x4D4E //TX_PREEQ_GAIN_MIC2_10
+726 0x4F4F //TX_PREEQ_GAIN_MIC2_11
+727 0x504F //TX_PREEQ_GAIN_MIC2_12
+728 0x4C49 //TX_PREEQ_GAIN_MIC2_13
+729 0x4A4C //TX_PREEQ_GAIN_MIC2_14
+730 0x4F5E //TX_PREEQ_GAIN_MIC2_15
731 0x4848 //TX_PREEQ_GAIN_MIC2_16
732 0x4848 //TX_PREEQ_GAIN_MIC2_17
733 0x4848 //TX_PREEQ_GAIN_MIC2_18
@@ -80847,22 +102207,22 @@
736 0x4848 //TX_PREEQ_GAIN_MIC2_21
737 0x4848 //TX_PREEQ_GAIN_MIC2_22
738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0000 //TX_PREEQ_BIN_MIC2_0
-740 0x0000 //TX_PREEQ_BIN_MIC2_1
-741 0x0000 //TX_PREEQ_BIN_MIC2_2
-742 0x0000 //TX_PREEQ_BIN_MIC2_3
-743 0x0000 //TX_PREEQ_BIN_MIC2_4
-744 0x0000 //TX_PREEQ_BIN_MIC2_5
-745 0x0000 //TX_PREEQ_BIN_MIC2_6
-746 0x0000 //TX_PREEQ_BIN_MIC2_7
-747 0x0000 //TX_PREEQ_BIN_MIC2_8
-748 0x0000 //TX_PREEQ_BIN_MIC2_9
-749 0x0000 //TX_PREEQ_BIN_MIC2_10
-750 0x0000 //TX_PREEQ_BIN_MIC2_11
-751 0x0000 //TX_PREEQ_BIN_MIC2_12
-752 0x0000 //TX_PREEQ_BIN_MIC2_13
-753 0x0000 //TX_PREEQ_BIN_MIC2_14
-754 0x0000 //TX_PREEQ_BIN_MIC2_15
+739 0x0202 //TX_PREEQ_BIN_MIC2_0
+740 0x0203 //TX_PREEQ_BIN_MIC2_1
+741 0x0303 //TX_PREEQ_BIN_MIC2_2
+742 0x0304 //TX_PREEQ_BIN_MIC2_3
+743 0x0405 //TX_PREEQ_BIN_MIC2_4
+744 0x0506 //TX_PREEQ_BIN_MIC2_5
+745 0x0708 //TX_PREEQ_BIN_MIC2_6
+746 0x090A //TX_PREEQ_BIN_MIC2_7
+747 0x0B0C //TX_PREEQ_BIN_MIC2_8
+748 0x0D0E //TX_PREEQ_BIN_MIC2_9
+749 0x1013 //TX_PREEQ_BIN_MIC2_10
+750 0x1719 //TX_PREEQ_BIN_MIC2_11
+751 0x1B1E //TX_PREEQ_BIN_MIC2_12
+752 0x1E1E //TX_PREEQ_BIN_MIC2_13
+753 0x1E28 //TX_PREEQ_BIN_MIC2_14
+754 0x363C //TX_PREEQ_BIN_MIC2_15
755 0x0000 //TX_PREEQ_BIN_MIC2_16
756 0x0000 //TX_PREEQ_BIN_MIC2_17
757 0x0000 //TX_PREEQ_BIN_MIC2_18
@@ -80872,34 +102232,34 @@
761 0x0000 //TX_PREEQ_BIN_MIC2_22
762 0x0000 //TX_PREEQ_BIN_MIC2_23
763 0x0006 //TX_MASKING_ABILITY
-764 0x2000 //TX_NND_WEIGHT
-765 0x0064 //TX_MIC_CALIBRATION_0
-766 0x006A //TX_MIC_CALIBRATION_1
-767 0x006A //TX_MIC_CALIBRATION_2
-768 0x006B //TX_MIC_CALIBRATION_3
-769 0x0048 //TX_MIC_PWR_BIAS_0
-770 0x003C //TX_MIC_PWR_BIAS_1
-771 0x003C //TX_MIC_PWR_BIAS_2
-772 0x003C //TX_MIC_PWR_BIAS_3
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
-774 0x0009 //TX_GAIN_LIMIT_1
-775 0x000C //TX_GAIN_LIMIT_2
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
776 0x000F //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
778 0x7FDE //TX_BVE_VAD0_ALPHAUP
779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
-783 0x3000 //TX_TDDRC_ALPHA_UP_01
-784 0x3000 //TX_TDDRC_ALPHA_UP_02
-785 0x3000 //TX_TDDRC_ALPHA_UP_03
-786 0x3000 //TX_TDDRC_ALPHA_UP_04
-787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
-788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
-789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
-790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
-791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
793 0x0000 //TX_TDDRC_RESRV_0
794 0x0000 //TX_TDDRC_RESRV_1
@@ -80924,16 +102284,16 @@
813 0x5333 //TX_FDDRC_SLANT_1_1
814 0x5333 //TX_FDDRC_SLANT_1_2
815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0002 //TX_DEADMIC_SILENCE_TH
-817 0x0147 //TX_MIC_DEGRADE_TH
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
818 0x0078 //TX_DEADMIC_CNT
819 0x0078 //TX_MIC_DEGRADE_CNT
820 0x0000 //TX_FDDRC_RESRV_4
821 0x0000 //TX_FDDRC_RESRV_5
822 0x0000 //TX_FDDRC_RESRV_6
-823 0x0000 //TX_KS_NOISEPASTE_FACTOR
-824 0x0000 //TX_KS_CONFIG
-825 0x0000 //TX_KS_GAIN_MIN
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
826 0x0000 //TX_KS_RESRV_0
827 0x0000 //TX_KS_RESRV_1
828 0x0000 //TX_KS_RESRV_2
@@ -80941,10 +102301,10 @@
830 0x2000 //TX_TPKA_FP
831 0x0080 //TX_MIN_G_FP
832 0x2000 //TX_MAX_G_FP
-833 0x0000 //TX_FFP_FP_K_METAL
-834 0x0000 //TX_A_POST_FLT_FP
-835 0x0000 //TX_RTO_OUTBEAM_TH
-836 0x0000 //TX_TPKA_FP_THD
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
837 0x0000 //TX_MAX_G_FP_BLK
838 0x0000 //TX_FFP_FADEIN
839 0x0000 //TX_FFP_FADEOUT
@@ -80954,51 +102314,51 @@
843 0x0000 //TX_WHISP_ENTHL
844 0x0000 //TX_WHISP_RTOTH
845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
+846 0x0096 //TX_MUTE_PERIOD
847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0000 //TX_FFP_RESRV_2
-849 0x0000 //TX_FFP_RESRV_3
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
850 0x0000 //TX_FFP_RESRV_4
851 0x0000 //TX_FFP_RESRV_5
852 0x0000 //TX_FFP_RESRV_6
853 0x0002 //TX_FILTINDX
-854 0x0000 //TX_TDDRC_THRD_0
-855 0x0000 //TX_TDDRC_THRD_1
-856 0x0E80 //TX_TDDRC_THRD_2
-857 0x3800 //TX_TDDRC_THRD_3
-858 0x2A00 //TX_TDDRC_SLANT_0
-859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x3000 //TX_TDDRC_ALPHA_UP_00
-861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0002 //TX_TDDRC_THRD_1
+856 0x1000 //TX_TDDRC_THRD_2
+857 0x1000 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x0000 //TX_TDDRC_HMNC_GAIN
+863 0x199A //TX_TDDRC_HMNC_GAIN
864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0000 //TX_TDDRC_SMT_W
-866 0x0100 //TX_TDDRC_DRC_GAIN
-867 0x0000 //TX_TDDRC_LMT_THRD
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0E21 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x1EB8 //TX_TFMASKLTH
-870 0x170A //TX_TFMASKLTHL
-871 0x7FFF //TX_TFMASKHTH
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
872 0x0CCD //TX_TFMASKLTH_BINVAD
873 0xF333 //TX_TFMASKLTH_NS_EST
874 0x2CCD //TX_TFMASKLTH_DOA
-875 0x0CCD //TX_TFMASKTH_BLESSCUT
-876 0x4000 //TX_B_LESSCUT_RTO_MASK
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
878 0x2000 //TX_B_POST_FLT_MASK
879 0x0000 //TX_B_POST_FLT_MASK1
880 0x5333 //TX_GAIN_WIND_MASK
-881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x0000 //TX_FASTNS_OUTIN_TH
-884 0x0000 //TX_FASTNS_TFMASK_TH
-885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
-886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
-887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
888 0x00C8 //TX_FASTNS_ARSPC_TH
-889 0x8000 //TX_FASTNS_MASK5_TH
-890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
891 0x4000 //TX_A_LESSCUT_RTO_MASK
892 0x1770 //TX_FASTNS_NOISETH
893 0xC000 //TX_FASTNS_SSA_THLFL
@@ -81051,9 +102411,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x0000 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE4A8 //TX_AMS_RESRV_02
+945 0x1770 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -81071,7 +102431,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x2040 //RX_RECVFUNC_MODE_0
+0 0x0040 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0000 //RX_SAMPLINGFREQ_SIG
3 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -81922,7 +103282,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x2040 //RX_RECVFUNC_MODE_0
+157 0x0040 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0000 //RX_SAMPLINGFREQ_SIG
160 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -82773,8 +104133,8 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB
-#PARAM_MODE Full
+#CASE_NAME HEADSET-TTY_FULL-RESERVE2-SWB
+#PARAM_MODE Simple
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -83020,7 +104380,7 @@
239 0x0000 //TX_DT_RESRV_7
240 0x0000 //TX_DT_RESRV_8
241 0x0000 //TX_DT_RESRV_9
-242 0xF700 //TX_THR_SN_EST_0
+242 0xFA00 //TX_THR_SN_EST_0
243 0xF400 //TX_THR_SN_EST_1
244 0xF800 //TX_THR_SN_EST_2
245 0xF600 //TX_THR_SN_EST_3
@@ -83145,7 +104505,7 @@
364 0x0000 //TX_K_APT
365 0x0001 //TX_NOISEDET
366 0x05A0 //TX_NDETCT
-367 0x04E8 //TX_NOISE_TH_0
+367 0x0383 //TX_NOISE_TH_0
368 0x1388 //TX_NOISE_TH_0_2
369 0x3A98 //TX_NOISE_TH_0_3
370 0x0C80 //TX_NOISE_TH_1
@@ -83157,11 +104517,11 @@
376 0x7FFF //TX_NOISE_TH_5_3
377 0x7FFF //TX_NOISE_TH_5_4
378 0x00C8 //TX_NOISE_TH_6
-379 0x02BC //TX_MINENOISE_TH
+379 0x044C //TX_MINENOISE_TH
380 0xD508 //TX_MORENS_TFMASK_TH
381 0x0001 //TX_DRC_QUIET_FLOOR
382 0x3A98 //TX_RATIODTL_CUT_TH
-383 0x1482 //TX_DT_CUT_K1
+383 0x0DAC //TX_DT_CUT_K1
384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
386 0x6400 //TX_OUT_ENER_S_TH_NOISY
@@ -83184,7 +104544,7 @@
403 0x0000 //TX_POST_MASK_SUP
404 0x0000 //TX_POST_MASK_ADJUST
405 0x0014 //TX_NS_ENOISE_MIC0_TH
-406 0x04E7 //TX_MINENOISE_MIC0_TH
+406 0x02F3 //TX_MINENOISE_MIC0_TH
407 0x0226 //TX_MINENOISE_MIC0_S_TH
408 0x2879 //TX_MIN_G_CTRL_SSNS
409 0x0400 //TX_METAL_RTO_THR
@@ -83667,9 +105027,9 @@
886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
888 0x00C8 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7000 //TX_A_LESSCUT_RTO_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
892 0x1770 //TX_FASTNS_NOISETH
893 0xC000 //TX_FASTNS_SSA_THLFL
894 0xC000 //TX_FASTNS_SSA_THHFL
@@ -83741,7 +105101,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x2040 //RX_RECVFUNC_MODE_0
+0 0x0040 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0000 //RX_SAMPLINGFREQ_SIG
3 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -84592,7 +105952,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x2040 //RX_RECVFUNC_MODE_0
+157 0x0040 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0000 //RX_SAMPLINGFREQ_SIG
160 0x0000 //RX_SAMPLINGFREQ_PROC
diff --git a/audio/panther/tuning/fortemedia/BLUETOOTH.dat b/audio/panther/tuning/fortemedia/BLUETOOTH.dat
index 53464c79519082f98153e43e84de534a006458d9..a58720875dc77015ff2f6322952e7a1b4306e30c 100644
GIT binary patch
delta 772
zcmaEMnfKFYfeB*FH!N8;N*>c>%-{S#vz>|2VRD8}+vGzlEjFv^x-u~`P0rC@#mKT*
z+~7PbBg5p~n>04_n>91BO?a_^`GMZ#3*BCuA6ZP1Vk>4~VyMaAToXKviE9DVN`?~*
zs~9#gPHxc21DYi=d0v<XlLEu^f&fM-F*~Na40cTS7#JDuGt97hz;K4~A%lh2<R4*j
zY;laQ82;B!ZqQZVT)k=r<K){BDx4fCj2*(Mj0_5sIU-jvvTlC8rk-)Soi-!q<oSl;
zn}ebaSXdbtSeZE|@86`dd38L{Z5&rOFgwVD-By<bblYc$+azk+nIsLCGB6k{16s12
zfx%$~Lju&P4QxQCrZMqUPgZD1<Ab^E3(#dZBEc>@!2oyJ{f0e^j0%(IG;IR9#=m(r
z6Purh4O5KYq&6|WkQisCv=A4jf*4n(mYT^2)@yC{YdgXu>Bhjs?8d+h#4OAp*YY#4
z0Wmu>!{+{YbH>d{T`7!Q42<iU4?Nhwynui6h3+Dk?Mkvt9h#H%F7Rx=_VZ57_DP3<
z-0Abm7<t;=7BFsiTfns7<m7iXoQfP1G~L4DgB^W8e&k?aVBp~A;AaHVj6gW#d=8AX
zU`B?`Dm~V`j11c^*fSdQGIDIsP-fHy`UxiN@C+h+<0Ojkh8`wtsuhfx!NRDjHz&;0
G;spSMr1!-D
delta 447
zcmezLS>V}a-U(vNXEK>LN*>c>)ZhF-vz>`iVRD8}8=FVrafSo2lTWNP+N`GQ%EZVr
zIY)mLBjaXqgY&GDcWu(#%x~7r#Kyp|fmy+C@`Y}%&5tamNU<3+Ffr8VZ>|ZR#>CaY
zxRT)n!zzY5tdkpb(zqt19%Y!2dJKps_k>wZPHK>td@qcL?*;RHh8b257%EsFGAQ^>
z@5yDBV|&5;is66#<OW^!&DE=BFiyT5p~A_O!ssKL%E-VmeNH~J(qyg34xnRRuc>F8
zZl}%2IeEUJ_~xK!0~V0ew%eC6OEYdhmXN`S?7+GtpaVC99k^W}i@BXi(qSnBgTXSO
zRm&L|99A%(I+*E0{bYrPG@%{b5C=NQKV%RIc*JmobNYl_W+^5O<?U;7nV&N<GESb;
zv<c`K|K`<9Y~CI=OflY*+Qj(6W1N}N!(5mu(p{O_8>WAF&)l|oRa*v=r~?BNvl|05
z5VJ5dFt9T7Gq5o;Y?m)%p3lUk$hRIS1`5;77rKjF7#Swt|0%vX>O#aaMuzGB3mC=Q
OPn9ulKUKyg^BDlSpqJ_Z
diff --git a/audio/panther/tuning/fortemedia/BLUETOOTH.mods b/audio/panther/tuning/fortemedia/BLUETOOTH.mods
index 7d1bd0d9..68ed4198 100644
--- a/audio/panther/tuning/fortemedia/BLUETOOTH.mods
+++ b/audio/panther/tuning/fortemedia/BLUETOOTH.mods
@@ -1,7 +1,7 @@
#PLATFORM_NAME gChip
#EXPORT_FLAG BLUETOOTH
#SINGLE_API_VER 1.2.1
-#SAVE_TIME 2022-04-01 10:57:37
+#SAVE_TIME 2022-04-15 16:52:14
#CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-FB
#PARAM_MODE FULL
@@ -2681,7 +2681,7 @@
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
2 0x00F3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0000 //TX_SAMPLINGFREQ_SIG
@@ -2843,7 +2843,7 @@
162 0x4000 //TX_MIN_EQ_RE_EST_10
163 0x6000 //TX_MIN_EQ_RE_EST_11
164 0x7FFF //TX_MIN_EQ_RE_EST_12
-165 0x2000 //TX_LAMBDA_RE_EST
+165 0x4000 //TX_LAMBDA_RE_EST
166 0x0000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x2000 //TX_GAIN_NP
@@ -2877,8 +2877,8 @@
196 0x0000 //TX_NORMENERHIGHTHL
197 0x7148 //TX_DTD_THR1_0
198 0x7148 //TX_DTD_THR1_1
-199 0x7148 //TX_DTD_THR1_2
-200 0x5DC0 //TX_DTD_THR1_3
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
201 0x7FF0 //TX_DTD_THR1_4
202 0x7FF0 //TX_DTD_THR1_5
203 0x7FF0 //TX_DTD_THR1_6
@@ -3036,7 +3036,7 @@
355 0x0800 //TX_DT_BINVAD_TH_2
356 0x0800 //TX_DT_BINVAD_TH_3
357 0x0FA0 //TX_DT_BINVAD_ENDF
-358 0x0400 //TX_C_POST_FLT_DT
+358 0x0200 //TX_C_POST_FLT_DT
359 0x4000 //TX_NS_B_POST_FLT_LESSCUT
360 0x0100 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
@@ -3079,7 +3079,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0004 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -3451,7 +3451,7 @@
770 0x0044 //TX_MIC_PWR_BIAS_1
771 0x0044 //TX_MIC_PWR_BIAS_2
772 0x0044 //TX_MIC_PWR_BIAS_3
-773 0x0009 //TX_GAIN_LIMIT_0
+773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
775 0x000F //TX_GAIN_LIMIT_2
776 0x000F //TX_GAIN_LIMIT_3
@@ -3622,8 +3622,8 @@
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
943 0x0A98 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+944 0xE890 //TX_AMS_RESRV_02
+945 0x2EE0 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -5350,8 +5350,8 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x0073 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0001 //TX_SAMPLINGFREQ_SIG
@@ -5517,9 +5517,9 @@
166 0x4000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x5000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x02A0 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
-171 0x05DC //TX_DT2_HOLD_N
+171 0x01B0 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
173 0x0000 //TX_AEC_RESRV_1
174 0x0014 //TX_AEC_RESRV_2
@@ -5545,9 +5545,9 @@
194 0x0000 //TX_NORMENERTH
195 0x0000 //TX_NORMENERHIGHTH
196 0x0000 //TX_NORMENERHIGHTHL
-197 0x6590 //TX_DTD_THR1_0
-198 0x6590 //TX_DTD_THR1_1
-199 0x6590 //TX_DTD_THR1_2
+197 0x7148 //TX_DTD_THR1_0
+198 0x7148 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
200 0x7FF0 //TX_DTD_THR1_3
201 0x7FF0 //TX_DTD_THR1_4
202 0x7FF0 //TX_DTD_THR1_5
@@ -5562,7 +5562,7 @@
211 0x7FFF //TX_DTD_THR3
212 0x0000 //TX_SPK_CUT_K
213 0x07D0 //TX_DT_CUT_K
-214 0x0100 //TX_DT_CUT_THR
+214 0x0020 //TX_DT_CUT_THR
215 0x04EB //TX_COMFORT_G
216 0x01F4 //TX_POWER_YOUT_TH
217 0x4000 //TX_FDPFGAINECHO
@@ -5571,10 +5571,10 @@
220 0x0000 //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x03E8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x0578 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+225 0x01CC //TX_RATIO_DT_L_TH_HIGH
+226 0x4A38 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -5582,7 +5582,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH
+234 0x015E //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -5704,9 +5704,9 @@
353 0x0200 //TX_DT_BINVAD_TH_0
354 0x0200 //TX_DT_BINVAD_TH_1
355 0x0200 //TX_DT_BINVAD_TH_2
-356 0x0200 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0800 //TX_C_POST_FLT_DT
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1388 //TX_DT_BINVAD_ENDF
+358 0x2000 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
360 0x0140 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
@@ -5749,7 +5749,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x4000 //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -6121,8 +6121,8 @@
770 0x0046 //TX_MIC_PWR_BIAS_1
771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x0009 //TX_GAIN_LIMIT_0
-774 0x000F //TX_GAIN_LIMIT_1
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
775 0x000F //TX_GAIN_LIMIT_2
776 0x000F //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
@@ -6292,8 +6292,8 @@
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
943 0x0C97 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+944 0xD508 //TX_AMS_RESRV_02
+945 0x1F40 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -8020,8 +8020,8 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x00B3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0003 //TX_SAMPLINGFREQ_SIG
@@ -8183,13 +8183,13 @@
162 0x7800 //TX_MIN_EQ_RE_EST_10
163 0x7800 //TX_MIN_EQ_RE_EST_11
164 0x7800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
+165 0x3000 //TX_LAMBDA_RE_EST
166 0x3000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x4000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x0260 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
-171 0x05DC //TX_DT2_HOLD_N
+171 0x0680 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
173 0x0000 //TX_AEC_RESRV_1
174 0x0014 //TX_AEC_RESRV_2
@@ -8215,7 +8215,7 @@
194 0x0000 //TX_NORMENERTH
195 0x0000 //TX_NORMENERHIGHTH
196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7FF0 //TX_DTD_THR1_0
+197 0x7B0C //TX_DTD_THR1_0
198 0x7FF0 //TX_DTD_THR1_1
199 0x7FF0 //TX_DTD_THR1_2
200 0x7FF0 //TX_DTD_THR1_3
@@ -8241,18 +8241,18 @@
220 0x7FFF //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1F40 //TX_RATIO_DT_L_TH_HIGH
-226 0x5014 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
+225 0x01F4 //TX_RATIO_DT_L_TH_HIGH
+226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x2328 //TX_RATIO_DT_L0_TH_HIGH
+234 0x00C8 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -8374,7 +8374,7 @@
353 0x0040 //TX_DT_BINVAD_TH_0
354 0x0040 //TX_DT_BINVAD_TH_1
355 0x0100 //TX_DT_BINVAD_TH_2
-356 0x0100 //TX_DT_BINVAD_TH_3
+356 0x2000 //TX_DT_BINVAD_TH_3
357 0x36B0 //TX_DT_BINVAD_ENDF
358 0x0200 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
@@ -8419,7 +8419,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -8590,17 +8590,17 @@
569 0x4850 //TX_FDEQ_GAIN_2
570 0x5050 //TX_FDEQ_GAIN_3
571 0x4B48 //TX_FDEQ_GAIN_4
-572 0x484B //TX_FDEQ_GAIN_5
-573 0x4B5C //TX_FDEQ_GAIN_6
+572 0x484E //TX_FDEQ_GAIN_5
+573 0x4E5C //TX_FDEQ_GAIN_6
574 0x564E //TX_FDEQ_GAIN_7
575 0x4C4E //TX_FDEQ_GAIN_8
576 0x4E45 //TX_FDEQ_GAIN_9
577 0x494A //TX_FDEQ_GAIN_10
578 0x534D //TX_FDEQ_GAIN_11
-579 0x5C57 //TX_FDEQ_GAIN_12
-580 0x5667 //TX_FDEQ_GAIN_13
-581 0x6778 //TX_FDEQ_GAIN_14
-582 0x8087 //TX_FDEQ_GAIN_15
+579 0x5C54 //TX_FDEQ_GAIN_12
+580 0x5466 //TX_FDEQ_GAIN_13
+581 0x5C70 //TX_FDEQ_GAIN_14
+582 0x7C84 //TX_FDEQ_GAIN_15
583 0x4848 //TX_FDEQ_GAIN_16
584 0x4848 //TX_FDEQ_GAIN_17
585 0x4848 //TX_FDEQ_GAIN_18
@@ -8788,12 +8788,12 @@
767 0x0050 //TX_MIC_CALIBRATION_2
768 0x0050 //TX_MIC_CALIBRATION_3
769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
+770 0x0046 //TX_MIC_PWR_BIAS_1
771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
-775 0x0000 //TX_GAIN_LIMIT_2
+775 0x000F //TX_GAIN_LIMIT_2
776 0x0000 //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
778 0x7FDE //TX_BVE_VAD0_ALPHAUP
@@ -8961,9 +8961,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0E21 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE0C0 //TX_AMS_RESRV_02
+945 0x0FA0 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -13358,7 +13358,7 @@
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
-0 0x0000 //TX_OPERATION_MODE_0
+0 0x0008 //TX_OPERATION_MODE_0
1 0x0008 //TX_OPERATION_MODE_1
2 0x0033 //TX_PATCH_REG
3 0x0240 //TX_SENDFUNC_MODE_0
@@ -16024,7 +16024,7 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-WB
-#PARAM_MODE Full
+#PARAM_MODE FULL
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -18694,7 +18694,7 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-SWB
-#PARAM_MODE Full
+#PARAM_MODE FULL
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -21364,7 +21364,7 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-FB
-#PARAM_MODE Full
+#PARAM_MODE FULL
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -24038,7 +24038,7 @@
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
-0 0x0000 //TX_OPERATION_MODE_0
+0 0x0008 //TX_OPERATION_MODE_0
1 0x0008 //TX_OPERATION_MODE_1
2 0x0033 //TX_PATCH_REG
3 0x2A68 //TX_SENDFUNC_MODE_0
@@ -43616,64 +43616,13414 @@
885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x0028 //TX_FASTNS_ARSPC_TH
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x2064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000A //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7000 //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x0064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0004 //RX_SAMPLINGFREQ_SIG
+160 0x0004 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0500 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x000A //RX_NS_LVL_CTRL
+180 0xF600 //RX_THR_SN_EST
+181 0x7000 //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0A13 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4242 //TX_FDEQ_GAIN_6
+574 0x423C //TX_FDEQ_GAIN_7
+575 0x3C3C //TX_FDEQ_GAIN_8
+576 0x3434 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x206C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x206C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0000 //RX_SAMPLINGFREQ_SIG
+160 0x0000 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x3800 //RX_THR_PITCH_DET_0
+171 0x3000 //RX_THR_PITCH_DET_1
+172 0x2800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0600 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0010 //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4444 //TX_FDEQ_GAIN_7
+575 0x4444 //TX_FDEQ_GAIN_8
+576 0x3C3C //TX_FDEQ_GAIN_9
+577 0x3C3C //TX_FDEQ_GAIN_10
+578 0x3C3C //TX_FDEQ_GAIN_11
+579 0x3C30 //TX_FDEQ_GAIN_12
+580 0x3030 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1112 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x206C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x206C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0001 //RX_SAMPLINGFREQ_SIG
+160 0x0001 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x3800 //RX_THR_PITCH_DET_0
+171 0x3000 //RX_THR_PITCH_DET_1
+172 0x2800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0600 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0010 //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x2064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x2064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x286A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x4500 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0400 //TX_DELTA_THR_SN_EST_1
+252 0x0300 //TX_DELTA_THR_SN_EST_2
+253 0x0600 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0019 //TX_NS_LVL_CTRL_3
+285 0x0010 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0019 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000F //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x0011 //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x7000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0200 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x2064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000A //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7000 //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x0064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0004 //RX_SAMPLINGFREQ_SIG
+160 0x0004 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0500 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x000A //RX_NS_LVL_CTRL
+180 0xF600 //RX_THR_SN_EST
+181 0x7000 //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BT_HAC-RESERVE2-SWB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009C //TX_DIST2REF1
+22 0x0019 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0002 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0CAE //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0400 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x2000 //TX_MIN_EQ_RE_EST_0
+153 0x0600 //TX_MIN_EQ_RE_EST_1
+154 0x3000 //TX_MIN_EQ_RE_EST_2
+155 0x3000 //TX_MIN_EQ_RE_EST_3
+156 0x3000 //TX_MIN_EQ_RE_EST_4
+157 0x3000 //TX_MIN_EQ_RE_EST_5
+158 0x3000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x7800 //TX_MIN_EQ_RE_EST_8
+161 0x7800 //TX_MIN_EQ_RE_EST_9
+162 0x7800 //TX_MIN_EQ_RE_EST_10
+163 0x7800 //TX_MIN_EQ_RE_EST_11
+164 0x7800 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x3000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0260 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x0680 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7B0C //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x36B0 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x01F4 //TX_RATIO_DT_L_TH_HIGH
+226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+227 0x0001 //TX_RATIO_DT_L0_TH
+228 0x7FFF //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x00C8 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0000 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0100 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0024 //TX_NS_LVL_CTRL_2
+284 0x001A //TX_NS_LVL_CTRL_3
+285 0x0014 //TX_NS_LVL_CTRL_4
+286 0x0011 //TX_NS_LVL_CTRL_5
+287 0x001A //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x0020 //TX_MIN_GAIN_S_0
+290 0x0020 //TX_MIN_GAIN_S_1
+291 0x0020 //TX_MIN_GAIN_S_2
+292 0x0020 //TX_MIN_GAIN_S_3
+293 0x0020 //TX_MIN_GAIN_S_4
+294 0x0020 //TX_MIN_GAIN_S_5
+295 0x0020 //TX_MIN_GAIN_S_6
+296 0x0020 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x7FFF //TX_A_POST_FILT_S_0
+315 0x7FFF //TX_A_POST_FILT_S_1
+316 0x7FFF //TX_A_POST_FILT_S_2
+317 0x7FFF //TX_A_POST_FILT_S_3
+318 0x7FFF //TX_A_POST_FILT_S_4
+319 0x7FFF //TX_A_POST_FILT_S_5
+320 0x7FFF //TX_A_POST_FILT_S_6
+321 0x7FFF //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x6000 //TX_B_POST_FILT_1
+324 0x6000 //TX_B_POST_FILT_2
+325 0x6000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7F00 //TX_LAMBDA_PFILT
+339 0x7F00 //TX_LAMBDA_PFILT_S_0
+340 0x7F00 //TX_LAMBDA_PFILT_S_1
+341 0x7F00 //TX_LAMBDA_PFILT_S_2
+342 0x7F00 //TX_LAMBDA_PFILT_S_3
+343 0x7F00 //TX_LAMBDA_PFILT_S_4
+344 0x7F00 //TX_LAMBDA_PFILT_S_5
+345 0x7F00 //TX_LAMBDA_PFILT_S_6
+346 0x7F00 //TX_LAMBDA_PFILT_S_7
+347 0x3E80 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0040 //TX_DT_BINVAD_TH_0
+354 0x0040 //TX_DT_BINVAD_TH_1
+355 0x0100 //TX_DT_BINVAD_TH_2
+356 0x2000 //TX_DT_BINVAD_TH_3
+357 0x36B0 //TX_DT_BINVAD_ENDF
+358 0x0200 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x01F4 //TX_NOISE_TH_2
+372 0x36B0 //TX_NOISE_TH_3
+373 0x2710 //TX_NOISE_TH_4
+374 0x2CEC //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0DAC //TX_NOISE_TH_6
+379 0x0050 //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x07D0 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0005 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0050 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4000 //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x3000 //TX_DEREVERB_LF_MU
+515 0x34CD //TX_DEREVERB_HF_MU
+516 0x0007 //TX_DEREVERB_DELAY
+517 0x0004 //TX_DEREVERB_COEF_LEN
+518 0x0003 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x3A98 //TX_GSC_RTOL_TH
+522 0x3A98 //TX_GSC_RTOH_TH
+523 0x7E2C //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4850 //TX_FDEQ_GAIN_2
+570 0x5050 //TX_FDEQ_GAIN_3
+571 0x4B48 //TX_FDEQ_GAIN_4
+572 0x484E //TX_FDEQ_GAIN_5
+573 0x4E5C //TX_FDEQ_GAIN_6
+574 0x564E //TX_FDEQ_GAIN_7
+575 0x4C4E //TX_FDEQ_GAIN_8
+576 0x4E45 //TX_FDEQ_GAIN_9
+577 0x494A //TX_FDEQ_GAIN_10
+578 0x534D //TX_FDEQ_GAIN_11
+579 0x5C54 //TX_FDEQ_GAIN_12
+580 0x5466 //TX_FDEQ_GAIN_13
+581 0x5C70 //TX_FDEQ_GAIN_14
+582 0x7C84 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0202 //TX_PREEQ_BIN_MIC0_0
+642 0x0203 //TX_PREEQ_BIN_MIC0_1
+643 0x0303 //TX_PREEQ_BIN_MIC0_2
+644 0x0304 //TX_PREEQ_BIN_MIC0_3
+645 0x0405 //TX_PREEQ_BIN_MIC0_4
+646 0x0506 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0809 //TX_PREEQ_BIN_MIC0_7
+649 0x0A0A //TX_PREEQ_BIN_MIC0_8
+650 0x0C10 //TX_PREEQ_BIN_MIC0_9
+651 0x1013 //TX_PREEQ_BIN_MIC0_10
+652 0x1414 //TX_PREEQ_BIN_MIC0_11
+653 0x261E //TX_PREEQ_BIN_MIC0_12
+654 0x1E14 //TX_PREEQ_BIN_MIC0_13
+655 0x1414 //TX_PREEQ_BIN_MIC0_14
+656 0x2814 //TX_PREEQ_BIN_MIC0_15
+657 0x401E //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4849 //TX_PREEQ_GAIN_MIC1_7
+674 0x4A4A //TX_PREEQ_GAIN_MIC1_8
+675 0x4B4D //TX_PREEQ_GAIN_MIC1_9
+676 0x4E4F //TX_PREEQ_GAIN_MIC1_10
+677 0x5052 //TX_PREEQ_GAIN_MIC1_11
+678 0x5354 //TX_PREEQ_GAIN_MIC1_12
+679 0x5454 //TX_PREEQ_GAIN_MIC1_13
+680 0x5653 //TX_PREEQ_GAIN_MIC1_14
+681 0x4C48 //TX_PREEQ_GAIN_MIC1_15
+682 0x4444 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0202 //TX_PREEQ_BIN_MIC1_0
+691 0x0203 //TX_PREEQ_BIN_MIC1_1
+692 0x0303 //TX_PREEQ_BIN_MIC1_2
+693 0x0304 //TX_PREEQ_BIN_MIC1_3
+694 0x0405 //TX_PREEQ_BIN_MIC1_4
+695 0x0506 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0809 //TX_PREEQ_BIN_MIC1_7
+698 0x0A0A //TX_PREEQ_BIN_MIC1_8
+699 0x0C10 //TX_PREEQ_BIN_MIC1_9
+700 0x1013 //TX_PREEQ_BIN_MIC1_10
+701 0x1414 //TX_PREEQ_BIN_MIC1_11
+702 0x261E //TX_PREEQ_BIN_MIC1_12
+703 0x1E14 //TX_PREEQ_BIN_MIC1_13
+704 0x1414 //TX_PREEQ_BIN_MIC1_14
+705 0x2814 //TX_PREEQ_BIN_MIC1_15
+706 0x401E //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x494B //TX_PREEQ_GAIN_MIC2_6
+722 0x4C4D //TX_PREEQ_GAIN_MIC2_7
+723 0x4E4F //TX_PREEQ_GAIN_MIC2_8
+724 0x5051 //TX_PREEQ_GAIN_MIC2_9
+725 0x5255 //TX_PREEQ_GAIN_MIC2_10
+726 0x5754 //TX_PREEQ_GAIN_MIC2_11
+727 0x5454 //TX_PREEQ_GAIN_MIC2_12
+728 0x544F //TX_PREEQ_GAIN_MIC2_13
+729 0x463D //TX_PREEQ_GAIN_MIC2_14
+730 0x4A48 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0203 //TX_PREEQ_BIN_MIC2_0
+740 0x0303 //TX_PREEQ_BIN_MIC2_1
+741 0x0304 //TX_PREEQ_BIN_MIC2_2
+742 0x0405 //TX_PREEQ_BIN_MIC2_3
+743 0x0506 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0809 //TX_PREEQ_BIN_MIC2_6
+746 0x0A0A //TX_PREEQ_BIN_MIC2_7
+747 0x0C10 //TX_PREEQ_BIN_MIC2_8
+748 0x1013 //TX_PREEQ_BIN_MIC2_9
+749 0x1414 //TX_PREEQ_BIN_MIC2_10
+750 0x261E //TX_PREEQ_BIN_MIC2_11
+751 0x1E14 //TX_PREEQ_BIN_MIC2_12
+752 0x1414 //TX_PREEQ_BIN_MIC2_13
+753 0x2814 //TX_PREEQ_BIN_MIC2_14
+754 0x4022 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x0000 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0003 //TX_TDDRC_THRD_0
+855 0x0004 //TX_TDDRC_THRD_1
+856 0x1000 //TX_TDDRC_THRD_2
+857 0x1000 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0E21 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
889 0xC000 //TX_FASTNS_MASK5_TH
890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7000 //TX_A_LESSCUT_RTO_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
892 0x1770 //TX_FASTNS_NOISETH
893 0xC000 //TX_FASTNS_SSA_THLFL
894 0xC000 //TX_FASTNS_SSA_THHFL
895 0xCCCC //TX_FASTNS_SSA_THLFH
896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x0000 //TX_AMS_RESRV_03
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE0C0 //TX_AMS_RESRV_02
+945 0x0FA0 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -43691,31 +57041,31 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x2064 //RX_RECVFUNC_MODE_0
+0 0x0064 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0004 //RX_SAMPLINGFREQ_SIG
-3 0x0004 //RX_SAMPLINGFREQ_PROC
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
10 0x0800 //RX_PGA
11 0x7FFF //RX_A_HP
-12 0x4000 //RX_B_PE
-13 0x7800 //RX_THR_PITCH_DET_0
-14 0x7000 //RX_THR_PITCH_DET_1
-15 0x6000 //RX_THR_PITCH_DET_2
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
16 0x0008 //RX_PITCH_BFR_LEN
17 0x0003 //RX_SBD_PITCH_DET
18 0x0100 //RX_PP_RESRV_0
19 0x0020 //RX_PP_RESRV_1
-20 0x0500 //RX_N_SN_EST
+20 0x0400 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
-22 0x000A //RX_NS_LVL_CTRL
-23 0xF600 //RX_THR_SN_EST
-24 0x7000 //RX_LAMBDA_PFILT
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_FENS_RESRV_0
26 0x0190 //RX_FENS_RESRV_1
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -43756,20 +57106,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -43809,7 +57159,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -43849,10 +57199,10 @@
155 0x0000 //RX_BWE_RESRV_1
156 0x0000 //RX_BWE_RESRV_2
#VOL 0
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -43865,7 +57215,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -43899,20 +57249,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -43948,10 +57298,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -43964,7 +57314,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -43998,20 +57348,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -44047,10 +57397,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44063,7 +57413,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44097,20 +57447,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -44146,10 +57496,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44162,7 +57512,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44196,20 +57546,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -44245,10 +57595,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44261,7 +57611,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44295,20 +57645,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -44344,10 +57694,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 5
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44360,7 +57710,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44394,20 +57744,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -44443,10 +57793,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 6
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44459,7 +57809,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44493,20 +57843,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -44544,29 +57894,29 @@
#RX 2
157 0x0064 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0004 //RX_SAMPLINGFREQ_SIG
-160 0x0004 //RX_SAMPLINGFREQ_PROC
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
161 0x000A //RX_FRAME_SZ
162 0x0000 //RX_DELAY_OPT
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
167 0x0800 //RX_PGA
168 0x7FFF //RX_A_HP
-169 0x4000 //RX_B_PE
-170 0x7800 //RX_THR_PITCH_DET_0
-171 0x7000 //RX_THR_PITCH_DET_1
-172 0x6000 //RX_THR_PITCH_DET_2
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
173 0x0008 //RX_PITCH_BFR_LEN
174 0x0003 //RX_SBD_PITCH_DET
175 0x0100 //RX_PP_RESRV_0
176 0x0020 //RX_PP_RESRV_1
-177 0x0500 //RX_N_SN_EST
+177 0x0400 //RX_N_SN_EST
178 0x000C //RX_N2_SN_EST
-179 0x000A //RX_NS_LVL_CTRL
-180 0xF600 //RX_THR_SN_EST
-181 0x7000 //RX_LAMBDA_PFILT
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
182 0x000A //RX_FENS_RESRV_0
183 0x0190 //RX_FENS_RESRV_1
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -44607,20 +57957,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -44660,7 +58010,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44700,10 +58050,10 @@
312 0x0000 //RX_BWE_RESRV_1
313 0x0000 //RX_BWE_RESRV_2
#VOL 0
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44716,7 +58066,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44750,20 +58100,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -44799,10 +58149,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44815,7 +58165,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44849,20 +58199,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -44898,10 +58248,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -44914,7 +58264,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -44948,20 +58298,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -44997,10 +58347,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -45013,7 +58363,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -45047,20 +58397,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -45096,10 +58446,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -45112,7 +58462,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -45146,20 +58496,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -45195,10 +58545,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -45211,7 +58561,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -45245,20 +58595,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -45294,10 +58644,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -45310,7 +58660,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -45344,20 +58694,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -45393,19 +58743,19 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB
+#CASE_NAME BLUETOOTH-BTNB-RESERVE2-SWB
#PARAM_MODE Full
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
-0 0x0008 //TX_OPERATION_MODE_0
-1 0x0008 //TX_OPERATION_MODE_1
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
2 0x0033 //TX_PATCH_REG
-3 0x2A68 //TX_SENDFUNC_MODE_0
+3 0x0200 //TX_SENDFUNC_MODE_0
4 0x0001 //TX_SENDFUNC_MODE_1
5 0x0001 //TX_NUM_MIC
-6 0x0000 //TX_SAMPLINGFREQ_SIG
-7 0x0000 //TX_SAMPLINGFREQ_PROC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
8 0x000A //TX_FRAME_SZ_SIG
9 0x000A //TX_FRAME_SZ
10 0x0000 //TX_DELAY_OPT
@@ -45425,7 +58775,7 @@
24 0x0000 //TX_DIST2REF_04
25 0x0000 //TX_DIST2REF_05
26 0x0000 //TX_MMIC
-27 0x0A13 //TX_PGA_0
+27 0x0915 //TX_PGA_0
28 0x0800 //TX_PGA_1
29 0x0800 //TX_PGA_2
30 0x0000 //TX_PGA_3
@@ -45526,11 +58876,11 @@
125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
127 0x0010 //TX_MIC_BLOCK_N
-128 0x7D83 //TX_A_HP
+128 0x7EFF //TX_A_HP
129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
133 0x0008 //TX_PITCH_BFR_LEN
134 0x0003 //TX_SBD_PITCH_DET
135 0x0050 //TX_TD_AEC_L
@@ -45630,8 +58980,8 @@
229 0x7FFF //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x0019 //TX_EPD_OFFSET_00
-233 0x0019 //TX_EPD_OFFST_01
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
235 0x3A98 //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
@@ -45679,7 +59029,7 @@
278 0x0200 //TX_MAINREFRTO_TH_EQ
279 0x1000 //TX_B_POST_FLT_0
280 0x1000 //TX_B_POST_FLT_1
-281 0x000F //TX_NS_LVL_CTRL_0
+281 0x000B //TX_NS_LVL_CTRL_0
282 0x0011 //TX_NS_LVL_CTRL_1
283 0x000F //TX_NS_LVL_CTRL_2
284 0x000F //TX_NS_LVL_CTRL_3
@@ -45712,7 +59062,7 @@
311 0x000A //TX_MUSIC_MORENS
312 0x7FFF //TX_A_POST_FILT_0
313 0x2000 //TX_A_POST_FILT_1
-314 0x4000 //TX_A_POST_FILT_S_0
+314 0x2000 //TX_A_POST_FILT_S_0
315 0x5000 //TX_A_POST_FILT_S_1
316 0x5000 //TX_A_POST_FILT_S_2
317 0x5000 //TX_A_POST_FILT_S_3
@@ -45736,7 +59086,7 @@
335 0x7FFF //TX_B_LESSCUT_RTO_S_5
336 0x7FFF //TX_B_LESSCUT_RTO_S_6
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
+338 0x7900 //TX_LAMBDA_PFILT
339 0x7B00 //TX_LAMBDA_PFILT_S_0
340 0x7B00 //TX_LAMBDA_PFILT_S_1
341 0x7B00 //TX_LAMBDA_PFILT_S_2
@@ -45745,7 +59095,7 @@
344 0x7B00 //TX_LAMBDA_PFILT_S_5
345 0x7B00 //TX_LAMBDA_PFILT_S_6
346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
+347 0x0000 //TX_K_PEPPER
348 0x0800 //TX_A_PEPPER
349 0x1EAA //TX_K_PEPPER_HF
350 0x0800 //TX_A_PEPPER_HF
@@ -45763,7 +59113,7 @@
362 0x0005 //TX_BF_DVG_TH
363 0x001E //TX_SN_C_F
364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
+365 0x0000 //TX_NOISEDET
366 0x0190 //TX_NDETCT
367 0x0050 //TX_NOISE_TH_0
368 0x7FFF //TX_NOISE_TH_0_2
@@ -45806,11 +59156,11 @@
405 0x00C8 //TX_NS_ENOISE_MIC0_TH
406 0x0014 //TX_MINENOISE_MIC0_TH
407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x7FFF //TX_MIN_G_CTRL_SSNS
-409 0x0000 //TX_METAL_RTO_THR
-410 0x0000 //TX_NS_FP_K_METAL
-411 0x7FFF //TX_NOISEDET_BOOST_TH
-412 0x0000 //TX_NSMOOTH_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
413 0x0000 //TX_NS_RESRV_8
414 0x1800 //TX_RHO_UPB
415 0x0BB8 //TX_N_HOLD_HS
@@ -45895,8 +59245,8 @@
494 0x0000 //TX_DFLT_SRC_LOC_2
495 0x038E //TX_DOA_TRACK_VADTH
496 0x0000 //TX_DOA_TRACK_NEW
-497 0x0230 //TX_NOR_OFF_THR
-498 0x0CCD //TX_MORE_ON_700HZ_THR
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
499 0x2000 //TX_MU_BF_ADPT_NS
500 0x0000 //TX_ADAPT_LEN
501 0x6666 //TX_MORE_SNS
@@ -45964,17 +59314,17 @@
563 0x0000 //TX_BVE_OUT_N
564 0x0000 //TX_BVE_MICALPHA_DOWN
565 0x0000 //TX_PB_RESRV_1
-566 0x001C //TX_FDEQ_SUBNUM
+566 0x0020 //TX_FDEQ_SUBNUM
567 0x4848 //TX_FDEQ_GAIN_0
568 0x4848 //TX_FDEQ_GAIN_1
569 0x4848 //TX_FDEQ_GAIN_2
570 0x4848 //TX_FDEQ_GAIN_3
571 0x4848 //TX_FDEQ_GAIN_4
572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4242 //TX_FDEQ_GAIN_6
-574 0x423C //TX_FDEQ_GAIN_7
-575 0x3C3C //TX_FDEQ_GAIN_8
-576 0x3434 //TX_FDEQ_GAIN_9
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
577 0x4848 //TX_FDEQ_GAIN_10
578 0x4848 //TX_FDEQ_GAIN_11
579 0x4848 //TX_FDEQ_GAIN_12
@@ -45999,12 +59349,12 @@
598 0x090A //TX_FDEQ_BIN_7
599 0x0B0C //TX_FDEQ_BIN_8
600 0x0D0E //TX_FDEQ_BIN_9
-601 0x0E0F //TX_FDEQ_BIN_10
-602 0x0F10 //TX_FDEQ_BIN_11
-603 0x1011 //TX_FDEQ_BIN_12
-604 0x1104 //TX_FDEQ_BIN_13
-605 0x0000 //TX_FDEQ_BIN_14
-606 0x0000 //TX_FDEQ_BIN_15
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
607 0x0000 //TX_FDEQ_BIN_16
608 0x0000 //TX_FDEQ_BIN_17
609 0x0000 //TX_FDEQ_BIN_18
@@ -46023,9 +59373,9 @@
622 0x4848 //TX_PREEQ_GAIN_MIC0_5
623 0x4848 //TX_PREEQ_GAIN_MIC0_6
624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
628 0x4848 //TX_PREEQ_GAIN_MIC0_11
629 0x4848 //TX_PREEQ_GAIN_MIC0_12
630 0x4848 //TX_PREEQ_GAIN_MIC0_13
@@ -46039,21 +59389,21 @@
638 0x4848 //TX_PREEQ_GAIN_MIC0_21
639 0x4848 //TX_PREEQ_GAIN_MIC0_22
640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0608 //TX_PREEQ_BIN_MIC0_0
-642 0x0808 //TX_PREEQ_BIN_MIC0_1
-643 0x0808 //TX_PREEQ_BIN_MIC0_2
-644 0x0808 //TX_PREEQ_BIN_MIC0_3
-645 0x0808 //TX_PREEQ_BIN_MIC0_4
-646 0x0808 //TX_PREEQ_BIN_MIC0_5
-647 0x0808 //TX_PREEQ_BIN_MIC0_6
-648 0x0808 //TX_PREEQ_BIN_MIC0_7
-649 0x0808 //TX_PREEQ_BIN_MIC0_8
-650 0x0808 //TX_PREEQ_BIN_MIC0_9
-651 0x0808 //TX_PREEQ_BIN_MIC0_10
-652 0x0808 //TX_PREEQ_BIN_MIC0_11
-653 0x0808 //TX_PREEQ_BIN_MIC0_12
-654 0x0808 //TX_PREEQ_BIN_MIC0_13
-655 0x0808 //TX_PREEQ_BIN_MIC0_14
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
656 0x0200 //TX_PREEQ_BIN_MIC0_15
657 0x0000 //TX_PREEQ_BIN_MIC0_16
658 0x0000 //TX_PREEQ_BIN_MIC0_17
@@ -46088,21 +59438,21 @@
687 0x4848 //TX_PREEQ_GAIN_MIC1_21
688 0x4848 //TX_PREEQ_GAIN_MIC1_22
689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0608 //TX_PREEQ_BIN_MIC1_0
-691 0x0808 //TX_PREEQ_BIN_MIC1_1
-692 0x0808 //TX_PREEQ_BIN_MIC1_2
-693 0x0808 //TX_PREEQ_BIN_MIC1_3
-694 0x0808 //TX_PREEQ_BIN_MIC1_4
-695 0x0808 //TX_PREEQ_BIN_MIC1_5
-696 0x0808 //TX_PREEQ_BIN_MIC1_6
-697 0x0808 //TX_PREEQ_BIN_MIC1_7
-698 0x0808 //TX_PREEQ_BIN_MIC1_8
-699 0x0808 //TX_PREEQ_BIN_MIC1_9
-700 0x0808 //TX_PREEQ_BIN_MIC1_10
-701 0x0808 //TX_PREEQ_BIN_MIC1_11
-702 0x0808 //TX_PREEQ_BIN_MIC1_12
-703 0x0808 //TX_PREEQ_BIN_MIC1_13
-704 0x0808 //TX_PREEQ_BIN_MIC1_14
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
705 0x0200 //TX_PREEQ_BIN_MIC1_15
706 0x0000 //TX_PREEQ_BIN_MIC1_16
707 0x0000 //TX_PREEQ_BIN_MIC1_17
@@ -46137,21 +59487,21 @@
736 0x4848 //TX_PREEQ_GAIN_MIC2_21
737 0x4848 //TX_PREEQ_GAIN_MIC2_22
738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0608 //TX_PREEQ_BIN_MIC2_0
-740 0x0808 //TX_PREEQ_BIN_MIC2_1
-741 0x0808 //TX_PREEQ_BIN_MIC2_2
-742 0x0808 //TX_PREEQ_BIN_MIC2_3
-743 0x0808 //TX_PREEQ_BIN_MIC2_4
-744 0x0808 //TX_PREEQ_BIN_MIC2_5
-745 0x0808 //TX_PREEQ_BIN_MIC2_6
-746 0x0808 //TX_PREEQ_BIN_MIC2_7
-747 0x0808 //TX_PREEQ_BIN_MIC2_8
-748 0x0808 //TX_PREEQ_BIN_MIC2_9
-749 0x0808 //TX_PREEQ_BIN_MIC2_10
-750 0x0808 //TX_PREEQ_BIN_MIC2_11
-751 0x0808 //TX_PREEQ_BIN_MIC2_12
-752 0x0808 //TX_PREEQ_BIN_MIC2_13
-753 0x0808 //TX_PREEQ_BIN_MIC2_14
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
754 0x0200 //TX_PREEQ_BIN_MIC2_15
755 0x0000 //TX_PREEQ_BIN_MIC2_16
756 0x0000 //TX_PREEQ_BIN_MIC2_17
@@ -46181,15 +59531,15 @@
780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
781 0x7F5B //TX_BVE_FEVADLI_ALPHA
782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x1000 //TX_TDDRC_ALPHA_UP_01
-784 0x1000 //TX_TDDRC_ALPHA_UP_02
-785 0x1000 //TX_TDDRC_ALPHA_UP_03
-786 0x1000 //TX_TDDRC_ALPHA_UP_04
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
793 0x0000 //TX_TDDRC_RESRV_0
794 0x0000 //TX_TDDRC_RESRV_1
@@ -46231,7 +59581,7 @@
830 0x2000 //TX_TPKA_FP
831 0x0080 //TX_MIN_G_FP
832 0x2000 //TX_MAX_G_FP
-833 0x0000 //TX_FFP_FP_K_METAL
+833 0x4848 //TX_FFP_FP_K_METAL
834 0x4000 //TX_A_POST_FLT_FP
835 0x0F5C //TX_RTO_OUTBEAM_TH
836 0x4CCD //TX_TPKA_FP_THD
@@ -46258,14 +59608,14 @@
857 0x2000 //TX_TDDRC_THRD_3
858 0x3000 //TX_TDDRC_SLANT_0
859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x1000 //TX_TDDRC_ALPHA_UP_00
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
862 0x0000 //TX_TDDRC_HMNC_FLAG
863 0x199A //TX_TDDRC_HMNC_GAIN
864 0x0000 //TX_TDDRC_SMT_FLAG
865 0x0CCD //TX_TDDRC_SMT_W
-866 0x07F2 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
868 0x0000 //TX_TDDRC_LMT_ALPHA
869 0x0000 //TX_TFMASKLTH
870 0x0000 //TX_TFMASKLTHL
@@ -46286,10 +59636,10 @@
885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x00C8 //TX_FASTNS_ARSPC_TH
+888 0x0028 //TX_FASTNS_ARSPC_TH
889 0xC000 //TX_FASTNS_MASK5_TH
890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
892 0x1770 //TX_FASTNS_NOISETH
893 0xC000 //TX_FASTNS_SSA_THLFL
894 0xC000 //TX_FASTNS_SSA_THHFL
@@ -46361,10 +59711,10 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x0064 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0000 //RX_SAMPLINGFREQ_SIG
-3 0x0000 //RX_SAMPLINGFREQ_PROC
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
6 0x3000 //RX_TDDRC_ALPHA_UP_1
@@ -46374,17 +59724,17 @@
10 0x0800 //RX_PGA
11 0x7FFF //RX_A_HP
12 0x0000 //RX_B_PE
-13 0x3800 //RX_THR_PITCH_DET_0
-14 0x3000 //RX_THR_PITCH_DET_1
-15 0x2800 //RX_THR_PITCH_DET_2
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
16 0x0008 //RX_PITCH_BFR_LEN
17 0x0003 //RX_SBD_PITCH_DET
18 0x0100 //RX_PP_RESRV_0
19 0x0020 //RX_PP_RESRV_1
-20 0x0600 //RX_N_SN_EST
+20 0x0400 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
-22 0x0010 //RX_NS_LVL_CTRL
-23 0xF800 //RX_THR_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_FENS_RESRV_0
26 0x0190 //RX_FENS_RESRV_1
@@ -46399,17 +59749,17 @@
35 0x199A //RX_A_POST_FLT
36 0x0000 //RX_LMT_THRD
37 0x4000 //RX_LMT_ALPHA
-38 0x0014 //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -46434,12 +59784,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -46478,14 +59828,14 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
+124 0x0155 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
126 0x2000 //RX_TPKA_FP
127 0x2000 //RX_MIN_G_FP
@@ -46534,25 +59884,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -46577,12 +59927,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -46633,25 +59983,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -46676,12 +60026,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -46732,25 +60082,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -46775,12 +60125,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -46831,25 +60181,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -46874,12 +60224,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -46930,25 +60280,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -46973,12 +60323,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -47029,25 +60379,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -47072,12 +60422,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -47128,25 +60478,25 @@
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
42 0x4848 //RX_FDEQ_GAIN_3
43 0x4848 //RX_FDEQ_GAIN_4
44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -47171,12 +60521,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -47212,10 +60562,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x206C //RX_RECVFUNC_MODE_0
+157 0x0064 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0000 //RX_SAMPLINGFREQ_SIG
-160 0x0000 //RX_SAMPLINGFREQ_PROC
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
161 0x000A //RX_FRAME_SZ
162 0x0000 //RX_DELAY_OPT
163 0x3000 //RX_TDDRC_ALPHA_UP_1
@@ -47225,17 +60575,17 @@
167 0x0800 //RX_PGA
168 0x7FFF //RX_A_HP
169 0x0000 //RX_B_PE
-170 0x3800 //RX_THR_PITCH_DET_0
-171 0x3000 //RX_THR_PITCH_DET_1
-172 0x2800 //RX_THR_PITCH_DET_2
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
173 0x0008 //RX_PITCH_BFR_LEN
174 0x0003 //RX_SBD_PITCH_DET
175 0x0100 //RX_PP_RESRV_0
176 0x0020 //RX_PP_RESRV_1
-177 0x0600 //RX_N_SN_EST
+177 0x0400 //RX_N_SN_EST
178 0x000C //RX_N2_SN_EST
-179 0x0010 //RX_NS_LVL_CTRL
-180 0xF800 //RX_THR_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
181 0x7CCD //RX_LAMBDA_PFILT
182 0x000A //RX_FENS_RESRV_0
183 0x0190 //RX_FENS_RESRV_1
@@ -47250,17 +60600,17 @@
192 0x199A //RX_A_POST_FLT
193 0x0000 //RX_LMT_THRD
194 0x4000 //RX_LMT_ALPHA
-195 0x0014 //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47285,12 +60635,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47329,14 +60679,14 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
+281 0x0155 //RX_TDDRC_DRC_GAIN
282 0x7C00 //RX_LAMBDA_PKA_FP
283 0x2000 //RX_TPKA_FP
284 0x2000 //RX_MIN_G_FP
@@ -47385,25 +60735,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47428,12 +60778,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47484,25 +60834,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47527,12 +60877,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47583,25 +60933,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47626,12 +60976,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47682,25 +61032,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47725,12 +61075,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47781,25 +61131,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47824,12 +61174,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47880,25 +61230,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -47923,12 +61273,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -47979,25 +61329,25 @@
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -48022,12 +61372,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -48063,19 +61413,19 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB
-#PARAM_MODE Full
+#CASE_NAME BLUETOOTH-BTNB_NREC-RESERVE2-SWB
+#PARAM_MODE Simple
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
-0 0x0008 //TX_OPERATION_MODE_0
-1 0x0008 //TX_OPERATION_MODE_1
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
2 0x0033 //TX_PATCH_REG
-3 0x2A68 //TX_SENDFUNC_MODE_0
+3 0x2A28 //TX_SENDFUNC_MODE_0
4 0x0001 //TX_SENDFUNC_MODE_1
5 0x0001 //TX_NUM_MIC
-6 0x0001 //TX_SAMPLINGFREQ_SIG
-7 0x0001 //TX_SAMPLINGFREQ_PROC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
8 0x000A //TX_FRAME_SZ_SIG
9 0x000A //TX_FRAME_SZ
10 0x0000 //TX_DELAY_OPT
@@ -48196,11 +61546,11 @@
125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
127 0x0010 //TX_MIC_BLOCK_N
-128 0x7D83 //TX_A_HP
+128 0x7EFF //TX_A_HP
129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
133 0x0008 //TX_PITCH_BFR_LEN
134 0x0003 //TX_SBD_PITCH_DET
135 0x0050 //TX_TD_AEC_L
@@ -48300,8 +61650,8 @@
229 0x7FFF //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x0019 //TX_EPD_OFFSET_00
-233 0x0019 //TX_EPD_OFFST_01
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
235 0x3A98 //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
@@ -48349,7 +61699,7 @@
278 0x0200 //TX_MAINREFRTO_TH_EQ
279 0x1000 //TX_B_POST_FLT_0
280 0x1000 //TX_B_POST_FLT_1
-281 0x000F //TX_NS_LVL_CTRL_0
+281 0x000B //TX_NS_LVL_CTRL_0
282 0x0011 //TX_NS_LVL_CTRL_1
283 0x000F //TX_NS_LVL_CTRL_2
284 0x000F //TX_NS_LVL_CTRL_3
@@ -48382,7 +61732,7 @@
311 0x000A //TX_MUSIC_MORENS
312 0x7FFF //TX_A_POST_FILT_0
313 0x2000 //TX_A_POST_FILT_1
-314 0x4000 //TX_A_POST_FILT_S_0
+314 0x2000 //TX_A_POST_FILT_S_0
315 0x5000 //TX_A_POST_FILT_S_1
316 0x5000 //TX_A_POST_FILT_S_2
317 0x5000 //TX_A_POST_FILT_S_3
@@ -48406,7 +61756,7 @@
335 0x7FFF //TX_B_LESSCUT_RTO_S_5
336 0x7FFF //TX_B_LESSCUT_RTO_S_6
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
+338 0x7900 //TX_LAMBDA_PFILT
339 0x7B00 //TX_LAMBDA_PFILT_S_0
340 0x7B00 //TX_LAMBDA_PFILT_S_1
341 0x7B00 //TX_LAMBDA_PFILT_S_2
@@ -48415,7 +61765,7 @@
344 0x7B00 //TX_LAMBDA_PFILT_S_5
345 0x7B00 //TX_LAMBDA_PFILT_S_6
346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
+347 0x0000 //TX_K_PEPPER
348 0x0800 //TX_A_PEPPER
349 0x1EAA //TX_K_PEPPER_HF
350 0x0800 //TX_A_PEPPER_HF
@@ -48476,11 +61826,11 @@
405 0x00C8 //TX_NS_ENOISE_MIC0_TH
406 0x0014 //TX_MINENOISE_MIC0_TH
407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x7FFF //TX_MIN_G_CTRL_SSNS
-409 0x0000 //TX_METAL_RTO_THR
-410 0x0000 //TX_NS_FP_K_METAL
-411 0x7FFF //TX_NOISEDET_BOOST_TH
-412 0x0000 //TX_NSMOOTH_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
413 0x0000 //TX_NS_RESRV_8
414 0x1800 //TX_RHO_UPB
415 0x0BB8 //TX_N_HOLD_HS
@@ -48565,8 +61915,8 @@
494 0x0000 //TX_DFLT_SRC_LOC_2
495 0x038E //TX_DOA_TRACK_VADTH
496 0x0000 //TX_DOA_TRACK_NEW
-497 0x0230 //TX_NOR_OFF_THR
-498 0x0CCD //TX_MORE_ON_700HZ_THR
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
499 0x2000 //TX_MU_BF_ADPT_NS
500 0x0000 //TX_ADAPT_LEN
501 0x6666 //TX_MORE_SNS
@@ -48634,7 +61984,7 @@
563 0x0000 //TX_BVE_OUT_N
564 0x0000 //TX_BVE_MICALPHA_DOWN
565 0x0000 //TX_PB_RESRV_1
-566 0x001C //TX_FDEQ_SUBNUM
+566 0x0020 //TX_FDEQ_SUBNUM
567 0x4848 //TX_FDEQ_GAIN_0
568 0x4848 //TX_FDEQ_GAIN_1
569 0x4848 //TX_FDEQ_GAIN_2
@@ -48642,13 +61992,13 @@
571 0x4848 //TX_FDEQ_GAIN_4
572 0x4848 //TX_FDEQ_GAIN_5
573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4444 //TX_FDEQ_GAIN_7
-575 0x4444 //TX_FDEQ_GAIN_8
-576 0x3C3C //TX_FDEQ_GAIN_9
-577 0x3C3C //TX_FDEQ_GAIN_10
-578 0x3C3C //TX_FDEQ_GAIN_11
-579 0x3C30 //TX_FDEQ_GAIN_12
-580 0x3030 //TX_FDEQ_GAIN_13
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
581 0x4848 //TX_FDEQ_GAIN_14
582 0x4848 //TX_FDEQ_GAIN_15
583 0x4848 //TX_FDEQ_GAIN_16
@@ -48669,12 +62019,12 @@
598 0x090A //TX_FDEQ_BIN_7
599 0x0B0C //TX_FDEQ_BIN_8
600 0x0D0E //TX_FDEQ_BIN_9
-601 0x0E0F //TX_FDEQ_BIN_10
-602 0x0F10 //TX_FDEQ_BIN_11
-603 0x1011 //TX_FDEQ_BIN_12
-604 0x1112 //TX_FDEQ_BIN_13
-605 0x0000 //TX_FDEQ_BIN_14
-606 0x0000 //TX_FDEQ_BIN_15
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
607 0x0000 //TX_FDEQ_BIN_16
608 0x0000 //TX_FDEQ_BIN_17
609 0x0000 //TX_FDEQ_BIN_18
@@ -48693,9 +62043,9 @@
622 0x4848 //TX_PREEQ_GAIN_MIC0_5
623 0x4848 //TX_PREEQ_GAIN_MIC0_6
624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
628 0x4848 //TX_PREEQ_GAIN_MIC0_11
629 0x4848 //TX_PREEQ_GAIN_MIC0_12
630 0x4848 //TX_PREEQ_GAIN_MIC0_13
@@ -48709,21 +62059,21 @@
638 0x4848 //TX_PREEQ_GAIN_MIC0_21
639 0x4848 //TX_PREEQ_GAIN_MIC0_22
640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0608 //TX_PREEQ_BIN_MIC0_0
-642 0x0808 //TX_PREEQ_BIN_MIC0_1
-643 0x0808 //TX_PREEQ_BIN_MIC0_2
-644 0x0808 //TX_PREEQ_BIN_MIC0_3
-645 0x0808 //TX_PREEQ_BIN_MIC0_4
-646 0x0808 //TX_PREEQ_BIN_MIC0_5
-647 0x0808 //TX_PREEQ_BIN_MIC0_6
-648 0x0808 //TX_PREEQ_BIN_MIC0_7
-649 0x0808 //TX_PREEQ_BIN_MIC0_8
-650 0x0808 //TX_PREEQ_BIN_MIC0_9
-651 0x0808 //TX_PREEQ_BIN_MIC0_10
-652 0x0808 //TX_PREEQ_BIN_MIC0_11
-653 0x0808 //TX_PREEQ_BIN_MIC0_12
-654 0x0808 //TX_PREEQ_BIN_MIC0_13
-655 0x0808 //TX_PREEQ_BIN_MIC0_14
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
656 0x0200 //TX_PREEQ_BIN_MIC0_15
657 0x0000 //TX_PREEQ_BIN_MIC0_16
658 0x0000 //TX_PREEQ_BIN_MIC0_17
@@ -48758,21 +62108,21 @@
687 0x4848 //TX_PREEQ_GAIN_MIC1_21
688 0x4848 //TX_PREEQ_GAIN_MIC1_22
689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0608 //TX_PREEQ_BIN_MIC1_0
-691 0x0808 //TX_PREEQ_BIN_MIC1_1
-692 0x0808 //TX_PREEQ_BIN_MIC1_2
-693 0x0808 //TX_PREEQ_BIN_MIC1_3
-694 0x0808 //TX_PREEQ_BIN_MIC1_4
-695 0x0808 //TX_PREEQ_BIN_MIC1_5
-696 0x0808 //TX_PREEQ_BIN_MIC1_6
-697 0x0808 //TX_PREEQ_BIN_MIC1_7
-698 0x0808 //TX_PREEQ_BIN_MIC1_8
-699 0x0808 //TX_PREEQ_BIN_MIC1_9
-700 0x0808 //TX_PREEQ_BIN_MIC1_10
-701 0x0808 //TX_PREEQ_BIN_MIC1_11
-702 0x0808 //TX_PREEQ_BIN_MIC1_12
-703 0x0808 //TX_PREEQ_BIN_MIC1_13
-704 0x0808 //TX_PREEQ_BIN_MIC1_14
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
705 0x0200 //TX_PREEQ_BIN_MIC1_15
706 0x0000 //TX_PREEQ_BIN_MIC1_16
707 0x0000 //TX_PREEQ_BIN_MIC1_17
@@ -48807,21 +62157,21 @@
736 0x4848 //TX_PREEQ_GAIN_MIC2_21
737 0x4848 //TX_PREEQ_GAIN_MIC2_22
738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0608 //TX_PREEQ_BIN_MIC2_0
-740 0x0808 //TX_PREEQ_BIN_MIC2_1
-741 0x0808 //TX_PREEQ_BIN_MIC2_2
-742 0x0808 //TX_PREEQ_BIN_MIC2_3
-743 0x0808 //TX_PREEQ_BIN_MIC2_4
-744 0x0808 //TX_PREEQ_BIN_MIC2_5
-745 0x0808 //TX_PREEQ_BIN_MIC2_6
-746 0x0808 //TX_PREEQ_BIN_MIC2_7
-747 0x0808 //TX_PREEQ_BIN_MIC2_8
-748 0x0808 //TX_PREEQ_BIN_MIC2_9
-749 0x0808 //TX_PREEQ_BIN_MIC2_10
-750 0x0808 //TX_PREEQ_BIN_MIC2_11
-751 0x0808 //TX_PREEQ_BIN_MIC2_12
-752 0x0808 //TX_PREEQ_BIN_MIC2_13
-753 0x0808 //TX_PREEQ_BIN_MIC2_14
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
754 0x0200 //TX_PREEQ_BIN_MIC2_15
755 0x0000 //TX_PREEQ_BIN_MIC2_16
756 0x0000 //TX_PREEQ_BIN_MIC2_17
@@ -48851,15 +62201,15 @@
780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
781 0x7F5B //TX_BVE_FEVADLI_ALPHA
782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x1000 //TX_TDDRC_ALPHA_UP_01
-784 0x1000 //TX_TDDRC_ALPHA_UP_02
-785 0x1000 //TX_TDDRC_ALPHA_UP_03
-786 0x1000 //TX_TDDRC_ALPHA_UP_04
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
793 0x0000 //TX_TDDRC_RESRV_0
794 0x0000 //TX_TDDRC_RESRV_1
@@ -48901,7 +62251,7 @@
830 0x2000 //TX_TPKA_FP
831 0x0080 //TX_MIN_G_FP
832 0x2000 //TX_MAX_G_FP
-833 0x0000 //TX_FFP_FP_K_METAL
+833 0x4848 //TX_FFP_FP_K_METAL
834 0x4000 //TX_A_POST_FLT_FP
835 0x0F5C //TX_RTO_OUTBEAM_TH
836 0x4CCD //TX_TPKA_FP_THD
@@ -48928,14 +62278,14 @@
857 0x2000 //TX_TDDRC_THRD_3
858 0x3000 //TX_TDDRC_SLANT_0
859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x1000 //TX_TDDRC_ALPHA_UP_00
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
862 0x0000 //TX_TDDRC_HMNC_FLAG
863 0x199A //TX_TDDRC_HMNC_GAIN
864 0x0000 //TX_TDDRC_SMT_FLAG
865 0x0CCD //TX_TDDRC_SMT_W
-866 0x07F2 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
868 0x0000 //TX_TDDRC_LMT_ALPHA
869 0x0000 //TX_TFMASKLTH
870 0x0000 //TX_TFMASKLTHL
@@ -48956,10 +62306,10 @@
885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x00C8 //TX_FASTNS_ARSPC_TH
+888 0x0028 //TX_FASTNS_ARSPC_TH
889 0xC000 //TX_FASTNS_MASK5_TH
890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
892 0x1770 //TX_FASTNS_NOISETH
893 0xC000 //TX_FASTNS_SSA_THLFL
894 0xC000 //TX_FASTNS_SSA_THHFL
@@ -49031,30 +62381,30 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x0064 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0001 //RX_SAMPLINGFREQ_SIG
-3 0x0001 //RX_SAMPLINGFREQ_PROC
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
10 0x0800 //RX_PGA
11 0x7FFF //RX_A_HP
-12 0x4000 //RX_B_PE
-13 0x3800 //RX_THR_PITCH_DET_0
-14 0x3000 //RX_THR_PITCH_DET_1
-15 0x2800 //RX_THR_PITCH_DET_2
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
16 0x0008 //RX_PITCH_BFR_LEN
17 0x0003 //RX_SBD_PITCH_DET
18 0x0100 //RX_PP_RESRV_0
19 0x0020 //RX_PP_RESRV_1
-20 0x0600 //RX_N_SN_EST
+20 0x0400 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
-22 0x0010 //RX_NS_LVL_CTRL
-23 0xF800 //RX_THR_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_FENS_RESRV_0
26 0x0190 //RX_FENS_RESRV_1
@@ -49069,7 +62419,7 @@
35 0x199A //RX_A_POST_FLT
36 0x0000 //RX_LMT_THRD
37 0x4000 //RX_LMT_ALPHA
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49079,11 +62429,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49104,12 +62454,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49147,9 +62497,9 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -49189,10 +62539,10 @@
155 0x0000 //RX_BWE_RESRV_1
156 0x0000 //RX_BWE_RESRV_2
#VOL 0
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49203,16 +62553,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49222,11 +62572,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49247,12 +62597,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49288,10 +62638,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49302,16 +62652,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49321,11 +62671,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49346,12 +62696,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49387,10 +62737,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49401,16 +62751,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49420,11 +62770,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49445,12 +62795,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49486,10 +62836,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49500,16 +62850,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49519,11 +62869,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49544,12 +62894,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49585,10 +62935,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49599,16 +62949,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49618,11 +62968,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49643,12 +62993,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49684,10 +63034,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 5
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49698,16 +63048,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49717,11 +63067,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49742,12 +63092,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49783,10 +63133,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 6
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -49797,16 +63147,16 @@
113 0x0000 //RX_TDDRC_THRD_1
114 0x7FFF //RX_TDDRC_THRD_2
115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
+38 0x0020 //RX_FDEQ_SUBNUM
39 0x4848 //RX_FDEQ_GAIN_0
40 0x4848 //RX_FDEQ_GAIN_1
41 0x4848 //RX_FDEQ_GAIN_2
@@ -49816,11 +63166,11 @@
45 0x4848 //RX_FDEQ_GAIN_6
46 0x4848 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -49841,12 +63191,12 @@
70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -49882,30 +63232,30 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x206C //RX_RECVFUNC_MODE_0
+157 0x0064 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0001 //RX_SAMPLINGFREQ_SIG
-160 0x0001 //RX_SAMPLINGFREQ_PROC
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
161 0x000A //RX_FRAME_SZ
162 0x0000 //RX_DELAY_OPT
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
167 0x0800 //RX_PGA
168 0x7FFF //RX_A_HP
-169 0x4000 //RX_B_PE
-170 0x3800 //RX_THR_PITCH_DET_0
-171 0x3000 //RX_THR_PITCH_DET_1
-172 0x2800 //RX_THR_PITCH_DET_2
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
173 0x0008 //RX_PITCH_BFR_LEN
174 0x0003 //RX_SBD_PITCH_DET
175 0x0100 //RX_PP_RESRV_0
176 0x0020 //RX_PP_RESRV_1
-177 0x0600 //RX_N_SN_EST
+177 0x0400 //RX_N_SN_EST
178 0x000C //RX_N2_SN_EST
-179 0x0010 //RX_NS_LVL_CTRL
-180 0xF800 //RX_THR_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
181 0x7CCD //RX_LAMBDA_PFILT
182 0x000A //RX_FENS_RESRV_0
183 0x0190 //RX_FENS_RESRV_1
@@ -49920,7 +63270,7 @@
192 0x199A //RX_A_POST_FLT
193 0x0000 //RX_LMT_THRD
194 0x4000 //RX_LMT_ALPHA
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -49930,11 +63280,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -49955,12 +63305,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -49998,9 +63348,9 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -50040,10 +63390,10 @@
312 0x0000 //RX_BWE_RESRV_1
313 0x0000 //RX_BWE_RESRV_2
#VOL 0
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50054,16 +63404,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50073,11 +63423,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50098,12 +63448,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50139,10 +63489,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50153,16 +63503,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50172,11 +63522,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50197,12 +63547,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50238,10 +63588,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50252,16 +63602,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50271,11 +63621,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50296,12 +63646,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50337,10 +63687,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50351,16 +63701,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50370,11 +63720,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50395,12 +63745,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50436,10 +63786,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50450,16 +63800,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50469,11 +63819,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50494,12 +63844,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50535,10 +63885,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50549,16 +63899,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50568,11 +63918,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50593,12 +63943,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50634,10 +63984,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -50648,16 +63998,16 @@
270 0x0000 //RX_TDDRC_THRD_1
271 0x7FFF //RX_TDDRC_THRD_2
272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
+273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
+195 0x0020 //RX_FDEQ_SUBNUM
196 0x4848 //RX_FDEQ_GAIN_0
197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
@@ -50667,11 +64017,11 @@
202 0x4848 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -50692,12 +64042,12 @@
227 0x090A //RX_FDEQ_BIN_7
228 0x0B0C //RX_FDEQ_BIN_8
229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -50733,15 +64083,15 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB
-#PARAM_MODE Full
+#CASE_NAME BLUETOOTH-BTWB-RESERVE2-SWB
+#PARAM_MODE Simple
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
2 0x0033 //TX_PATCH_REG
-3 0x2A28 //TX_SENDFUNC_MODE_0
+3 0x0200 //TX_SENDFUNC_MODE_0
4 0x0001 //TX_SENDFUNC_MODE_1
5 0x0001 //TX_NUM_MIC
6 0x0003 //TX_SAMPLINGFREQ_SIG
@@ -51103,7 +64453,7 @@
362 0x0005 //TX_BF_DVG_TH
363 0x001E //TX_SN_C_F
364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
+365 0x0000 //TX_NOISEDET
366 0x0190 //TX_NDETCT
367 0x0050 //TX_NOISE_TH_0
368 0x7FFF //TX_NOISE_TH_0_2
@@ -51701,7 +65051,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x2064 //RX_RECVFUNC_MODE_0
+0 0x0064 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0003 //RX_SAMPLINGFREQ_SIG
3 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -52552,7 +65902,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x2064 //RX_RECVFUNC_MODE_0
+157 0x0064 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0003 //RX_SAMPLINGFREQ_SIG
160 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -53403,19 +66753,19 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB
-#PARAM_MODE Full
+#CASE_NAME BLUETOOTH-BTWB_NREC-RESERVE2-SWB
+#PARAM_MODE Simple
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
-0 0x0009 //TX_OPERATION_MODE_0
-1 0x0009 //TX_OPERATION_MODE_1
-2 0x0020 //TX_PATCH_REG
-3 0x286A //TX_SENDFUNC_MODE_0
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
4 0x0001 //TX_SENDFUNC_MODE_1
5 0x0001 //TX_NUM_MIC
-6 0x0004 //TX_SAMPLINGFREQ_SIG
-7 0x0004 //TX_SAMPLINGFREQ_PROC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
8 0x000A //TX_FRAME_SZ_SIG
9 0x000A //TX_FRAME_SZ
10 0x0000 //TX_DELAY_OPT
@@ -53437,7 +66787,7 @@
26 0x0000 //TX_MMIC
27 0x0915 //TX_PGA_0
28 0x0800 //TX_PGA_1
-29 0x0000 //TX_PGA_2
+29 0x0800 //TX_PGA_2
30 0x0000 //TX_PGA_3
31 0x0000 //TX_PGA_4
32 0x0000 //TX_PGA_5
@@ -53536,11 +66886,11 @@
125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
127 0x0010 //TX_MIC_BLOCK_N
-128 0x7E56 //TX_A_HP
+128 0x7EFF //TX_A_HP
129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
133 0x0008 //TX_PITCH_BFR_LEN
134 0x0003 //TX_SBD_PITCH_DET
135 0x0050 //TX_TD_AEC_L
@@ -53555,28 +66905,28 @@
144 0x0000 //TX_PP_RESRV_6
145 0x0000 //TX_PP_RESRV_7
146 0x001E //TX_TAIL_LENGTH
-147 0x0200 //TX_AEC_REF_GAIN_0
+147 0x0080 //TX_AEC_REF_GAIN_0
148 0x0800 //TX_AEC_REF_GAIN_1
149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x6000 //TX_EAD_THR
-151 0x0400 //TX_THR_RE_EST
-152 0x3000 //TX_MIN_EQ_RE_EST_0
-153 0x3000 //TX_MIN_EQ_RE_EST_1
-154 0x4000 //TX_MIN_EQ_RE_EST_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
155 0x0800 //TX_MIN_EQ_RE_EST_3
156 0x0800 //TX_MIN_EQ_RE_EST_4
157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x6000 //TX_MIN_EQ_RE_EST_6
-159 0x6000 //TX_MIN_EQ_RE_EST_7
-160 0x6000 //TX_MIN_EQ_RE_EST_8
-161 0x6000 //TX_MIN_EQ_RE_EST_9
-162 0x4000 //TX_MIN_EQ_RE_EST_10
-163 0x4000 //TX_MIN_EQ_RE_EST_11
-164 0x4000 //TX_MIN_EQ_RE_EST_12
-165 0x3000 //TX_LAMBDA_RE_EST
-166 0x4000 //TX_LAMBDA_CB_NLE
-167 0x3000 //TX_C_POST_FLT
-168 0x4500 //TX_GAIN_NP
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
169 0x00C8 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
171 0x03E8 //TX_DT2_HOLD_N
@@ -53605,23 +66955,23 @@
194 0x0000 //TX_NORMENERTH
195 0x0000 //TX_NORMENERHIGHTH
196 0x0000 //TX_NORMENERHIGHTHL
-197 0x5000 //TX_DTD_THR1_0
+197 0x7800 //TX_DTD_THR1_0
198 0x7000 //TX_DTD_THR1_1
-199 0x7F00 //TX_DTD_THR1_2
+199 0x7FFF //TX_DTD_THR1_2
200 0x7FFF //TX_DTD_THR1_3
201 0x7FFF //TX_DTD_THR1_4
202 0x7FFF //TX_DTD_THR1_5
203 0x7FFF //TX_DTD_THR1_6
-204 0x0800 //TX_DTD_THR2_0
-205 0x0800 //TX_DTD_THR2_1
-206 0x0800 //TX_DTD_THR2_2
-207 0x0800 //TX_DTD_THR2_3
-208 0x0800 //TX_DTD_THR2_4
-209 0x0100 //TX_DTD_THR2_5
-210 0x0100 //TX_DTD_THR2_6
-211 0x7FFF //TX_DTD_THR3
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
212 0x0000 //TX_SPK_CUT_K
-213 0x03E8 //TX_DT_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
214 0x0CCD //TX_DT_CUT_THR
215 0x04EB //TX_COMFORT_G
216 0x01F4 //TX_POWER_YOUT_TH
@@ -53640,8 +66990,8 @@
229 0x7FFF //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x00C0 //TX_EPD_OFFSET_00
-233 0x00C0 //TX_EPD_OFFST_01
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
235 0x3A98 //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
@@ -53650,29 +67000,29 @@
239 0x0800 //TX_DT_RESRV_7
240 0x0800 //TX_DT_RESRV_8
241 0x0000 //TX_DT_RESRV_9
-242 0xF700 //TX_THR_SN_EST_0
-243 0xFB00 //TX_THR_SN_EST_1
-244 0xFA00 //TX_THR_SN_EST_2
-245 0xF700 //TX_THR_SN_EST_3
-246 0xFA00 //TX_THR_SN_EST_4
-247 0xF600 //TX_THR_SN_EST_5
-248 0xF600 //TX_THR_SN_EST_6
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
249 0xF600 //TX_THR_SN_EST_7
-250 0x0200 //TX_DELTA_THR_SN_EST_0
-251 0x0400 //TX_DELTA_THR_SN_EST_1
-252 0x0300 //TX_DELTA_THR_SN_EST_2
-253 0x0600 //TX_DELTA_THR_SN_EST_3
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
254 0x0200 //TX_DELTA_THR_SN_EST_4
255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0200 //TX_DELTA_THR_SN_EST_6
+256 0x0000 //TX_DELTA_THR_SN_EST_6
257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x4000 //TX_LAMBDA_NN_EST_0
+258 0x6000 //TX_LAMBDA_NN_EST_0
259 0x4000 //TX_LAMBDA_NN_EST_1
260 0x4000 //TX_LAMBDA_NN_EST_2
261 0x4000 //TX_LAMBDA_NN_EST_3
262 0x4000 //TX_LAMBDA_NN_EST_4
263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x4000 //TX_LAMBDA_NN_EST_6
+264 0x6000 //TX_LAMBDA_NN_EST_6
265 0x4000 //TX_LAMBDA_NN_EST_7
266 0x0400 //TX_N_SN_EST
267 0x001E //TX_INBEAM_T
@@ -53687,57 +67037,57 @@
276 0x0800 //TX_MAINREFRTO_TH_H
277 0x0800 //TX_MAINREFRTO_TH_L
278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x2000 //TX_B_POST_FLT_0
-280 0x2000 //TX_B_POST_FLT_1
-281 0x0012 //TX_NS_LVL_CTRL_0
-282 0x0016 //TX_NS_LVL_CTRL_1
-283 0x0016 //TX_NS_LVL_CTRL_2
-284 0x0019 //TX_NS_LVL_CTRL_3
-285 0x0010 //TX_NS_LVL_CTRL_4
-286 0x0010 //TX_NS_LVL_CTRL_5
-287 0x0019 //TX_NS_LVL_CTRL_6
-288 0x0010 //TX_NS_LVL_CTRL_7
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
289 0x000C //TX_MIN_GAIN_S_0
-290 0x000C //TX_MIN_GAIN_S_1
+290 0x000F //TX_MIN_GAIN_S_1
291 0x000C //TX_MIN_GAIN_S_2
-292 0x000F //TX_MIN_GAIN_S_3
+292 0x000C //TX_MIN_GAIN_S_3
293 0x000C //TX_MIN_GAIN_S_4
294 0x000C //TX_MIN_GAIN_S_5
-295 0x0011 //TX_MIN_GAIN_S_6
-296 0x000C //TX_MIN_GAIN_S_7
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
297 0x7FFF //TX_NMOS_SUP
298 0x0000 //TX_NS_MAX_PRI_SNR_TH
299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7000 //TX_SNRI_SUP_0
-301 0x7000 //TX_SNRI_SUP_1
-302 0x7000 //TX_SNRI_SUP_2
-303 0x6000 //TX_SNRI_SUP_3
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
304 0x7FFF //TX_SNRI_SUP_4
305 0x7FFF //TX_SNRI_SUP_5
-306 0x6000 //TX_SNRI_SUP_6
+306 0x7FFF //TX_SNRI_SUP_6
307 0x7FFF //TX_SNRI_SUP_7
308 0x7FFF //TX_THR_LFNS
-309 0x0016 //TX_G_LFNS
+309 0x000E //TX_G_LFNS
310 0x09C4 //TX_GAIN0_NTH
311 0x000A //TX_MUSIC_MORENS
312 0x7FFF //TX_A_POST_FILT_0
313 0x2000 //TX_A_POST_FILT_1
-314 0x6000 //TX_A_POST_FILT_S_0
-315 0x6000 //TX_A_POST_FILT_S_1
-316 0x6000 //TX_A_POST_FILT_S_2
-317 0x6000 //TX_A_POST_FILT_S_3
-318 0x6000 //TX_A_POST_FILT_S_4
-319 0x6000 //TX_A_POST_FILT_S_5
-320 0x6000 //TX_A_POST_FILT_S_6
-321 0x6000 //TX_A_POST_FILT_S_7
-322 0x2000 //TX_B_POST_FILT_0
-323 0x4000 //TX_B_POST_FILT_1
-324 0x2000 //TX_B_POST_FILT_2
-325 0x2000 //TX_B_POST_FILT_3
-326 0x2000 //TX_B_POST_FILT_4
-327 0x2000 //TX_B_POST_FILT_5
-328 0x2000 //TX_B_POST_FILT_6
-329 0x2000 //TX_B_POST_FILT_7
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
330 0x7FFF //TX_B_LESSCUT_RTO_S_0
331 0x7FFF //TX_B_LESSCUT_RTO_S_1
332 0x7FFF //TX_B_LESSCUT_RTO_S_2
@@ -53746,19 +67096,19 @@
335 0x7FFF //TX_B_LESSCUT_RTO_S_5
336 0x7FFF //TX_B_LESSCUT_RTO_S_6
337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
-339 0x7CCD //TX_LAMBDA_PFILT_S_0
-340 0x7CCD //TX_LAMBDA_PFILT_S_1
-341 0x7CCD //TX_LAMBDA_PFILT_S_2
-342 0x7CCD //TX_LAMBDA_PFILT_S_3
-343 0x7CCD //TX_LAMBDA_PFILT_S_4
-344 0x7CCD //TX_LAMBDA_PFILT_S_5
-345 0x7CCD //TX_LAMBDA_PFILT_S_6
-346 0x7CCD //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
-348 0x0500 //TX_A_PEPPER
-349 0x1600 //TX_K_PEPPER_HF
-350 0x0400 //TX_A_PEPPER_HF
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
351 0x0001 //TX_HMNC_BST_FLG
352 0x0200 //TX_HMNC_BST_THR
353 0x0800 //TX_DT_BINVAD_TH_0
@@ -53775,19 +67125,19 @@
364 0x0000 //TX_K_APT
365 0x0001 //TX_NOISEDET
366 0x0190 //TX_NDETCT
-367 0x0020 //TX_NOISE_TH_0
+367 0x0050 //TX_NOISE_TH_0
368 0x7FFF //TX_NOISE_TH_0_2
369 0x7FFF //TX_NOISE_TH_0_3
-370 0x02A6 //TX_NOISE_TH_1
-371 0x04B0 //TX_NOISE_TH_2
-372 0x3194 //TX_NOISE_TH_3
-373 0x0960 //TX_NOISE_TH_4
-374 0x5555 //TX_NOISE_TH_5
-375 0x3FF4 //TX_NOISE_TH_5_2
-376 0x0001 //TX_NOISE_TH_5_3
-377 0x0000 //TX_NOISE_TH_5_4
-378 0x02BC //TX_NOISE_TH_6
-379 0x0020 //TX_MINENOISE_TH
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
380 0x4000 //TX_MORENS_TFMASK_TH
381 0xFFEE //TX_DRC_QUIET_FLOOR
382 0x6000 //TX_RATIODTL_CUT_TH
@@ -53814,7 +67164,7 @@
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0020 //TX_MINENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
407 0x012C //TX_MINENOISE_MIC0_S_TH
408 0x2900 //TX_MIN_G_CTRL_SSNS
409 0x0800 //TX_METAL_RTO_THR
@@ -54001,20 +67351,20 @@
590 0x4848 //TX_FDEQ_GAIN_23
591 0x0202 //TX_FDEQ_BIN_0
592 0x0203 //TX_FDEQ_BIN_1
-593 0x0304 //TX_FDEQ_BIN_2
-594 0x0405 //TX_FDEQ_BIN_3
-595 0x0607 //TX_FDEQ_BIN_4
-596 0x0809 //TX_FDEQ_BIN_5
-597 0x0A0B //TX_FDEQ_BIN_6
-598 0x0C0D //TX_FDEQ_BIN_7
-599 0x0E0F //TX_FDEQ_BIN_8
-600 0x1011 //TX_FDEQ_BIN_9
-601 0x1214 //TX_FDEQ_BIN_10
-602 0x1618 //TX_FDEQ_BIN_11
-603 0x1C1C //TX_FDEQ_BIN_12
-604 0x2020 //TX_FDEQ_BIN_13
-605 0x2020 //TX_FDEQ_BIN_14
-606 0x2011 //TX_FDEQ_BIN_15
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
607 0x0000 //TX_FDEQ_BIN_16
608 0x0000 //TX_FDEQ_BIN_17
609 0x0000 //TX_FDEQ_BIN_18
@@ -54033,9 +67383,9 @@
622 0x4848 //TX_PREEQ_GAIN_MIC0_5
623 0x4848 //TX_PREEQ_GAIN_MIC0_6
624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
628 0x4848 //TX_PREEQ_GAIN_MIC0_11
629 0x4848 //TX_PREEQ_GAIN_MIC0_12
630 0x4848 //TX_PREEQ_GAIN_MIC0_13
@@ -54172,35 +67522,35 @@
761 0x0000 //TX_PREEQ_BIN_MIC2_22
762 0x0000 //TX_PREEQ_BIN_MIC2_23
763 0x0006 //TX_MASKING_ABILITY
-764 0x2000 //TX_NND_WEIGHT
-765 0x0060 //TX_MIC_CALIBRATION_0
-766 0x0060 //TX_MIC_CALIBRATION_1
-767 0x0070 //TX_MIC_CALIBRATION_2
-768 0x0070 //TX_MIC_CALIBRATION_3
-769 0x0050 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
-772 0x0040 //TX_MIC_PWR_BIAS_3
-773 0x0009 //TX_GAIN_LIMIT_0
-774 0x000F //TX_GAIN_LIMIT_1
-775 0x000F //TX_GAIN_LIMIT_2
-776 0x000F //TX_GAIN_LIMIT_3
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
778 0x7FDE //TX_BVE_VAD0_ALPHAUP
779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
781 0x7F5B //TX_BVE_FEVADLI_ALPHA
782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x0C00 //TX_TDDRC_ALPHA_UP_01
-784 0x0C00 //TX_TDDRC_ALPHA_UP_02
-785 0x0C00 //TX_TDDRC_ALPHA_UP_03
-786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
-792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
793 0x0000 //TX_TDDRC_RESRV_0
794 0x0000 //TX_TDDRC_RESRV_1
795 0x0018 //TX_FDDRC_BAND_MARGIN_0
@@ -54261,21 +67611,21 @@
850 0x0000 //TX_FFP_RESRV_4
851 0x0000 //TX_FFP_RESRV_5
852 0x0000 //TX_FFP_RESRV_6
-853 0x0002 //TX_FILTINDX
-854 0x0001 //TX_TDDRC_THRD_0
-855 0x0001 //TX_TDDRC_THRD_1
-856 0x1900 //TX_TDDRC_THRD_2
-857 0x1900 //TX_TDDRC_THRD_3
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
858 0x3000 //TX_TDDRC_SLANT_0
-859 0x7B00 //TX_TDDRC_SLANT_1
-860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
862 0x0000 //TX_TDDRC_HMNC_FLAG
863 0x199A //TX_TDDRC_HMNC_GAIN
864 0x0000 //TX_TDDRC_SMT_FLAG
865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0200 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
868 0x0000 //TX_TDDRC_LMT_ALPHA
869 0x0000 //TX_TFMASKLTH
870 0x0000 //TX_TFMASKLTHL
@@ -54299,7 +67649,7 @@
888 0x0028 //TX_FASTNS_ARSPC_TH
889 0xC000 //TX_FASTNS_MASK5_TH
890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7000 //TX_A_LESSCUT_RTO_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
892 0x1770 //TX_FASTNS_NOISETH
893 0xC000 //TX_FASTNS_SSA_THLFL
894 0xC000 //TX_FASTNS_SSA_THHFL
@@ -54371,31 +67721,31 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x2064 //RX_RECVFUNC_MODE_0
+0 0x0064 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0004 //RX_SAMPLINGFREQ_SIG
-3 0x0004 //RX_SAMPLINGFREQ_PROC
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
10 0x0800 //RX_PGA
11 0x7FFF //RX_A_HP
-12 0x4000 //RX_B_PE
-13 0x7800 //RX_THR_PITCH_DET_0
-14 0x7000 //RX_THR_PITCH_DET_1
-15 0x6000 //RX_THR_PITCH_DET_2
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
16 0x0008 //RX_PITCH_BFR_LEN
17 0x0003 //RX_SBD_PITCH_DET
18 0x0100 //RX_PP_RESRV_0
19 0x0020 //RX_PP_RESRV_1
-20 0x0500 //RX_N_SN_EST
+20 0x0400 //RX_N_SN_EST
21 0x000C //RX_N2_SN_EST
-22 0x000A //RX_NS_LVL_CTRL
-23 0xF600 //RX_THR_SN_EST
-24 0x7000 //RX_LAMBDA_PFILT
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
25 0x000A //RX_FENS_RESRV_0
26 0x0190 //RX_FENS_RESRV_1
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -54436,20 +67786,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -54489,7 +67839,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -54529,10 +67879,10 @@
155 0x0000 //RX_BWE_RESRV_1
156 0x0000 //RX_BWE_RESRV_2
#VOL 0
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -54545,7 +67895,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -54579,20 +67929,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -54628,10 +67978,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -54644,7 +67994,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -54678,20 +68028,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -54727,10 +68077,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -54743,7 +68093,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -54777,20 +68127,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -54826,10 +68176,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -54842,7 +68192,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -54876,20 +68226,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -54925,10 +68275,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -54941,7 +68291,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -54975,20 +68325,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -55024,10 +68374,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 5
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55040,7 +68390,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55074,20 +68424,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -55123,10 +68473,10 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 6
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55139,7 +68489,7 @@
115 0x7FFF //RX_TDDRC_THRD_3
116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55173,20 +68523,20 @@
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0202 //RX_FDEQ_BIN_0
64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -55224,29 +68574,29 @@
#RX 2
157 0x0064 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0004 //RX_SAMPLINGFREQ_SIG
-160 0x0004 //RX_SAMPLINGFREQ_PROC
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
161 0x000A //RX_FRAME_SZ
162 0x0000 //RX_DELAY_OPT
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
167 0x0800 //RX_PGA
168 0x7FFF //RX_A_HP
-169 0x4000 //RX_B_PE
-170 0x7800 //RX_THR_PITCH_DET_0
-171 0x7000 //RX_THR_PITCH_DET_1
-172 0x6000 //RX_THR_PITCH_DET_2
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
173 0x0008 //RX_PITCH_BFR_LEN
174 0x0003 //RX_SBD_PITCH_DET
175 0x0100 //RX_PP_RESRV_0
176 0x0020 //RX_PP_RESRV_1
-177 0x0500 //RX_N_SN_EST
+177 0x0400 //RX_N_SN_EST
178 0x000C //RX_N2_SN_EST
-179 0x000A //RX_NS_LVL_CTRL
-180 0xF600 //RX_THR_SN_EST
-181 0x7000 //RX_LAMBDA_PFILT
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
182 0x000A //RX_FENS_RESRV_0
183 0x0190 //RX_FENS_RESRV_1
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
@@ -55287,20 +68637,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55340,7 +68690,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55380,10 +68730,10 @@
312 0x0000 //RX_BWE_RESRV_1
313 0x0000 //RX_BWE_RESRV_2
#VOL 0
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55396,7 +68746,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55430,20 +68780,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55479,10 +68829,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55495,7 +68845,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55529,20 +68879,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55578,10 +68928,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55594,7 +68944,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55628,20 +68978,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55677,10 +69027,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55693,7 +69043,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55727,20 +69077,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55776,10 +69126,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55792,7 +69142,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55826,20 +69176,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55875,10 +69225,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55891,7 +69241,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -55925,20 +69275,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -55974,10 +69324,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
@@ -55990,7 +69340,7 @@
272 0x7FFF //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
@@ -56024,20 +69374,20 @@
219 0x4848 //RX_FDEQ_GAIN_23
220 0x0202 //RX_FDEQ_BIN_0
221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
diff --git a/audio/panther/tuning/fortemedia/HANDSET.dat b/audio/panther/tuning/fortemedia/HANDSET.dat
index 740e104bd5f2489206b5bef472f015825da9969e..989c6f5c13cb5849510b93845ee5d845b2606b6c 100644
GIT binary patch
delta 298
zcmdmWmVeh-{te1Kj4GQ|dcHC828h%(FtF4&Ft9f?a7})1b$s)?zKd!=*#ld@F>)bf
zHy_wOTb)s5dxJkSl6U~e_J%;_e2K~W7q};%(iGYJ>Zjy=d`2%7pUyAK#J#=lGovCu
zR$KBVwgXk@03~tQ1vUU`S*_;u`olouij)~ALYePoG8xovj;me6xP9JK<_3<<hi=Ve
X!D-m!=wR;caSqHVT9z9%GRgx07jJF7
delta 221
zcmdmWmVeh-{te1Kj0&4odcHC8J`k>JXke&sU{Gji;F|p2>iFh&eHYb$vIn+)W8^}}
zZa%Pmw)*yZf93+I$@&+#C!f+3+5GCK<b8bREES*5FU!Qez3wxkB0p9m^Ch+eRp{_T
z3<j%)np~?nz5XyzZ;>+NL@4v!OeTZc?YkV9O*JP+2Xk+ab6|$>kMM0j)ykM51po-m
BSwa8+
diff --git a/audio/panther/tuning/fortemedia/HANDSET.mods b/audio/panther/tuning/fortemedia/HANDSET.mods
index 32ef2c67..ea5879d5 100644
--- a/audio/panther/tuning/fortemedia/HANDSET.mods
+++ b/audio/panther/tuning/fortemedia/HANDSET.mods
@@ -1,12 +1,12 @@
#PLATFORM_NAME gChip
#EXPORT_FLAG HANDSET
#SINGLE_API_VER 1.2.1
-#SAVE_TIME 2022-03-14 12:12:41
+#SAVE_TIME 2022-04-15 11:14:45
#CASE_NAME HANDSET-HANDSET-RESERVE1-FB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -2675,8 +2675,8 @@
#CASE_NAME HANDSET-HANDSET-CUSTOM2-FB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -5345,8 +5345,8 @@
#CASE_NAME HANDSET-HANDSET-CUSTOM1-FB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -8015,8 +8015,8 @@
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -8981,7 +8981,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x203C //RX_RECVFUNC_MODE_0
+0 0x243C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0000 //RX_SAMPLINGFREQ_SIG
3 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -9107,9 +9107,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x055F //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x13E0 //RX_TPKA_FP
-127 0x0080 //RX_MIN_G_FP
-128 0x2000 //RX_MAX_G_FP
+126 0x1450 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0700 //RX_MAX_G_FP
129 0x000A //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -10685,8 +10685,8 @@
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-WB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -11651,7 +11651,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x203C //RX_RECVFUNC_MODE_0
+0 0x243C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0001 //RX_SAMPLINGFREQ_SIG
3 0x0001 //RX_SAMPLINGFREQ_PROC
@@ -11777,9 +11777,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x04E6 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x13E0 //RX_TPKA_FP
-127 0x0080 //RX_MIN_G_FP
-128 0x2000 //RX_MAX_G_FP
+126 0x1450 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0700 //RX_MAX_G_FP
129 0x000B //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -13355,8 +13355,8 @@
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-SWB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -14321,7 +14321,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x203C //RX_RECVFUNC_MODE_0
+0 0x243C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0003 //RX_SAMPLINGFREQ_SIG
3 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -14447,9 +14447,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0551 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x13E0 //RX_TPKA_FP
-127 0x0080 //RX_MIN_G_FP
-128 0x2000 //RX_MAX_G_FP
+126 0x1450 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0850 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -16025,8 +16025,8 @@
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-FB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -18695,8 +18695,8 @@
#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-NB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -21365,8 +21365,8 @@
#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-WB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -24035,8 +24035,8 @@
#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -26705,8 +26705,8 @@
#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-FB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -29374,9 +29374,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET-TMOBILE_US-NB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -30341,7 +30341,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x203C //RX_RECVFUNC_MODE_0
+0 0x243C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0000 //RX_SAMPLINGFREQ_SIG
3 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -30467,9 +30467,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x055F //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x13E0 //RX_TPKA_FP
-127 0x0080 //RX_MIN_G_FP
-128 0x2000 //RX_MAX_G_FP
+126 0x1450 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0700 //RX_MAX_G_FP
129 0x000A //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -32044,9 +32044,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET-TMOBILE_US-WB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -33011,7 +33011,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x203C //RX_RECVFUNC_MODE_0
+0 0x243C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0001 //RX_SAMPLINGFREQ_SIG
3 0x0001 //RX_SAMPLINGFREQ_PROC
@@ -33137,9 +33137,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x04E6 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x13E0 //RX_TPKA_FP
-127 0x0080 //RX_MIN_G_FP
-128 0x2000 //RX_MAX_G_FP
+126 0x1450 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0700 //RX_MAX_G_FP
129 0x000B //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -34714,9 +34714,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET-TMOBILE_US-SWB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -35681,7 +35681,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x203C //RX_RECVFUNC_MODE_0
+0 0x243C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0003 //RX_SAMPLINGFREQ_SIG
3 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -35807,9 +35807,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0551 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x13E0 //RX_TPKA_FP
-127 0x0080 //RX_MIN_G_FP
-128 0x2000 //RX_MAX_G_FP
+126 0x1450 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0850 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -37384,9 +37384,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET-TMOBILE_US-FB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -40054,9 +40054,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-NB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -42724,9 +42724,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-WB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -45394,9 +45394,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-SWB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -48064,9 +48064,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-FB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -50734,9 +50734,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET-RESERVE2-SWB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -50759,7 +50759,7 @@
18 0x0000 //TX_SYS_RESRV_2
19 0x0000 //TX_SYS_RESRV_3
20 0x0000 //TX_DIST2REF0
-21 0x00A3 //TX_DIST2REF1
+21 0x009C //TX_DIST2REF1
22 0x0000 //TX_DIST2REF_02
23 0x0000 //TX_DIST2REF_03
24 0x0000 //TX_DIST2REF_04
@@ -51410,17 +51410,17 @@
669 0x4848 //TX_PREEQ_GAIN_MIC1_3
670 0x4848 //TX_PREEQ_GAIN_MIC1_4
671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x494A //TX_PREEQ_GAIN_MIC1_6
-673 0x4B4C //TX_PREEQ_GAIN_MIC1_7
-674 0x4D4E //TX_PREEQ_GAIN_MIC1_8
-675 0x4F52 //TX_PREEQ_GAIN_MIC1_9
-676 0x5355 //TX_PREEQ_GAIN_MIC1_10
-677 0x585C //TX_PREEQ_GAIN_MIC1_11
-678 0x616A //TX_PREEQ_GAIN_MIC1_12
-679 0x726E //TX_PREEQ_GAIN_MIC1_13
-680 0x5C48 //TX_PREEQ_GAIN_MIC1_14
-681 0x3B38 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4849 //TX_PREEQ_GAIN_MIC1_7
+674 0x4A4A //TX_PREEQ_GAIN_MIC1_8
+675 0x4B4D //TX_PREEQ_GAIN_MIC1_9
+676 0x4E4F //TX_PREEQ_GAIN_MIC1_10
+677 0x5052 //TX_PREEQ_GAIN_MIC1_11
+678 0x5354 //TX_PREEQ_GAIN_MIC1_12
+679 0x5454 //TX_PREEQ_GAIN_MIC1_13
+680 0x5653 //TX_PREEQ_GAIN_MIC1_14
+681 0x4C48 //TX_PREEQ_GAIN_MIC1_15
+682 0x4444 //TX_PREEQ_GAIN_MIC1_16
683 0x4848 //TX_PREEQ_GAIN_MIC1_17
684 0x4848 //TX_PREEQ_GAIN_MIC1_18
685 0x4848 //TX_PREEQ_GAIN_MIC1_19
@@ -51434,17 +51434,17 @@
693 0x0304 //TX_PREEQ_BIN_MIC1_3
694 0x0405 //TX_PREEQ_BIN_MIC1_4
695 0x0506 //TX_PREEQ_BIN_MIC1_5
-696 0x0708 //TX_PREEQ_BIN_MIC1_6
-697 0x090A //TX_PREEQ_BIN_MIC1_7
-698 0x0B0C //TX_PREEQ_BIN_MIC1_8
-699 0x0D0E //TX_PREEQ_BIN_MIC1_9
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0809 //TX_PREEQ_BIN_MIC1_7
+698 0x0A0A //TX_PREEQ_BIN_MIC1_8
+699 0x0C10 //TX_PREEQ_BIN_MIC1_9
700 0x1013 //TX_PREEQ_BIN_MIC1_10
-701 0x1719 //TX_PREEQ_BIN_MIC1_11
-702 0x1B1E //TX_PREEQ_BIN_MIC1_12
-703 0x1E1E //TX_PREEQ_BIN_MIC1_13
-704 0x1E28 //TX_PREEQ_BIN_MIC1_14
-705 0x3042 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
+701 0x1414 //TX_PREEQ_BIN_MIC1_11
+702 0x261E //TX_PREEQ_BIN_MIC1_12
+703 0x1E14 //TX_PREEQ_BIN_MIC1_13
+704 0x1414 //TX_PREEQ_BIN_MIC1_14
+705 0x2814 //TX_PREEQ_BIN_MIC1_15
+706 0x401E //TX_PREEQ_BIN_MIC1_16
707 0x0000 //TX_PREEQ_BIN_MIC1_17
708 0x0000 //TX_PREEQ_BIN_MIC1_18
709 0x0000 //TX_PREEQ_BIN_MIC1_19
@@ -51701,7 +51701,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x203C //RX_RECVFUNC_MODE_0
+0 0x243C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0003 //RX_SAMPLINGFREQ_SIG
3 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -51827,9 +51827,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0551 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x13E0 //RX_TPKA_FP
-127 0x0080 //RX_MIN_G_FP
-128 0x2000 //RX_MAX_G_FP
+126 0x1450 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0850 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -53404,9 +53404,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET-CUSTOM1-SWB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -56074,9 +56074,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET-CUSTOM2-SWB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -58744,9 +58744,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET-RESERVE1-SWB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -61414,9 +61414,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HANDSET-HANDSET_HAC-RESERVE2-SWB
-#PARAM_MODE Full
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0000 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -61439,7 +61439,7 @@
18 0x0000 //TX_SYS_RESRV_2
19 0x0000 //TX_SYS_RESRV_3
20 0x0000 //TX_DIST2REF0
-21 0x00A3 //TX_DIST2REF1
+21 0x009C //TX_DIST2REF1
22 0x0000 //TX_DIST2REF_02
23 0x0000 //TX_DIST2REF_03
24 0x0000 //TX_DIST2REF_04
@@ -62090,17 +62090,17 @@
669 0x4848 //TX_PREEQ_GAIN_MIC1_3
670 0x4848 //TX_PREEQ_GAIN_MIC1_4
671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x494A //TX_PREEQ_GAIN_MIC1_6
-673 0x4B4C //TX_PREEQ_GAIN_MIC1_7
-674 0x4D4E //TX_PREEQ_GAIN_MIC1_8
-675 0x4F52 //TX_PREEQ_GAIN_MIC1_9
-676 0x5355 //TX_PREEQ_GAIN_MIC1_10
-677 0x585C //TX_PREEQ_GAIN_MIC1_11
-678 0x616A //TX_PREEQ_GAIN_MIC1_12
-679 0x726E //TX_PREEQ_GAIN_MIC1_13
-680 0x5C48 //TX_PREEQ_GAIN_MIC1_14
-681 0x3B38 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4849 //TX_PREEQ_GAIN_MIC1_7
+674 0x4A4A //TX_PREEQ_GAIN_MIC1_8
+675 0x4B4D //TX_PREEQ_GAIN_MIC1_9
+676 0x4E4F //TX_PREEQ_GAIN_MIC1_10
+677 0x5052 //TX_PREEQ_GAIN_MIC1_11
+678 0x5354 //TX_PREEQ_GAIN_MIC1_12
+679 0x5454 //TX_PREEQ_GAIN_MIC1_13
+680 0x5653 //TX_PREEQ_GAIN_MIC1_14
+681 0x4C48 //TX_PREEQ_GAIN_MIC1_15
+682 0x4444 //TX_PREEQ_GAIN_MIC1_16
683 0x4848 //TX_PREEQ_GAIN_MIC1_17
684 0x4848 //TX_PREEQ_GAIN_MIC1_18
685 0x4848 //TX_PREEQ_GAIN_MIC1_19
@@ -62114,17 +62114,17 @@
693 0x0304 //TX_PREEQ_BIN_MIC1_3
694 0x0405 //TX_PREEQ_BIN_MIC1_4
695 0x0506 //TX_PREEQ_BIN_MIC1_5
-696 0x0708 //TX_PREEQ_BIN_MIC1_6
-697 0x090A //TX_PREEQ_BIN_MIC1_7
-698 0x0B0C //TX_PREEQ_BIN_MIC1_8
-699 0x0D0E //TX_PREEQ_BIN_MIC1_9
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0809 //TX_PREEQ_BIN_MIC1_7
+698 0x0A0A //TX_PREEQ_BIN_MIC1_8
+699 0x0C10 //TX_PREEQ_BIN_MIC1_9
700 0x1013 //TX_PREEQ_BIN_MIC1_10
-701 0x1719 //TX_PREEQ_BIN_MIC1_11
-702 0x1B1E //TX_PREEQ_BIN_MIC1_12
-703 0x1E1E //TX_PREEQ_BIN_MIC1_13
-704 0x1E28 //TX_PREEQ_BIN_MIC1_14
-705 0x3042 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
+701 0x1414 //TX_PREEQ_BIN_MIC1_11
+702 0x261E //TX_PREEQ_BIN_MIC1_12
+703 0x1E14 //TX_PREEQ_BIN_MIC1_13
+704 0x1414 //TX_PREEQ_BIN_MIC1_14
+705 0x2814 //TX_PREEQ_BIN_MIC1_15
+706 0x401E //TX_PREEQ_BIN_MIC1_16
707 0x0000 //TX_PREEQ_BIN_MIC1_17
708 0x0000 //TX_PREEQ_BIN_MIC1_18
709 0x0000 //TX_PREEQ_BIN_MIC1_19
diff --git a/audio/panther/tuning/fortemedia/HANDSFREE.dat b/audio/panther/tuning/fortemedia/HANDSFREE.dat
index 43c94455fe49e5771182013baeee3a453c3f02cc..54f3e5dc90f52f0fc1a27accc8e331ef6994384b 100644
GIT binary patch
delta 3722
zcmeH}ZA_bG6o#Mk^aCiPYc{3>Nk=MSEws=vH49s?qWj2VScA)gOT!xMx&{erw33FE
za*7RG6m{;Id+QQ25(jg2QNrs|Tq0EGHbllc=U0qMak@>+{GrCggg8%yEE>On@q-Y5
z^v9c=oILlr?{l4wh_n%r)^mFc?3S0e?B!q+ovrPnTCqm1#r0gp-N0<ZTUsJMZu5gu
z-ty$0boKsgJ&I(BNId-z6vzb~KZ7Q@G>A;uiuOzqk2Q(I&pL9w;gwkHGvX6&6Jk>l
zhTDtL>o;SaOV&N72G}T$JiqHds~(+J)sbmcU8kxYhI$BKHY>z`d7t$KHyAScWL=na
zY!4gJ=`>-mu?RcD#pnr}vARaKMYJG(9j`H*R!pO|QLBEOaTeGuztMe&YdZOHHprr^
z2LzhkLXYWEnH`piPmZtT`RqW{panL{BIQXo3}bA~W?_x$c`eBH=vBx_cfr1;JAvg3
z+leTs<nK;gQbC41(0h!l(?9A_*jA7`n>DJmec<EftU!SrKlyhy)fn<<6n>KE@)*(E
zV8RZ65w??6%>gskJ1pq*$jP@kKqU?Dk!e@&oKbaTM%7nRHWt>BjnjI&21Lc78vTu_
z`exGVZZM+9W5Tev2-||i==00=cs=N!AsbUY|FLEXh^iOU<saUu$x{C~>7_lfm*-f!
z7_)Y>8?DC}v%SKcQ`Vw7Wi4N{N7`Qq?wfx8M1Fqy@b7*OGAV9{emVM~2_Roec0n(w
zVgn|4m8+{Zt>ca=$!mt&v|AnbbNAK<xYx0shXXO|Hu#>4*Ls)74wu49JOf@=#FIUW
z&c%|g461pcK(aa@SA2F-C-s-XCV6Bu{HGmtj5SG`yTMT&plNK|ZbWyT37aY0esaFi
zXU0aa1zim#lz>w7)LCh1S7D>8jMA_g>s@!D-zTieD+G%zmv`N26X#qsIXD+h#!|_u
ztfr*oQwnB3n^=4;Y=8<q5hT^fM?<zdjOcKf(APjirpS4lXvl60Hl&8^DaCrX6+P}%
z^j(IY!0Ob1&B+q3<np@lT&S3!WZrVC*hB@SX+>!wQw*81<?&x4rg@!W<^L(3%~CG#
z6ibxiOQ4J;?uAnT3Ta0_tfl`ScZ8TSFJ#Y@68AyVJ$=EW$edlsblun&?4#eC^nD7M
z?JdlHtRGqW05X;p;!GQ|DHey4i*zBzg!P<$1B0AUK08h8|1P2N459HXxp0oqI7n!G
zkI*<oXndd0I810fPiPz=G+rPyCJ2oeX>&ioNaVmqLj@>4M-_a53jQUk_$VrsNmQ%G
zP^bI~HLA;)miaYmmwba--4(QGui~9K*HFLgTeRrM(Pj~e>ur@brl)tU2r=i&q~Yj-
z(Bxcznhq{NO=EMTsd}F5ljMC6o+_WoA}Ocf!18XwLC+`Q;3GKL9cSpIpQV#da0m|4
zNhdhChv<Y896ZBx($CXLAEECHbkY+9hKm^R{}B#KK3h1<ObjQ|ssAcwLNPzY#K@W2
Gmfrv#c%vi$
delta 1363
zcmcJNT})GF7{}k|94Jtvz|yF3wdoqreo0Hg8(eC|uOlFzLL7E@a)eT~sTBzlE%HQB
zlo`dm*$&%{#%#;R+#q?C!<A`_ABh*H$(CKQvBe8NE{J+TvWr#Uwq{Lcg2rVRZ_bl9
z|2*gY|Nj36H17e;n_e*lZnko0Q~(RTGJHlS9ll56pVILTFYCgsLT*kFh@VE?74+AW
zgKB3R7@2Y^l&>RXTC_CM#Aj__VP)qRL0!`YNWZ!eST!)R7P|&)7*_0veGWW-#)+{J
z7b-zka#05mrk5}EzE$=0JE<1AYOnPu#L!6A;1YlKd|nGQI9q1*3Gbi{f_3Dz4!N67
zw4p59F&1&)7&<Y;-L&pv{s{xn<kQ{O!JN#_CAATQu8IgG=4RKw{X$S*T!pB9yyp%X
z@43qlz5RU+RnWBDC;Ucy!tdm<I8P>O{vd<7e-aMbGieqci>!I_5fljB(6G7(NIvyn
zn^YHLJd@<LcrLY`D`&%V9|B9V5M&do)92=$g?_<R6t=MVjZ9QO7MS{wn2zAfVVbyL
z_WjN6nmEFiJ!^4`WWx<UJ8s_OKxwlRCCP;y(mMQPZv{#%ZtQIEV7pw2jg4M@s!(aA
z<1-F5c@~V;9AOLU^;`MbhRX`KqoGK`V#5wBDXzoPl6uT3rO#%@pp@sfk9EwH0YtLn
zcmIqu@}!z}&ALQ{7;B#?2Yw-&Q<<b58R3}(6&nVFykR_(6UUqw?PtyL17J>Nv83h$
zpp9SVvlq8^7wK3gkmkgwp#9JUKLeZm#SYs1H*j1Be%3TMCFnmgOo^Gct9~!Esuck+
zX+L>k4h+O{0*Pf9ks#I+EinoU07lyMu$L{)TLAj9<5a4sVgYyad_L{w<5U|(HG3h~
z%G{oX+Y57hQk@NVHQO<yI56DjL?z_H?%+C9x+{1U-6#h<{9B3LvKIr<DvXAzF*c~h
zH^6eB3#vyok3oLT`)^YDrUmupMkv(|?uY6k>P{5W`*tIH`qzYAcO=bCiw{7uFwJRN
z&<>r36@n;|Lu!i*>(!g1Frw<$Lm-2qK8xbtRMJmPt9Z!&GnU#^J^mZxH^}U1E7S}-
HAs%}L110&g
diff --git a/audio/panther/tuning/fortemedia/HANDSFREE.mods b/audio/panther/tuning/fortemedia/HANDSFREE.mods
index c2bc0451..464a4adc 100644
--- a/audio/panther/tuning/fortemedia/HANDSFREE.mods
+++ b/audio/panther/tuning/fortemedia/HANDSFREE.mods
@@ -1,7 +1,7 @@
#PLATFORM_NAME gChip
#EXPORT_FLAG HANDSFREE
#SINGLE_API_VER 1.2.1
-#SAVE_TIME 2022-04-01 13:32:27
+#SAVE_TIME 2022-04-15 15:20:38
#CASE_NAME HANDSFREE-HANDFREE-RESERVE1-FB
#PARAM_MODE FULL
@@ -8021,7 +8021,7 @@
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
2 0x00F3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0000 //TX_SAMPLINGFREQ_SIG
@@ -8183,7 +8183,7 @@
162 0x4000 //TX_MIN_EQ_RE_EST_10
163 0x6000 //TX_MIN_EQ_RE_EST_11
164 0x7FFF //TX_MIN_EQ_RE_EST_12
-165 0x2000 //TX_LAMBDA_RE_EST
+165 0x4000 //TX_LAMBDA_RE_EST
166 0x0000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x2000 //TX_GAIN_NP
@@ -8217,8 +8217,8 @@
196 0x0000 //TX_NORMENERHIGHTHL
197 0x7148 //TX_DTD_THR1_0
198 0x7148 //TX_DTD_THR1_1
-199 0x7148 //TX_DTD_THR1_2
-200 0x5DC0 //TX_DTD_THR1_3
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
201 0x7FF0 //TX_DTD_THR1_4
202 0x7FF0 //TX_DTD_THR1_5
203 0x7FF0 //TX_DTD_THR1_6
@@ -8376,7 +8376,7 @@
355 0x0800 //TX_DT_BINVAD_TH_2
356 0x0800 //TX_DT_BINVAD_TH_3
357 0x0FA0 //TX_DT_BINVAD_ENDF
-358 0x0400 //TX_C_POST_FLT_DT
+358 0x0200 //TX_C_POST_FLT_DT
359 0x4000 //TX_NS_B_POST_FLT_LESSCUT
360 0x0100 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
@@ -8419,7 +8419,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0004 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -8962,8 +8962,8 @@
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
943 0x0A98 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+944 0xE890 //TX_AMS_RESRV_02
+945 0x2EE0 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -8981,7 +8981,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x207C //RX_RECVFUNC_MODE_0
+0 0x247C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0000 //RX_SAMPLINGFREQ_SIG
3 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -9107,9 +9107,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x02D2 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
+126 0x13E0 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0B50 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -9163,13 +9163,13 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8476 //RX_FDEQ_GAIN_0
-40 0x765E //RX_FDEQ_GAIN_1
-41 0x626C //RX_FDEQ_GAIN_2
-42 0x7280 //RX_FDEQ_GAIN_3
-43 0x868C //RX_FDEQ_GAIN_4
-44 0x847C //RX_FDEQ_GAIN_5
-45 0x6662 //RX_FDEQ_GAIN_6
+39 0x8470 //RX_FDEQ_GAIN_0
+40 0x745E //RX_FDEQ_GAIN_1
+41 0x6675 //RX_FDEQ_GAIN_2
+42 0x7680 //RX_FDEQ_GAIN_3
+43 0x8684 //RX_FDEQ_GAIN_4
+44 0x7870 //RX_FDEQ_GAIN_5
+45 0x6462 //RX_FDEQ_GAIN_6
46 0x6056 //RX_FDEQ_GAIN_7
47 0x5454 //RX_FDEQ_GAIN_8
48 0x5454 //RX_FDEQ_GAIN_9
@@ -9235,7 +9235,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x006C //RX_SPK_VOL
+129 0x0047 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -9262,13 +9262,13 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8476 //RX_FDEQ_GAIN_0
-40 0x765E //RX_FDEQ_GAIN_1
-41 0x626C //RX_FDEQ_GAIN_2
-42 0x7280 //RX_FDEQ_GAIN_3
-43 0x868C //RX_FDEQ_GAIN_4
-44 0x847C //RX_FDEQ_GAIN_5
-45 0x6662 //RX_FDEQ_GAIN_6
+39 0x8470 //RX_FDEQ_GAIN_0
+40 0x745E //RX_FDEQ_GAIN_1
+41 0x6675 //RX_FDEQ_GAIN_2
+42 0x7680 //RX_FDEQ_GAIN_3
+43 0x8684 //RX_FDEQ_GAIN_4
+44 0x7870 //RX_FDEQ_GAIN_5
+45 0x6462 //RX_FDEQ_GAIN_6
46 0x6056 //RX_FDEQ_GAIN_7
47 0x5454 //RX_FDEQ_GAIN_8
48 0x5454 //RX_FDEQ_GAIN_9
@@ -9334,7 +9334,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00A4 //RX_SPK_VOL
+129 0x006B //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -9361,13 +9361,13 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8476 //RX_FDEQ_GAIN_0
-40 0x765E //RX_FDEQ_GAIN_1
-41 0x626C //RX_FDEQ_GAIN_2
-42 0x7280 //RX_FDEQ_GAIN_3
-43 0x868C //RX_FDEQ_GAIN_4
-44 0x847C //RX_FDEQ_GAIN_5
-45 0x6662 //RX_FDEQ_GAIN_6
+39 0x8470 //RX_FDEQ_GAIN_0
+40 0x745E //RX_FDEQ_GAIN_1
+41 0x6675 //RX_FDEQ_GAIN_2
+42 0x7680 //RX_FDEQ_GAIN_3
+43 0x8684 //RX_FDEQ_GAIN_4
+44 0x7870 //RX_FDEQ_GAIN_5
+45 0x6462 //RX_FDEQ_GAIN_6
46 0x6056 //RX_FDEQ_GAIN_7
47 0x5454 //RX_FDEQ_GAIN_8
48 0x5454 //RX_FDEQ_GAIN_9
@@ -9433,7 +9433,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00F6 //RX_SPK_VOL
+129 0x009F //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -9458,15 +9458,15 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0177 //RX_TDDRC_DRC_GAIN
+124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8476 //RX_FDEQ_GAIN_0
-40 0x765E //RX_FDEQ_GAIN_1
-41 0x626C //RX_FDEQ_GAIN_2
-42 0x7280 //RX_FDEQ_GAIN_3
-43 0x868C //RX_FDEQ_GAIN_4
-44 0x847C //RX_FDEQ_GAIN_5
-45 0x6662 //RX_FDEQ_GAIN_6
+39 0x8470 //RX_FDEQ_GAIN_0
+40 0x745E //RX_FDEQ_GAIN_1
+41 0x6675 //RX_FDEQ_GAIN_2
+42 0x7680 //RX_FDEQ_GAIN_3
+43 0x8684 //RX_FDEQ_GAIN_4
+44 0x7870 //RX_FDEQ_GAIN_5
+45 0x6462 //RX_FDEQ_GAIN_6
46 0x6056 //RX_FDEQ_GAIN_7
47 0x5454 //RX_FDEQ_GAIN_8
48 0x5454 //RX_FDEQ_GAIN_9
@@ -9532,7 +9532,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
+129 0x00ED //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -9546,7 +9546,7 @@
33 0x7214 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
-113 0x0004 //RX_TDDRC_THRD_1
+113 0x0002 //RX_TDDRC_THRD_1
114 0x0340 //RX_TDDRC_THRD_2
115 0x0CE0 //RX_TDDRC_THRD_3
116 0x0000 //RX_TDDRC_SLANT_0
@@ -9557,15 +9557,15 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x023E //RX_TDDRC_DRC_GAIN
+124 0x016A //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8476 //RX_FDEQ_GAIN_0
-40 0x765E //RX_FDEQ_GAIN_1
-41 0x626C //RX_FDEQ_GAIN_2
-42 0x7280 //RX_FDEQ_GAIN_3
-43 0x868C //RX_FDEQ_GAIN_4
-44 0x847C //RX_FDEQ_GAIN_5
-45 0x6662 //RX_FDEQ_GAIN_6
+39 0x8470 //RX_FDEQ_GAIN_0
+40 0x745E //RX_FDEQ_GAIN_1
+41 0x6675 //RX_FDEQ_GAIN_2
+42 0x7680 //RX_FDEQ_GAIN_3
+43 0x8684 //RX_FDEQ_GAIN_4
+44 0x7870 //RX_FDEQ_GAIN_5
+45 0x6462 //RX_FDEQ_GAIN_6
46 0x6056 //RX_FDEQ_GAIN_7
47 0x5454 //RX_FDEQ_GAIN_8
48 0x5454 //RX_FDEQ_GAIN_9
@@ -9656,15 +9656,15 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0284 //RX_TDDRC_DRC_GAIN
+124 0x020B //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8480 //RX_FDEQ_GAIN_0
-40 0x805A //RX_FDEQ_GAIN_1
+39 0x8484 //RX_FDEQ_GAIN_0
+40 0x845A //RX_FDEQ_GAIN_1
41 0x6060 //RX_FDEQ_GAIN_2
-42 0x6E7C //RX_FDEQ_GAIN_3
-43 0x808A //RX_FDEQ_GAIN_4
+42 0x6E7E //RX_FDEQ_GAIN_3
+43 0x848C //RX_FDEQ_GAIN_4
44 0x8468 //RX_FDEQ_GAIN_5
-45 0x5452 //RX_FDEQ_GAIN_6
+45 0x5852 //RX_FDEQ_GAIN_6
46 0x5448 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
48 0x4848 //RX_FDEQ_GAIN_9
@@ -9755,15 +9755,15 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0478 //RX_TDDRC_DRC_GAIN
+124 0x03C3 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8480 //RX_FDEQ_GAIN_0
-40 0x805A //RX_FDEQ_GAIN_1
+39 0x8484 //RX_FDEQ_GAIN_0
+40 0x845A //RX_FDEQ_GAIN_1
41 0x6060 //RX_FDEQ_GAIN_2
-42 0x6E7C //RX_FDEQ_GAIN_3
-43 0x808A //RX_FDEQ_GAIN_4
+42 0x6E7E //RX_FDEQ_GAIN_3
+43 0x848C //RX_FDEQ_GAIN_4
44 0x8468 //RX_FDEQ_GAIN_5
-45 0x5452 //RX_FDEQ_GAIN_6
+45 0x5852 //RX_FDEQ_GAIN_6
46 0x5448 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
48 0x4848 //RX_FDEQ_GAIN_9
@@ -10690,8 +10690,8 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x0073 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0001 //TX_SAMPLINGFREQ_SIG
@@ -10857,9 +10857,9 @@
166 0x4000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x5000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x02A0 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
-171 0x05DC //TX_DT2_HOLD_N
+171 0x01B0 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
173 0x0000 //TX_AEC_RESRV_1
174 0x0014 //TX_AEC_RESRV_2
@@ -10885,9 +10885,9 @@
194 0x0000 //TX_NORMENERTH
195 0x0000 //TX_NORMENERHIGHTH
196 0x0000 //TX_NORMENERHIGHTHL
-197 0x6590 //TX_DTD_THR1_0
-198 0x6590 //TX_DTD_THR1_1
-199 0x6590 //TX_DTD_THR1_2
+197 0x7148 //TX_DTD_THR1_0
+198 0x7148 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
200 0x7FF0 //TX_DTD_THR1_3
201 0x7FF0 //TX_DTD_THR1_4
202 0x7FF0 //TX_DTD_THR1_5
@@ -10902,7 +10902,7 @@
211 0x7FFF //TX_DTD_THR3
212 0x0000 //TX_SPK_CUT_K
213 0x07D0 //TX_DT_CUT_K
-214 0x0100 //TX_DT_CUT_THR
+214 0x0020 //TX_DT_CUT_THR
215 0x04EB //TX_COMFORT_G
216 0x01F4 //TX_POWER_YOUT_TH
217 0x4000 //TX_FDPFGAINECHO
@@ -10911,10 +10911,10 @@
220 0x0000 //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x03E8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x0578 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+225 0x01CC //TX_RATIO_DT_L_TH_HIGH
+226 0x4A38 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -10922,7 +10922,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH
+234 0x015E //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -11044,9 +11044,9 @@
353 0x0200 //TX_DT_BINVAD_TH_0
354 0x0200 //TX_DT_BINVAD_TH_1
355 0x0200 //TX_DT_BINVAD_TH_2
-356 0x0200 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0800 //TX_C_POST_FLT_DT
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1388 //TX_DT_BINVAD_ENDF
+358 0x2000 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
360 0x0140 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
@@ -11089,7 +11089,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x4000 //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -11462,7 +11462,7 @@
771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
-774 0x000F //TX_GAIN_LIMIT_1
+774 0x0009 //TX_GAIN_LIMIT_1
775 0x000F //TX_GAIN_LIMIT_2
776 0x000F //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
@@ -11632,8 +11632,8 @@
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
943 0x0C97 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+944 0xD508 //TX_AMS_RESRV_02
+945 0x1F40 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -11651,7 +11651,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x247C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0001 //RX_SAMPLINGFREQ_SIG
3 0x0001 //RX_SAMPLINGFREQ_PROC
@@ -11777,9 +11777,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0180 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
+126 0x13E0 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0B50 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -11810,20 +11810,20 @@
156 0x0000 //RX_BWE_RESRV_2
#VOL 0
6 0x6000 //RX_TDDRC_ALPHA_UP_1
-7 0x6000 //RX_TDDRC_ALPHA_UP_2
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
33 0x7214 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0002 //RX_TDDRC_THRD_0
-113 0x0004 //RX_TDDRC_THRD_1
-114 0x1C00 //RX_TDDRC_THRD_2
-115 0x1C00 //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
118 0x6000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
@@ -11831,22 +11831,22 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x02FD //RX_TDDRC_DRC_GAIN
+124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x5B51 //RX_FDEQ_GAIN_0
-40 0x4844 //RX_FDEQ_GAIN_1
-41 0x3E3B //RX_FDEQ_GAIN_2
-42 0x4143 //RX_FDEQ_GAIN_3
-43 0x4348 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4856 //RX_FDEQ_GAIN_6
-46 0x5F59 //RX_FDEQ_GAIN_7
-47 0x5148 //RX_FDEQ_GAIN_8
-48 0x4C5A //RX_FDEQ_GAIN_9
-49 0x6055 //RX_FDEQ_GAIN_10
-50 0x4E4E //RX_FDEQ_GAIN_11
-51 0x4E4E //RX_FDEQ_GAIN_12
-52 0x5262 //RX_FDEQ_GAIN_13
+39 0x8478 //RX_FDEQ_GAIN_0
+40 0x6864 //RX_FDEQ_GAIN_1
+41 0x6C70 //RX_FDEQ_GAIN_2
+42 0x788C //RX_FDEQ_GAIN_3
+43 0x8686 //RX_FDEQ_GAIN_4
+44 0x7C7A //RX_FDEQ_GAIN_5
+45 0x5C6A //RX_FDEQ_GAIN_6
+46 0x6860 //RX_FDEQ_GAIN_7
+47 0x5C50 //RX_FDEQ_GAIN_8
+48 0x545A //RX_FDEQ_GAIN_9
+49 0x5C58 //RX_FDEQ_GAIN_10
+50 0x5858 //RX_FDEQ_GAIN_11
+51 0x6460 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -11857,20 +11857,20 @@
60 0x4848 //RX_FDEQ_GAIN_21
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
+63 0x0401 //RX_FDEQ_BIN_0
+64 0x0104 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0403 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0204 //RX_FDEQ_BIN_5
-69 0x0A0A //RX_FDEQ_BIN_6
-70 0x0A0A //RX_FDEQ_BIN_7
+68 0x0605 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1104 //RX_FDEQ_BIN_13
+73 0x1006 //RX_FDEQ_BIN_10
+74 0x1614 //RX_FDEQ_BIN_11
+75 0x1414 //RX_FDEQ_BIN_12
+76 0x1404 //RX_FDEQ_BIN_13
77 0x0000 //RX_FDEQ_BIN_14
78 0x0000 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
@@ -11905,7 +11905,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0011 //RX_SPK_VOL
+129 0x0042 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -11932,20 +11932,20 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x8474 //RX_FDEQ_GAIN_0
-40 0x6862 //RX_FDEQ_GAIN_1
-41 0x6460 //RX_FDEQ_GAIN_2
-42 0x6868 //RX_FDEQ_GAIN_3
-43 0x747A //RX_FDEQ_GAIN_4
-44 0x746A //RX_FDEQ_GAIN_5
-45 0x585E //RX_FDEQ_GAIN_6
-46 0x5A5A //RX_FDEQ_GAIN_7
-47 0x5A5A //RX_FDEQ_GAIN_8
-48 0x5A58 //RX_FDEQ_GAIN_9
-49 0x5854 //RX_FDEQ_GAIN_10
-50 0x5254 //RX_FDEQ_GAIN_11
-51 0x5656 //RX_FDEQ_GAIN_12
-52 0x5656 //RX_FDEQ_GAIN_13
+39 0x8478 //RX_FDEQ_GAIN_0
+40 0x6864 //RX_FDEQ_GAIN_1
+41 0x6C70 //RX_FDEQ_GAIN_2
+42 0x788C //RX_FDEQ_GAIN_3
+43 0x8686 //RX_FDEQ_GAIN_4
+44 0x7C7A //RX_FDEQ_GAIN_5
+45 0x5C6A //RX_FDEQ_GAIN_6
+46 0x6860 //RX_FDEQ_GAIN_7
+47 0x5C50 //RX_FDEQ_GAIN_8
+48 0x545A //RX_FDEQ_GAIN_9
+49 0x5C58 //RX_FDEQ_GAIN_10
+50 0x5858 //RX_FDEQ_GAIN_11
+51 0x6460 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -11959,8 +11959,8 @@
63 0x0401 //RX_FDEQ_BIN_0
64 0x0104 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
-66 0x0202 //RX_FDEQ_BIN_3
-67 0x0704 //RX_FDEQ_BIN_4
+66 0x0403 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
68 0x0605 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
@@ -12004,7 +12004,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x006E //RX_SPK_VOL
+129 0x0065 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -12031,20 +12031,20 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x8474 //RX_FDEQ_GAIN_0
-40 0x6862 //RX_FDEQ_GAIN_1
-41 0x6460 //RX_FDEQ_GAIN_2
-42 0x6868 //RX_FDEQ_GAIN_3
-43 0x747A //RX_FDEQ_GAIN_4
-44 0x746A //RX_FDEQ_GAIN_5
-45 0x585E //RX_FDEQ_GAIN_6
-46 0x5A5A //RX_FDEQ_GAIN_7
-47 0x5A5A //RX_FDEQ_GAIN_8
-48 0x5A58 //RX_FDEQ_GAIN_9
-49 0x5854 //RX_FDEQ_GAIN_10
-50 0x5254 //RX_FDEQ_GAIN_11
-51 0x5656 //RX_FDEQ_GAIN_12
-52 0x5656 //RX_FDEQ_GAIN_13
+39 0x8478 //RX_FDEQ_GAIN_0
+40 0x6864 //RX_FDEQ_GAIN_1
+41 0x6C70 //RX_FDEQ_GAIN_2
+42 0x788C //RX_FDEQ_GAIN_3
+43 0x8686 //RX_FDEQ_GAIN_4
+44 0x7C7A //RX_FDEQ_GAIN_5
+45 0x5C6A //RX_FDEQ_GAIN_6
+46 0x6860 //RX_FDEQ_GAIN_7
+47 0x5C50 //RX_FDEQ_GAIN_8
+48 0x545A //RX_FDEQ_GAIN_9
+49 0x5C58 //RX_FDEQ_GAIN_10
+50 0x5858 //RX_FDEQ_GAIN_11
+51 0x6460 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -12058,8 +12058,8 @@
63 0x0401 //RX_FDEQ_BIN_0
64 0x0104 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
-66 0x0202 //RX_FDEQ_BIN_3
-67 0x0704 //RX_FDEQ_BIN_4
+66 0x0403 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
68 0x0605 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
@@ -12103,7 +12103,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00A8 //RX_SPK_VOL
+129 0x0098 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -12130,20 +12130,20 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x8474 //RX_FDEQ_GAIN_0
-40 0x6862 //RX_FDEQ_GAIN_1
-41 0x6460 //RX_FDEQ_GAIN_2
-42 0x6868 //RX_FDEQ_GAIN_3
-43 0x747A //RX_FDEQ_GAIN_4
-44 0x746A //RX_FDEQ_GAIN_5
-45 0x585E //RX_FDEQ_GAIN_6
-46 0x5A5A //RX_FDEQ_GAIN_7
-47 0x5A5A //RX_FDEQ_GAIN_8
-48 0x5A58 //RX_FDEQ_GAIN_9
-49 0x5854 //RX_FDEQ_GAIN_10
-50 0x5254 //RX_FDEQ_GAIN_11
-51 0x5656 //RX_FDEQ_GAIN_12
-52 0x5656 //RX_FDEQ_GAIN_13
+39 0x8478 //RX_FDEQ_GAIN_0
+40 0x6864 //RX_FDEQ_GAIN_1
+41 0x6C70 //RX_FDEQ_GAIN_2
+42 0x788C //RX_FDEQ_GAIN_3
+43 0x8686 //RX_FDEQ_GAIN_4
+44 0x7C7A //RX_FDEQ_GAIN_5
+45 0x5C6A //RX_FDEQ_GAIN_6
+46 0x6860 //RX_FDEQ_GAIN_7
+47 0x5C50 //RX_FDEQ_GAIN_8
+48 0x545A //RX_FDEQ_GAIN_9
+49 0x5C58 //RX_FDEQ_GAIN_10
+50 0x5858 //RX_FDEQ_GAIN_11
+51 0x6460 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -12157,8 +12157,8 @@
63 0x0401 //RX_FDEQ_BIN_0
64 0x0104 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
-66 0x0202 //RX_FDEQ_BIN_3
-67 0x0704 //RX_FDEQ_BIN_4
+66 0x0403 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
68 0x0605 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
@@ -12202,7 +12202,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
+129 0x00E6 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -12227,22 +12227,22 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0180 //RX_TDDRC_DRC_GAIN
+124 0x015E //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x8474 //RX_FDEQ_GAIN_0
-40 0x6862 //RX_FDEQ_GAIN_1
-41 0x6460 //RX_FDEQ_GAIN_2
-42 0x6868 //RX_FDEQ_GAIN_3
-43 0x747A //RX_FDEQ_GAIN_4
-44 0x746A //RX_FDEQ_GAIN_5
-45 0x585E //RX_FDEQ_GAIN_6
-46 0x5A5A //RX_FDEQ_GAIN_7
-47 0x5A5A //RX_FDEQ_GAIN_8
-48 0x5A58 //RX_FDEQ_GAIN_9
-49 0x5854 //RX_FDEQ_GAIN_10
-50 0x5254 //RX_FDEQ_GAIN_11
-51 0x5656 //RX_FDEQ_GAIN_12
-52 0x5656 //RX_FDEQ_GAIN_13
+39 0x8478 //RX_FDEQ_GAIN_0
+40 0x6864 //RX_FDEQ_GAIN_1
+41 0x6C70 //RX_FDEQ_GAIN_2
+42 0x788C //RX_FDEQ_GAIN_3
+43 0x8686 //RX_FDEQ_GAIN_4
+44 0x7C7A //RX_FDEQ_GAIN_5
+45 0x5C6A //RX_FDEQ_GAIN_6
+46 0x6860 //RX_FDEQ_GAIN_7
+47 0x5C50 //RX_FDEQ_GAIN_8
+48 0x545A //RX_FDEQ_GAIN_9
+49 0x5C58 //RX_FDEQ_GAIN_10
+50 0x5858 //RX_FDEQ_GAIN_11
+51 0x6460 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -12256,8 +12256,8 @@
63 0x0401 //RX_FDEQ_BIN_0
64 0x0104 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
-66 0x0202 //RX_FDEQ_BIN_3
-67 0x0704 //RX_FDEQ_BIN_4
+66 0x0403 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
68 0x0605 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
@@ -12326,14 +12326,14 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0284 //RX_TDDRC_DRC_GAIN
+124 0x01FF //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x846E //RX_FDEQ_GAIN_0
-40 0x6266 //RX_FDEQ_GAIN_1
-41 0x6666 //RX_FDEQ_GAIN_2
-42 0x6E80 //RX_FDEQ_GAIN_3
-43 0x7A7E //RX_FDEQ_GAIN_4
-44 0x7470 //RX_FDEQ_GAIN_5
+39 0x847A //RX_FDEQ_GAIN_0
+40 0x6C66 //RX_FDEQ_GAIN_1
+41 0x6868 //RX_FDEQ_GAIN_2
+42 0x7084 //RX_FDEQ_GAIN_3
+43 0x7E82 //RX_FDEQ_GAIN_4
+44 0x7874 //RX_FDEQ_GAIN_5
45 0x5864 //RX_FDEQ_GAIN_6
46 0x625C //RX_FDEQ_GAIN_7
47 0x5C50 //RX_FDEQ_GAIN_8
@@ -12425,14 +12425,14 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0478 //RX_TDDRC_DRC_GAIN
+124 0x038D //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x846E //RX_FDEQ_GAIN_0
-40 0x6266 //RX_FDEQ_GAIN_1
-41 0x6666 //RX_FDEQ_GAIN_2
-42 0x6E80 //RX_FDEQ_GAIN_3
-43 0x7A7E //RX_FDEQ_GAIN_4
-44 0x7470 //RX_FDEQ_GAIN_5
+39 0x847A //RX_FDEQ_GAIN_0
+40 0x6C66 //RX_FDEQ_GAIN_1
+41 0x6868 //RX_FDEQ_GAIN_2
+42 0x7084 //RX_FDEQ_GAIN_3
+43 0x7E82 //RX_FDEQ_GAIN_4
+44 0x7874 //RX_FDEQ_GAIN_5
45 0x5864 //RX_FDEQ_GAIN_6
46 0x625C //RX_FDEQ_GAIN_7
47 0x5C50 //RX_FDEQ_GAIN_8
@@ -13360,8 +13360,8 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x00B3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0003 //TX_SAMPLINGFREQ_SIG
@@ -13523,13 +13523,13 @@
162 0x7800 //TX_MIN_EQ_RE_EST_10
163 0x7800 //TX_MIN_EQ_RE_EST_11
164 0x7800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
+165 0x3000 //TX_LAMBDA_RE_EST
166 0x3000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x4000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x0260 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
-171 0x05DC //TX_DT2_HOLD_N
+171 0x0680 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
173 0x0000 //TX_AEC_RESRV_1
174 0x0014 //TX_AEC_RESRV_2
@@ -13555,7 +13555,7 @@
194 0x0000 //TX_NORMENERTH
195 0x0000 //TX_NORMENERHIGHTH
196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7FF0 //TX_DTD_THR1_0
+197 0x7B0C //TX_DTD_THR1_0
198 0x7FF0 //TX_DTD_THR1_1
199 0x7FF0 //TX_DTD_THR1_2
200 0x7FF0 //TX_DTD_THR1_3
@@ -13581,18 +13581,18 @@
220 0x7FFF //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1F40 //TX_RATIO_DT_L_TH_HIGH
-226 0x5014 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
+225 0x01F4 //TX_RATIO_DT_L_TH_HIGH
+226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x2328 //TX_RATIO_DT_L0_TH_HIGH
+234 0x00C8 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -13714,7 +13714,7 @@
353 0x0040 //TX_DT_BINVAD_TH_0
354 0x0040 //TX_DT_BINVAD_TH_1
355 0x0100 //TX_DT_BINVAD_TH_2
-356 0x0100 //TX_DT_BINVAD_TH_3
+356 0x2000 //TX_DT_BINVAD_TH_3
357 0x36B0 //TX_DT_BINVAD_ENDF
358 0x0200 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
@@ -13759,7 +13759,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -13930,17 +13930,17 @@
569 0x4850 //TX_FDEQ_GAIN_2
570 0x5050 //TX_FDEQ_GAIN_3
571 0x4B48 //TX_FDEQ_GAIN_4
-572 0x484B //TX_FDEQ_GAIN_5
-573 0x4B5C //TX_FDEQ_GAIN_6
+572 0x484E //TX_FDEQ_GAIN_5
+573 0x4E5C //TX_FDEQ_GAIN_6
574 0x564E //TX_FDEQ_GAIN_7
575 0x4C4E //TX_FDEQ_GAIN_8
576 0x4E45 //TX_FDEQ_GAIN_9
577 0x494A //TX_FDEQ_GAIN_10
578 0x534D //TX_FDEQ_GAIN_11
-579 0x5C57 //TX_FDEQ_GAIN_12
-580 0x5667 //TX_FDEQ_GAIN_13
-581 0x6778 //TX_FDEQ_GAIN_14
-582 0x8087 //TX_FDEQ_GAIN_15
+579 0x5C54 //TX_FDEQ_GAIN_12
+580 0x5466 //TX_FDEQ_GAIN_13
+581 0x5C70 //TX_FDEQ_GAIN_14
+582 0x7C84 //TX_FDEQ_GAIN_15
583 0x4848 //TX_FDEQ_GAIN_16
584 0x4848 //TX_FDEQ_GAIN_17
585 0x4848 //TX_FDEQ_GAIN_18
@@ -14128,8 +14128,8 @@
767 0x0050 //TX_MIC_CALIBRATION_2
768 0x0050 //TX_MIC_CALIBRATION_3
769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
@@ -14301,9 +14301,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0E21 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE0C0 //TX_AMS_RESRV_02
+945 0x0FA0 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -14321,7 +14321,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x247C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0003 //RX_SAMPLINGFREQ_SIG
3 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -14447,9 +14447,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
+126 0x13E0 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0B50 //RX_MAX_G_FP
129 0x004B //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -14480,45 +14480,45 @@
156 0x0000 //RX_BWE_RESRV_2
#VOL 0
6 0x6000 //RX_TDDRC_ALPHA_UP_1
-7 0x6000 //RX_TDDRC_ALPHA_UP_2
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
33 0x7214 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0002 //RX_TDDRC_THRD_0
-113 0x0004 //RX_TDDRC_THRD_1
-114 0x1A00 //RX_TDDRC_THRD_2
-115 0x1A00 //RX_TDDRC_THRD_3
-116 0x7EB8 //RX_TDDRC_SLANT_0
-117 0x2500 //RX_TDDRC_SLANT_1
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x6000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x032A //RX_TDDRC_DRC_GAIN
+124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x3B3B //RX_FDEQ_GAIN_1
-41 0x3942 //RX_FDEQ_GAIN_2
-42 0x4645 //RX_FDEQ_GAIN_3
-43 0x494A //RX_FDEQ_GAIN_4
-44 0x5D5A //RX_FDEQ_GAIN_5
-45 0x5B5B //RX_FDEQ_GAIN_6
-46 0x5A51 //RX_FDEQ_GAIN_7
-47 0x514F //RX_FDEQ_GAIN_8
-48 0x5568 //RX_FDEQ_GAIN_9
-49 0x7460 //RX_FDEQ_GAIN_10
-50 0x544E //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x484A //RX_FDEQ_GAIN_13
-53 0x5155 //RX_FDEQ_GAIN_14
-54 0x577B //RX_FDEQ_GAIN_15
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
57 0x4848 //RX_FDEQ_GAIN_18
@@ -14527,25 +14527,25 @@
60 0x4848 //RX_FDEQ_GAIN_21
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0308 //RX_FDEQ_BIN_5
-69 0x0808 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E2D //RX_FDEQ_BIN_11
+75 0x1923 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
82 0x0000 //RX_FDEQ_BIN_19
83 0x0000 //RX_FDEQ_BIN_20
84 0x0000 //RX_FDEQ_BIN_21
@@ -14575,7 +14575,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0014 //RX_SPK_VOL
+129 0x0040 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -14602,21 +14602,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -14674,7 +14674,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0072 //RX_SPK_VOL
+129 0x0060 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -14701,21 +14701,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -14773,7 +14773,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00AF //RX_SPK_VOL
+129 0x0094 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -14798,23 +14798,23 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0109 //RX_TDDRC_DRC_GAIN
+124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -14872,7 +14872,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
+129 0x00E1 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -14886,7 +14886,7 @@
33 0x7214 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
-113 0x0004 //RX_TDDRC_THRD_1
+113 0x0002 //RX_TDDRC_THRD_1
114 0x0340 //RX_TDDRC_THRD_2
115 0x0CE0 //RX_TDDRC_THRD_3
116 0x0000 //RX_TDDRC_SLANT_0
@@ -14897,23 +14897,23 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0197 //RX_TDDRC_DRC_GAIN
+124 0x0152 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -14996,22 +14996,22 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0260 //RX_TDDRC_DRC_GAIN
+124 0x021E //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x846C //RX_FDEQ_GAIN_0
-40 0x4A48 //RX_FDEQ_GAIN_1
-41 0x5054 //RX_FDEQ_GAIN_2
-42 0x6268 //RX_FDEQ_GAIN_3
-43 0x726C //RX_FDEQ_GAIN_4
-44 0x6862 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6462 //RX_FDEQ_GAIN_7
-47 0x6060 //RX_FDEQ_GAIN_8
-48 0x5C60 //RX_FDEQ_GAIN_9
-49 0x6060 //RX_FDEQ_GAIN_10
-50 0x6064 //RX_FDEQ_GAIN_11
-51 0x705C //RX_FDEQ_GAIN_12
-52 0x6870 //RX_FDEQ_GAIN_13
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x5C50 //RX_FDEQ_GAIN_1
+41 0x5C5C //RX_FDEQ_GAIN_2
+42 0x6C74 //RX_FDEQ_GAIN_3
+43 0x7E78 //RX_FDEQ_GAIN_4
+44 0x7670 //RX_FDEQ_GAIN_5
+45 0x666E //RX_FDEQ_GAIN_6
+46 0x6C6C //RX_FDEQ_GAIN_7
+47 0x686A //RX_FDEQ_GAIN_8
+48 0x666A //RX_FDEQ_GAIN_9
+49 0x6668 //RX_FDEQ_GAIN_10
+50 0x6C6C //RX_FDEQ_GAIN_11
+51 0x7C68 //RX_FDEQ_GAIN_12
+52 0x7478 //RX_FDEQ_GAIN_13
53 0x787C //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -15023,7 +15023,7 @@
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0301 //RX_FDEQ_BIN_0
-64 0x0105 //RX_FDEQ_BIN_1
+64 0x0204 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
@@ -15095,22 +15095,22 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x032A //RX_TDDRC_DRC_GAIN
+124 0x03FC //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x846C //RX_FDEQ_GAIN_0
-40 0x4A48 //RX_FDEQ_GAIN_1
-41 0x5054 //RX_FDEQ_GAIN_2
-42 0x6268 //RX_FDEQ_GAIN_3
-43 0x726C //RX_FDEQ_GAIN_4
-44 0x6862 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6462 //RX_FDEQ_GAIN_7
-47 0x6060 //RX_FDEQ_GAIN_8
-48 0x5C60 //RX_FDEQ_GAIN_9
-49 0x6060 //RX_FDEQ_GAIN_10
-50 0x6064 //RX_FDEQ_GAIN_11
-51 0x705C //RX_FDEQ_GAIN_12
-52 0x6870 //RX_FDEQ_GAIN_13
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x5C50 //RX_FDEQ_GAIN_1
+41 0x5C5C //RX_FDEQ_GAIN_2
+42 0x6C74 //RX_FDEQ_GAIN_3
+43 0x7E78 //RX_FDEQ_GAIN_4
+44 0x7670 //RX_FDEQ_GAIN_5
+45 0x666E //RX_FDEQ_GAIN_6
+46 0x6C6C //RX_FDEQ_GAIN_7
+47 0x686A //RX_FDEQ_GAIN_8
+48 0x666A //RX_FDEQ_GAIN_9
+49 0x6668 //RX_FDEQ_GAIN_10
+50 0x6C6C //RX_FDEQ_GAIN_11
+51 0x7C68 //RX_FDEQ_GAIN_12
+52 0x7478 //RX_FDEQ_GAIN_13
53 0x787C //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -15122,7 +15122,7 @@
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0301 //RX_FDEQ_BIN_0
-64 0x0105 //RX_FDEQ_BIN_1
+64 0x0204 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
@@ -18700,9 +18700,9 @@
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x0073 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0003 //TX_SAMPLINGFREQ_SIG
7 0x0003 //TX_SAMPLINGFREQ_PROC
@@ -18863,13 +18863,13 @@
162 0x7800 //TX_MIN_EQ_RE_EST_10
163 0x7800 //TX_MIN_EQ_RE_EST_11
164 0x7800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
+165 0x3000 //TX_LAMBDA_RE_EST
166 0x3000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x4000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x0260 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
-171 0x05DC //TX_DT2_HOLD_N
+171 0x0680 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
173 0x0000 //TX_AEC_RESRV_1
174 0x0014 //TX_AEC_RESRV_2
@@ -18895,7 +18895,7 @@
194 0x0000 //TX_NORMENERTH
195 0x0000 //TX_NORMENERHIGHTH
196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7FF0 //TX_DTD_THR1_0
+197 0x7B0C //TX_DTD_THR1_0
198 0x7FF0 //TX_DTD_THR1_1
199 0x7FF0 //TX_DTD_THR1_2
200 0x7FF0 //TX_DTD_THR1_3
@@ -18921,18 +18921,18 @@
220 0x7FFF //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1F40 //TX_RATIO_DT_L_TH_HIGH
-226 0x5014 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
+225 0x01F4 //TX_RATIO_DT_L_TH_HIGH
+226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x2328 //TX_RATIO_DT_L0_TH_HIGH
+234 0x00C8 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -18980,12 +18980,12 @@
279 0x2000 //TX_B_POST_FLT_0
280 0x1000 //TX_B_POST_FLT_1
281 0x0010 //TX_NS_LVL_CTRL_0
-282 0x003C //TX_NS_LVL_CTRL_1
+282 0x001A //TX_NS_LVL_CTRL_1
283 0x0024 //TX_NS_LVL_CTRL_2
-284 0x003C //TX_NS_LVL_CTRL_3
+284 0x001A //TX_NS_LVL_CTRL_3
285 0x0014 //TX_NS_LVL_CTRL_4
286 0x0011 //TX_NS_LVL_CTRL_5
-287 0x003C //TX_NS_LVL_CTRL_6
+287 0x001A //TX_NS_LVL_CTRL_6
288 0x0011 //TX_NS_LVL_CTRL_7
289 0x0020 //TX_MIN_GAIN_S_0
290 0x0020 //TX_MIN_GAIN_S_1
@@ -19045,7 +19045,7 @@
344 0x7F00 //TX_LAMBDA_PFILT_S_5
345 0x7F00 //TX_LAMBDA_PFILT_S_6
346 0x7F00 //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
+347 0x3E80 //TX_K_PEPPER
348 0x0400 //TX_A_PEPPER
349 0x1EAA //TX_K_PEPPER_HF
350 0x0600 //TX_A_PEPPER_HF
@@ -19054,7 +19054,7 @@
353 0x0040 //TX_DT_BINVAD_TH_0
354 0x0040 //TX_DT_BINVAD_TH_1
355 0x0100 //TX_DT_BINVAD_TH_2
-356 0x0100 //TX_DT_BINVAD_TH_3
+356 0x2000 //TX_DT_BINVAD_TH_3
357 0x36B0 //TX_DT_BINVAD_ENDF
358 0x0200 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
@@ -19099,7 +19099,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -19270,17 +19270,17 @@
569 0x4850 //TX_FDEQ_GAIN_2
570 0x5050 //TX_FDEQ_GAIN_3
571 0x4B48 //TX_FDEQ_GAIN_4
-572 0x484B //TX_FDEQ_GAIN_5
-573 0x4B5C //TX_FDEQ_GAIN_6
+572 0x484E //TX_FDEQ_GAIN_5
+573 0x4E5C //TX_FDEQ_GAIN_6
574 0x564E //TX_FDEQ_GAIN_7
575 0x4C4E //TX_FDEQ_GAIN_8
576 0x4E45 //TX_FDEQ_GAIN_9
577 0x494A //TX_FDEQ_GAIN_10
578 0x534D //TX_FDEQ_GAIN_11
-579 0x5C57 //TX_FDEQ_GAIN_12
-580 0x5667 //TX_FDEQ_GAIN_13
-581 0x6778 //TX_FDEQ_GAIN_14
-582 0x8087 //TX_FDEQ_GAIN_15
+579 0x5C54 //TX_FDEQ_GAIN_12
+580 0x5466 //TX_FDEQ_GAIN_13
+581 0x5C70 //TX_FDEQ_GAIN_14
+582 0x7C84 //TX_FDEQ_GAIN_15
583 0x4848 //TX_FDEQ_GAIN_16
584 0x4848 //TX_FDEQ_GAIN_17
585 0x4848 //TX_FDEQ_GAIN_18
@@ -19468,8 +19468,8 @@
767 0x0050 //TX_MIC_CALIBRATION_2
768 0x0050 //TX_MIC_CALIBRATION_3
769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
@@ -19641,9 +19641,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x0000 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE0C0 //TX_AMS_RESRV_02
+945 0x0FA0 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -19661,14 +19661,14 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x047C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0003 //RX_SAMPLINGFREQ_SIG
3 0x0003 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
6 0x6000 //RX_TDDRC_ALPHA_UP_1
-7 0x6000 //RX_TDDRC_ALPHA_UP_2
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
10 0x0800 //RX_PGA
@@ -19690,32 +19690,32 @@
26 0x0190 //RX_FENS_RESRV_1
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
30 0x0002 //RX_EXTRA_NS_L
31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
33 0x7214 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
35 0x199A //RX_A_POST_FLT
36 0x0000 //RX_LMT_THRD
37 0x4000 //RX_LMT_ALPHA
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x3B3B //RX_FDEQ_GAIN_1
-41 0x3942 //RX_FDEQ_GAIN_2
-42 0x4645 //RX_FDEQ_GAIN_3
-43 0x494A //RX_FDEQ_GAIN_4
-44 0x5D5A //RX_FDEQ_GAIN_5
-45 0x5B5B //RX_FDEQ_GAIN_6
-46 0x5A51 //RX_FDEQ_GAIN_7
-47 0x514F //RX_FDEQ_GAIN_8
-48 0x5568 //RX_FDEQ_GAIN_9
-49 0x7460 //RX_FDEQ_GAIN_10
-50 0x544E //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x484A //RX_FDEQ_GAIN_13
-53 0x5155 //RX_FDEQ_GAIN_14
-54 0x577B //RX_FDEQ_GAIN_15
+39 0x847E //RX_FDEQ_GAIN_0
+40 0x5C58 //RX_FDEQ_GAIN_1
+41 0x5E5C //RX_FDEQ_GAIN_2
+42 0x6260 //RX_FDEQ_GAIN_3
+43 0x6C64 //RX_FDEQ_GAIN_4
+44 0x6260 //RX_FDEQ_GAIN_5
+45 0x6664 //RX_FDEQ_GAIN_6
+46 0x6460 //RX_FDEQ_GAIN_7
+47 0x5E6A //RX_FDEQ_GAIN_8
+48 0x6668 //RX_FDEQ_GAIN_9
+49 0x645A //RX_FDEQ_GAIN_10
+50 0x5A5E //RX_FDEQ_GAIN_11
+51 0x6A58 //RX_FDEQ_GAIN_12
+52 0x646E //RX_FDEQ_GAIN_13
+53 0x787C //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
57 0x4848 //RX_FDEQ_GAIN_18
@@ -19724,22 +19724,22 @@
60 0x4848 //RX_FDEQ_GAIN_21
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0308 //RX_FDEQ_BIN_5
-69 0x0808 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E2D //RX_FDEQ_BIN_11
+75 0x1923 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -19773,24 +19773,24 @@
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
111 0x0003 //RX_FILTINDX
-112 0x0002 //RX_TDDRC_THRD_0
-113 0x0004 //RX_TDDRC_THRD_1
-114 0x1A00 //RX_TDDRC_THRD_2
-115 0x1A00 //RX_TDDRC_THRD_3
-116 0x7EB8 //RX_TDDRC_SLANT_0
-117 0x2500 //RX_TDDRC_SLANT_1
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x6000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x032A //RX_TDDRC_DRC_GAIN
+124 0x0100 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
+126 0x13E0 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0B50 //RX_MAX_G_FP
+129 0x004B //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
132 0x3000 //RX_BWE_UV_TH
@@ -19843,21 +19843,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -19915,7 +19915,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x004B //RX_SPK_VOL
+129 0x0040 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -19942,21 +19942,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -20014,7 +20014,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0072 //RX_SPK_VOL
+129 0x0060 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -20041,21 +20041,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -20113,7 +20113,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00AF //RX_SPK_VOL
+129 0x0094 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -20138,23 +20138,23 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x032A //RX_TDDRC_DRC_GAIN
+124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -20212,7 +20212,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
+129 0x00E1 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -20226,7 +20226,7 @@
33 0x7214 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
-113 0x0004 //RX_TDDRC_THRD_1
+113 0x0002 //RX_TDDRC_THRD_1
114 0x0340 //RX_TDDRC_THRD_2
115 0x0CE0 //RX_TDDRC_THRD_3
116 0x0000 //RX_TDDRC_SLANT_0
@@ -20237,23 +20237,23 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0197 //RX_TDDRC_DRC_GAIN
+124 0x0152 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -20336,22 +20336,22 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0260 //RX_TDDRC_DRC_GAIN
+124 0x021E //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x846C //RX_FDEQ_GAIN_0
-40 0x4A48 //RX_FDEQ_GAIN_1
-41 0x5054 //RX_FDEQ_GAIN_2
-42 0x6268 //RX_FDEQ_GAIN_3
-43 0x726C //RX_FDEQ_GAIN_4
-44 0x6862 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6462 //RX_FDEQ_GAIN_7
-47 0x6060 //RX_FDEQ_GAIN_8
-48 0x5C60 //RX_FDEQ_GAIN_9
-49 0x6060 //RX_FDEQ_GAIN_10
-50 0x6064 //RX_FDEQ_GAIN_11
-51 0x705C //RX_FDEQ_GAIN_12
-52 0x6870 //RX_FDEQ_GAIN_13
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x5C50 //RX_FDEQ_GAIN_1
+41 0x5C5C //RX_FDEQ_GAIN_2
+42 0x6C74 //RX_FDEQ_GAIN_3
+43 0x7E78 //RX_FDEQ_GAIN_4
+44 0x7670 //RX_FDEQ_GAIN_5
+45 0x666E //RX_FDEQ_GAIN_6
+46 0x6C6C //RX_FDEQ_GAIN_7
+47 0x686A //RX_FDEQ_GAIN_8
+48 0x666A //RX_FDEQ_GAIN_9
+49 0x6668 //RX_FDEQ_GAIN_10
+50 0x6C6C //RX_FDEQ_GAIN_11
+51 0x7C68 //RX_FDEQ_GAIN_12
+52 0x7478 //RX_FDEQ_GAIN_13
53 0x787C //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -20363,7 +20363,7 @@
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0301 //RX_FDEQ_BIN_0
-64 0x0105 //RX_FDEQ_BIN_1
+64 0x0204 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
@@ -20435,22 +20435,22 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0478 //RX_TDDRC_DRC_GAIN
+124 0x03FC //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x846C //RX_FDEQ_GAIN_0
-40 0x4A48 //RX_FDEQ_GAIN_1
-41 0x5054 //RX_FDEQ_GAIN_2
-42 0x6268 //RX_FDEQ_GAIN_3
-43 0x726C //RX_FDEQ_GAIN_4
-44 0x6862 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6462 //RX_FDEQ_GAIN_7
-47 0x6060 //RX_FDEQ_GAIN_8
-48 0x5C60 //RX_FDEQ_GAIN_9
-49 0x6060 //RX_FDEQ_GAIN_10
-50 0x6064 //RX_FDEQ_GAIN_11
-51 0x705C //RX_FDEQ_GAIN_12
-52 0x6870 //RX_FDEQ_GAIN_13
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x5C50 //RX_FDEQ_GAIN_1
+41 0x5C5C //RX_FDEQ_GAIN_2
+42 0x6C74 //RX_FDEQ_GAIN_3
+43 0x7E78 //RX_FDEQ_GAIN_4
+44 0x7670 //RX_FDEQ_GAIN_5
+45 0x666E //RX_FDEQ_GAIN_6
+46 0x6C6C //RX_FDEQ_GAIN_7
+47 0x686A //RX_FDEQ_GAIN_8
+48 0x666A //RX_FDEQ_GAIN_9
+49 0x6668 //RX_FDEQ_GAIN_10
+50 0x6C6C //RX_FDEQ_GAIN_11
+51 0x7C68 //RX_FDEQ_GAIN_12
+52 0x7478 //RX_FDEQ_GAIN_13
53 0x787C //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -20462,7 +20462,7 @@
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0301 //RX_FDEQ_BIN_0
-64 0x0105 //RX_FDEQ_BIN_1
+64 0x0204 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
@@ -20512,7 +20512,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x027C //RX_RECVFUNC_MODE_0
+157 0x047C //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0003 //RX_SAMPLINGFREQ_SIG
160 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -20623,7 +20623,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0002 //RX_FILTINDX
+268 0x0003 //RX_FILTINDX
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
271 0x1A00 //RX_TDDRC_THRD_2
@@ -20638,9 +20638,9 @@
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0550 //RX_TDDRC_DRC_GAIN
282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
+283 0x13E0 //RX_TPKA_FP
+284 0x0400 //RX_MIN_G_FP
+285 0x0B50 //RX_MAX_G_FP
286 0x0014 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
288 0x0000 //RX_MAXLEVEL_CNG
@@ -20671,45 +20671,45 @@
313 0x0000 //RX_BWE_RESRV_2
#VOL 0
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
-270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0550 //RX_TDDRC_DRC_GAIN
+281 0x0100 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6060 //RX_FDEQ_GAIN_11
-208 0x5C54 //RX_FDEQ_GAIN_12
-209 0x5450 //RX_FDEQ_GAIN_13
-210 0x5050 //RX_FDEQ_GAIN_14
-211 0x5860 //RX_FDEQ_GAIN_15
+196 0x847C //RX_FDEQ_GAIN_0
+197 0x5A56 //RX_FDEQ_GAIN_1
+198 0x6266 //RX_FDEQ_GAIN_2
+199 0x6E7A //RX_FDEQ_GAIN_3
+200 0x8678 //RX_FDEQ_GAIN_4
+201 0x746E //RX_FDEQ_GAIN_5
+202 0x706E //RX_FDEQ_GAIN_6
+203 0x6C64 //RX_FDEQ_GAIN_7
+204 0x5C6A //RX_FDEQ_GAIN_8
+205 0x6268 //RX_FDEQ_GAIN_9
+206 0x6462 //RX_FDEQ_GAIN_10
+207 0x646E //RX_FDEQ_GAIN_11
+208 0x6860 //RX_FDEQ_GAIN_12
+209 0x646A //RX_FDEQ_GAIN_13
+210 0x7478 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -20718,22 +20718,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -20766,49 +20766,49 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0014 //RX_SPK_VOL
+286 0x0040 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
-270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0550 //RX_TDDRC_DRC_GAIN
+281 0x0100 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6060 //RX_FDEQ_GAIN_11
-208 0x5C54 //RX_FDEQ_GAIN_12
-209 0x5450 //RX_FDEQ_GAIN_13
-210 0x5050 //RX_FDEQ_GAIN_14
-211 0x5860 //RX_FDEQ_GAIN_15
+196 0x847C //RX_FDEQ_GAIN_0
+197 0x5A56 //RX_FDEQ_GAIN_1
+198 0x6266 //RX_FDEQ_GAIN_2
+199 0x6E7A //RX_FDEQ_GAIN_3
+200 0x8678 //RX_FDEQ_GAIN_4
+201 0x746E //RX_FDEQ_GAIN_5
+202 0x706E //RX_FDEQ_GAIN_6
+203 0x6C64 //RX_FDEQ_GAIN_7
+204 0x5C6A //RX_FDEQ_GAIN_8
+205 0x6268 //RX_FDEQ_GAIN_9
+206 0x6462 //RX_FDEQ_GAIN_10
+207 0x646E //RX_FDEQ_GAIN_11
+208 0x6860 //RX_FDEQ_GAIN_12
+209 0x646A //RX_FDEQ_GAIN_13
+210 0x7478 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -20817,22 +20817,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -20865,49 +20865,49 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x001D //RX_SPK_VOL
+286 0x0060 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
-270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0550 //RX_TDDRC_DRC_GAIN
+281 0x0100 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6060 //RX_FDEQ_GAIN_11
-208 0x5C54 //RX_FDEQ_GAIN_12
-209 0x5450 //RX_FDEQ_GAIN_13
-210 0x5050 //RX_FDEQ_GAIN_14
-211 0x5860 //RX_FDEQ_GAIN_15
+196 0x847C //RX_FDEQ_GAIN_0
+197 0x5A56 //RX_FDEQ_GAIN_1
+198 0x6266 //RX_FDEQ_GAIN_2
+199 0x6E7A //RX_FDEQ_GAIN_3
+200 0x8678 //RX_FDEQ_GAIN_4
+201 0x746E //RX_FDEQ_GAIN_5
+202 0x706E //RX_FDEQ_GAIN_6
+203 0x6C64 //RX_FDEQ_GAIN_7
+204 0x5C6A //RX_FDEQ_GAIN_8
+205 0x6268 //RX_FDEQ_GAIN_9
+206 0x6462 //RX_FDEQ_GAIN_10
+207 0x646E //RX_FDEQ_GAIN_11
+208 0x6860 //RX_FDEQ_GAIN_12
+209 0x646A //RX_FDEQ_GAIN_13
+210 0x7478 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -20916,22 +20916,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -20964,49 +20964,49 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0029 //RX_SPK_VOL
+286 0x0094 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
-270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0550 //RX_TDDRC_DRC_GAIN
+281 0x0100 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6060 //RX_FDEQ_GAIN_11
-208 0x5C54 //RX_FDEQ_GAIN_12
-209 0x5450 //RX_FDEQ_GAIN_13
-210 0x5050 //RX_FDEQ_GAIN_14
-211 0x5860 //RX_FDEQ_GAIN_15
+196 0x847C //RX_FDEQ_GAIN_0
+197 0x5A56 //RX_FDEQ_GAIN_1
+198 0x6266 //RX_FDEQ_GAIN_2
+199 0x6E7A //RX_FDEQ_GAIN_3
+200 0x8678 //RX_FDEQ_GAIN_4
+201 0x746E //RX_FDEQ_GAIN_5
+202 0x706E //RX_FDEQ_GAIN_6
+203 0x6C64 //RX_FDEQ_GAIN_7
+204 0x5C6A //RX_FDEQ_GAIN_8
+205 0x6268 //RX_FDEQ_GAIN_9
+206 0x6462 //RX_FDEQ_GAIN_10
+207 0x646E //RX_FDEQ_GAIN_11
+208 0x6860 //RX_FDEQ_GAIN_12
+209 0x646A //RX_FDEQ_GAIN_13
+210 0x7478 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -21015,22 +21015,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -21063,49 +21063,49 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0039 //RX_SPK_VOL
+286 0x00E1 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
-270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0550 //RX_TDDRC_DRC_GAIN
+281 0x0152 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x5454 //RX_FDEQ_GAIN_4
-201 0x7C54 //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6060 //RX_FDEQ_GAIN_11
-208 0x5C54 //RX_FDEQ_GAIN_12
-209 0x5450 //RX_FDEQ_GAIN_13
-210 0x5050 //RX_FDEQ_GAIN_14
-211 0x5860 //RX_FDEQ_GAIN_15
+196 0x847C //RX_FDEQ_GAIN_0
+197 0x5A56 //RX_FDEQ_GAIN_1
+198 0x6266 //RX_FDEQ_GAIN_2
+199 0x6E7A //RX_FDEQ_GAIN_3
+200 0x8678 //RX_FDEQ_GAIN_4
+201 0x746E //RX_FDEQ_GAIN_5
+202 0x706E //RX_FDEQ_GAIN_6
+203 0x6C64 //RX_FDEQ_GAIN_7
+204 0x5C6A //RX_FDEQ_GAIN_8
+205 0x6268 //RX_FDEQ_GAIN_9
+206 0x6462 //RX_FDEQ_GAIN_10
+207 0x646E //RX_FDEQ_GAIN_11
+208 0x6860 //RX_FDEQ_GAIN_12
+209 0x646A //RX_FDEQ_GAIN_13
+210 0x7478 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -21114,22 +21114,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -21162,49 +21162,49 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x005F //RX_SPK_VOL
+286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
+269 0x0000 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0550 //RX_TDDRC_DRC_GAIN
+281 0x021E //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x5454 //RX_FDEQ_GAIN_4
-201 0x7C54 //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6060 //RX_FDEQ_GAIN_11
-208 0x5C54 //RX_FDEQ_GAIN_12
-209 0x5450 //RX_FDEQ_GAIN_13
-210 0x5050 //RX_FDEQ_GAIN_14
-211 0x5860 //RX_FDEQ_GAIN_15
+196 0x8474 //RX_FDEQ_GAIN_0
+197 0x5C50 //RX_FDEQ_GAIN_1
+198 0x5C5C //RX_FDEQ_GAIN_2
+199 0x6C74 //RX_FDEQ_GAIN_3
+200 0x7E78 //RX_FDEQ_GAIN_4
+201 0x7670 //RX_FDEQ_GAIN_5
+202 0x666E //RX_FDEQ_GAIN_6
+203 0x6C6C //RX_FDEQ_GAIN_7
+204 0x686A //RX_FDEQ_GAIN_8
+205 0x666A //RX_FDEQ_GAIN_9
+206 0x6668 //RX_FDEQ_GAIN_10
+207 0x6C6C //RX_FDEQ_GAIN_11
+208 0x7C68 //RX_FDEQ_GAIN_12
+209 0x7478 //RX_FDEQ_GAIN_13
+210 0x787C //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -21213,22 +21213,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0204 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
@@ -21261,49 +21261,49 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x008E //RX_SPK_VOL
+286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
-270 0x0004 //RX_TDDRC_THRD_1
-271 0x1A00 //RX_TDDRC_THRD_2
-272 0x1A00 //RX_TDDRC_THRD_3
-273 0x7EB8 //RX_TDDRC_SLANT_0
-274 0x2500 //RX_TDDRC_SLANT_1
+270 0x0006 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0550 //RX_TDDRC_DRC_GAIN
+281 0x03FC //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x5454 //RX_FDEQ_GAIN_4
-201 0x7C54 //RX_FDEQ_GAIN_5
-202 0x4850 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4860 //RX_FDEQ_GAIN_8
-205 0x7468 //RX_FDEQ_GAIN_9
-206 0x6060 //RX_FDEQ_GAIN_10
-207 0x6060 //RX_FDEQ_GAIN_11
-208 0x5C54 //RX_FDEQ_GAIN_12
-209 0x5450 //RX_FDEQ_GAIN_13
-210 0x5050 //RX_FDEQ_GAIN_14
-211 0x5860 //RX_FDEQ_GAIN_15
+196 0x8474 //RX_FDEQ_GAIN_0
+197 0x5C50 //RX_FDEQ_GAIN_1
+198 0x5C5C //RX_FDEQ_GAIN_2
+199 0x6C74 //RX_FDEQ_GAIN_3
+200 0x7E78 //RX_FDEQ_GAIN_4
+201 0x7670 //RX_FDEQ_GAIN_5
+202 0x666E //RX_FDEQ_GAIN_6
+203 0x6C6C //RX_FDEQ_GAIN_7
+204 0x686A //RX_FDEQ_GAIN_8
+205 0x666A //RX_FDEQ_GAIN_9
+206 0x6668 //RX_FDEQ_GAIN_10
+207 0x6C6C //RX_FDEQ_GAIN_11
+208 0x7C68 //RX_FDEQ_GAIN_12
+209 0x7478 //RX_FDEQ_GAIN_13
+210 0x787C //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -21312,22 +21312,22 @@
217 0x4848 //RX_FDEQ_GAIN_21
218 0x4848 //RX_FDEQ_GAIN_22
219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0204 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
224 0x0404 //RX_FDEQ_BIN_4
-225 0x0308 //RX_FDEQ_BIN_5
-226 0x0808 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
236 0x0000 //RX_FDEQ_BIN_16
237 0x0000 //RX_FDEQ_BIN_17
238 0x0000 //RX_FDEQ_BIN_18
diff --git a/audio/panther/tuning/fortemedia/HEADSET.dat b/audio/panther/tuning/fortemedia/HEADSET.dat
index d21b5437262176661e7be18f5696822bc10b189b..af637533b369cafb251e88d87e4bee22b66c7024 100644
GIT binary patch
delta 6691
zcmeHKdr(y875^T0*JX8C3M&b?EIWiD?6N$fj6;x;4Hkqg!R^X8Te8(Hl66ZNSi{z$
zZt$#ZkxYoSUB^$`&ge`uww4i<(Q6!HGxZTf1azjInulN?nmUQ&G>@qrC-y9mQ9}|%
zVa8$d#|L}QJ@?$-Ip4Xz?{|K4MfX2Q+#Ju{pgfQ;UrSTF?AqU&Xll!cdGd#Obk9*$
z11E$?gp0**@@M3CKBmtyY8Cp=XscM=$nxZOKBL8qGGV+y_l7H4bn?X;v|B+*IQivt
z`S>l`!jzjo*w2Tv!h^5ax(**|N)*vaOs{Mtj076woFulDsdutJkRGy^?5AO{c+{n<
zPLk49r^xm7!fIss;$S0tJdu$1NFjS4*F{3f5ZRVLO#0|0l4lbgMrL5ksN82{S7?-~
zhPK7MK#5Uwr?9<LA+LOb4JZ_ZD0r0Eaf_zP%S{Ynss6H`Ta!m%Ifh1I%@T)8Sd8-H
zQEYuBY$Hp^*-c2!>*Ut@J%m_)PuycrK^cL{W~~#xMwTe9m9g^ZFJOIwu>SVLQCK}h
zAgl~IY-8P&8il=_9Yjq0Irc|pt|%>Fu8Qxnilv3DqWl?FTw!IlvS-<IONv;fYa#Pg
zevkQF#ViyE+oNo9ik<CZvr7o$C4}RWaBmb`OO#wIzw2N-n3~W|{?_n*zEc~?OTMO}
zV~NQQAF~XxKx){oeJs47Jx(~vB%L_6nCFN;_wjVIj--LZ@gyv+NQZ@sOi*5IhO+Vu
zusJPIRFVk`tyy3z&W0uB;g}ekk}DR%3>tRFEER?&yfRiI4Zw&GB(e%f;)}S#*I!ME
zJ<kF_0x!XETr&`9J=kXo_yIqk=nFjw%lzr^Gmi;iwHZRK8Q^QOKy{5==io|87YXf4
ze1#!`>Ylzooq+F-3HW{#@m-!$O9OBZ9PLi-p(!&l*@$BZldB4)gWGL_=6W-<hcdt$
zvVg-W|L%DnO~tVgccvWY_v3A#EWoyc^jP@k+vCK4EVyU=7x?31Un~Ck`~pvx9Y5l3
zswT!cL1NSgfr!oT@<x%p95=RQ8PAB^Po;FW=ydbEJ1vHB7V|hu!8nU^oMpq8E%L>m
z@B%Hin$WM|X-c9}16wDckDEpGYg{jHTEjzBeRoInr|7Y8O<1@ZZ#wwuOwitBhF0u~
zwE+v%x-!A-l?#5s8Kp&$U0G?kFW(m?;Ja-CzL!TjBW)RW#{J<|Q?W0|E#mVIZZX^%
zdu%PH>#0izuh#@2pBXkZXMn#+?r7n))bJ{{M<n*wJH^s)#dcNLP@=*X5zbbg7H-{c
z5<?gGj7WQw&UJcEg41~l*W2K7^+2WTG?Z8NLaFTxxJ&!M>ply0b^YM28-S{+L2y+G
z_sjgM*mr<yL~<L?*4*x@q~LeLzcl#7nKmA$JJS3H9BDp^>rK$TcnpZ@Paxvkcy7L)
z9LID{z{FoI<Exc)N<xojRey-<rzE`WYoAi&be?E9#OHiH_So@NKfIC0Qd;()5Bl%%
zpnR<rNk!m?u9vrlxlyYLq!J*60w)Z(cx5r4!-z`Q%cS_o8RL|r_e37}>sp>0Pq6*(
zJ`(`GPlRzD?=3W9#|QAUSXz}1o@x`UMfz+)7O3}Ipx&1WHFa6Y2HD`P&cU<dDX6cR
zi_9<&YHM<#$uG+H@XM%9B1gxhgmO<_s4bHh>e2}N6gjYt4_7bQwU;N-5mG8N;NcaC
z=Ev&WUFk>|Ch*r`^^uf(tFii?Oe71ezBe0cJvrd@JcZYD!5f$tsr*~Jc@~qHi0MEA
zu|3ao3U4BTO+r9pCr1&%#3!9REz(lgE!a|D9D!ER8&CCV_EIFZ(lJu=pT&c>AJ+g9
z-XPd3&w<^39^6imvysmi`CYst!f*w5k(=%w<aY1?&lN1;0p3M*-|#IxMA)RM32T~~
zuutDdSY1|SB_2|N(=gHfq|2u^{HCc2FV}YSHRj2kvE<92@-2yv)O;mxNR|-Nv>B@m
zWm4d3_*x)}s=8cDGPG3cYO7wL!G9+j=4#lFRb72I&`RY0swkR?ysMke)1dR0%(@jU
zVip}GZ2D9u+*}=XN9wup6ic!~CF?(8BQ+_#$wq1tisE=<rAlrOb2ADE>01Hujk4xj
z0r6mpWK=*%lPVx67o7+A0?lw7PTi6|XrGxB9FY)DyI;epXcrLoZXhwQ<L@K5-oWdl
zK&-c?B|<boMxujOt_=>)iU|@Tb{^!05<(M#Mx3Dnp%bWqPof4sg&O#6)WAKcfls3b
z?nMoJ1~o8_Z`Ef}1NWl_9zYE|h#L4DDzWphZQHLGr4&;B9w_Mhz}ZDmupyA7VNfbA
zL5%cwP%HicGiLr1qGSIB(J_}HGx`cVk?;W+X8#*94OhXMDK>B98;Y#NfXI@AWV&SK
z`xW0bfBNjtmg%-XBVBiClCp9<O5ajsR#xRt<U^9i=z-{O(}RJH(t{uA!R|VVL)s}E
z(vTjSdvHiYdhqn(P=@s2?ZYAMEDmY?cs+na+8|QHIS4e}Ne>cxD0-M!N(>oK`4uVM
x<d0ZNG0Z#76q!K18j)nzKSjl*R?ldoerC~F$zhNp@>8xGmPVA>SKK#i{tuc|p^E?j
delta 3883
zcmdT{Z){Xm7QgqNd5@t&r^2+*G96~Cl$KUHl&(AAq`pXL#xlX#VS?i_mS-*PXeKZ~
zx0YpqQ%fpnvo;RliXo9i1=l4|?7~x{E5<_q4V}U_|53$64Ka}qyBPhTo<~_M+NdjS
zq90CP?tAy1d(Q8i-|ysojd{;}YVXVeT&x_+z1^04^LShGV28c?6Pr?;Tr)B|c}K_0
zwwxtK&Jw=uHES6##w-lvJ#WCB@_d()G7kQS|CMu>bX?}`s&8X2J9)oMY!>ClyO;TL
z!7bAD6@Q6yWAH1UR+7%$#m3v;@;0F|)&;JW$>Aqzx=$Q$$&;D+!l5o^f+flfcfQyw
zGLZj+^|6=O`$`f^8!|fAonoEqPLoN^C6>wy-OB7d#@=U@;sdht>@yf)PcQwDwJ0Ak
z*GhTVC7j|jFj6k@DW59pxj%m$XIA-ofiUA~yhU7%XKk^#KAzynXgt&8YoJcc;Ec2G
z(ZEvG;xUn{y}+3JAp3U5A;z>9+4XUXOFQI&Zlz(yD>sdXqs{$@*#j3?&s5pv5_zKN
z7D*wM7;FEfyv{k70l#>e;z^%S{wdTIKCg(Zkoc;SlX-7snP^;HC0ZJni^ouEA1m!f
zZ9qgtw#EchGa$22K@_kt6`1i}P&_L#{*ZZ;-kI3Sz?;e{<4Y^wa0T6IMldc)M?}n(
z4A^F6>ngsoeF`$&iY#j?f+Yj1n<b`Tfy{gkG^d>vBJP}zf59Tu^<qq{Ux1He2}XC8
zVlZUvUjr%!3)>*yx(^m*>=X%PiEX&&X6YY-t@6pOu;z-3W^z&6T!gW@V#G}gu%o>M
z6Xc?<!H5OP1&>MFHhA!t?S20L*n8RBJ12u_4$3i~a+O&@SX%H1PoSCFPsG&`hP${d
z48pAim6X=c?{44)X8u2qSSFYM-U;D?7RxW$?c~CH>t3|XN<OmBrhw%TR?E3vuuOjQ
z4ip)|`$6ZKdv2c7$}EmnX3cNSX7Xe$JeyoqGhb#t0MiNrcnUS&Y1Fh{jQab~tM#MD
zJAm$rLG-#)81N@Mzo-!~Wv>oL_zZbe2hXoPJ?Dl_7v9k6KV3V$aP{=uRy%te5qofK
z`td4C-_ws?O22~A_gADa5+0j==|njB^9?#N+z-J;8&Om`wm_k3l2UB_o|MMRTd3$F
zk$sJ1YmF0Iz{R=G?Dod1i}hm{FOFHrg>6tFok1uC<O$>07MRD)ce>N;UkA}*J<+wH
zt_T|%h_1x=?SCu5c$0Cs4IbuBvu%HR(+r+mxzCz(R$HlcWw;#*1z04uL$gu)6gap%
zatx-+xx1juOk&r2q!fd@V5S_<AzztoYh|<d?uLR&oRZt>pejZpJ?IOaLZ8{hzFvCv
zp-=Be%|C!1Z4iB4s$%F2)<=gh98aUSY8X8pL*GrpGO<1-`MfC4Jpqo1^=rgCCMQ;2
zAvYX{IX{ec$xWlkMx#9#iJrn}^fdZIy%-{S@W)4y)d<;0RSKi}8H~q=uqlzI2{4SY
z*cBAGXVN_Dli=Ctd<qJ)OiB&krCb?%Ouv5YwQak`Fh{a>NtP4=u*<(s<+;U)QtG+e
z$QGjRE5m4$8^hs6WaSu&ET-P9pl^SqbyA;Eu39Y1&<b*Y8dgi^^AOGvERGho5n0|Q
zvduJvnvl(t?jYo42b9r?dBC<EnPmquE23SF*wwVrJX0k~uaM~+wejj=)7Zt)F^e&j
zmPF}|Gu5k<uGERrE~0ddDDA5$!cd?Xqjd`~wy6Z`qNP~ha2wXuQ(}4<>Jc|R7h%0#
zj*<9cj7R0ABd}0r9){0l%^Gl5n%tiNZ#{A-rDU1n@L@`sCCgl@ja2RsQVm>P&{mY_
zCqM_t1_^L#!KO0=E|EK&CcuXY@U!&o9ERl=F7;zmO}x_&*uEcu_T-b!_;`}C+>{g-
zNs8I{K5BeZQYtEXQS<bn$JdWlp#hQ)x|JkFuO~^-he&?XsD*}Uex4<}c5BV!KT?5-
zbU%*BOrU!{Z#<4o<OR2ncR{r|nE!`=z{Edrng%jSy4Hsp2~QPCx{vUWQq|*$GngRZ
ziM3GG>xa>=pQT}a4zWpIa;X=_m$nJL;l9bvL7smI97g#YaIAQ8eyWU5{tJ8Zej7hj
Z#-npB6wB}OAL`^fb(JyyZp-G2-vNp9gvI~>
diff --git a/audio/panther/tuning/fortemedia/HEADSET.mods b/audio/panther/tuning/fortemedia/HEADSET.mods
index dcc2f42b..3e69d387 100644
--- a/audio/panther/tuning/fortemedia/HEADSET.mods
+++ b/audio/panther/tuning/fortemedia/HEADSET.mods
@@ -1,12 +1,12 @@
#PLATFORM_NAME gChip
#EXPORT_FLAG HEADSET
#SINGLE_API_VER 1.2.1
-#SAVE_TIME 2022-04-01 13:28:15
+#SAVE_TIME 2022-04-15 16:51:36
#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0009 //TX_OPERATION_MODE_1
@@ -971,7 +971,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x202C //RX_RECVFUNC_MODE_0
+0 0x242C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0000 //RX_SAMPLINGFREQ_SIG
3 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -2675,8 +2675,8 @@
#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0009 //TX_OPERATION_MODE_1
@@ -3641,7 +3641,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x202C //RX_RECVFUNC_MODE_0
+0 0x242C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0001 //RX_SAMPLINGFREQ_SIG
3 0x0001 //RX_SAMPLINGFREQ_PROC
@@ -5345,8 +5345,8 @@
#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
@@ -8015,8 +8015,8 @@
#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0009 //TX_OPERATION_MODE_1
@@ -10685,8 +10685,8 @@
#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0008 //TX_OPERATION_MODE_1
@@ -13355,8 +13355,8 @@
#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0008 //TX_OPERATION_MODE_1
@@ -16025,8 +16025,8 @@
#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
@@ -18695,8 +18695,8 @@
#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB
#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0009 //TX_OPERATION_MODE_1
@@ -21364,9 +21364,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-NB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0008 //TX_OPERATION_MODE_1
@@ -24034,9 +24034,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-WB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0008 //TX_OPERATION_MODE_1
@@ -26704,9 +26704,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-SWB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
@@ -29374,9 +29374,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-FB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0009 //TX_OPERATION_MODE_1
@@ -32044,14 +32044,14 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
2 0x00F3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0000 //TX_SAMPLINGFREQ_SIG
@@ -32213,7 +32213,7 @@
162 0x4000 //TX_MIN_EQ_RE_EST_10
163 0x6000 //TX_MIN_EQ_RE_EST_11
164 0x7FFF //TX_MIN_EQ_RE_EST_12
-165 0x2000 //TX_LAMBDA_RE_EST
+165 0x4000 //TX_LAMBDA_RE_EST
166 0x0000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x2000 //TX_GAIN_NP
@@ -32247,8 +32247,8 @@
196 0x0000 //TX_NORMENERHIGHTHL
197 0x7148 //TX_DTD_THR1_0
198 0x7148 //TX_DTD_THR1_1
-199 0x7148 //TX_DTD_THR1_2
-200 0x5DC0 //TX_DTD_THR1_3
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
201 0x7FF0 //TX_DTD_THR1_4
202 0x7FF0 //TX_DTD_THR1_5
203 0x7FF0 //TX_DTD_THR1_6
@@ -32406,7 +32406,7 @@
355 0x0800 //TX_DT_BINVAD_TH_2
356 0x0800 //TX_DT_BINVAD_TH_3
357 0x0FA0 //TX_DT_BINVAD_ENDF
-358 0x0400 //TX_C_POST_FLT_DT
+358 0x0200 //TX_C_POST_FLT_DT
359 0x4000 //TX_NS_B_POST_FLT_LESSCUT
360 0x0100 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
@@ -32449,7 +32449,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0004 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -32821,7 +32821,7 @@
770 0x0044 //TX_MIC_PWR_BIAS_1
771 0x0044 //TX_MIC_PWR_BIAS_2
772 0x0044 //TX_MIC_PWR_BIAS_3
-773 0x0009 //TX_GAIN_LIMIT_0
+773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
775 0x000F //TX_GAIN_LIMIT_2
776 0x000F //TX_GAIN_LIMIT_3
@@ -32992,8 +32992,8 @@
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
943 0x0A98 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+944 0xE890 //TX_AMS_RESRV_02
+945 0x2EE0 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -34714,14 +34714,14 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x0073 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0001 //TX_SAMPLINGFREQ_SIG
@@ -34887,9 +34887,9 @@
166 0x4000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x5000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x02A0 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
-171 0x05DC //TX_DT2_HOLD_N
+171 0x01B0 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
173 0x0000 //TX_AEC_RESRV_1
174 0x0014 //TX_AEC_RESRV_2
@@ -34915,9 +34915,9 @@
194 0x0000 //TX_NORMENERTH
195 0x0000 //TX_NORMENERHIGHTH
196 0x0000 //TX_NORMENERHIGHTHL
-197 0x6590 //TX_DTD_THR1_0
-198 0x6590 //TX_DTD_THR1_1
-199 0x6590 //TX_DTD_THR1_2
+197 0x7148 //TX_DTD_THR1_0
+198 0x7148 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
200 0x7FF0 //TX_DTD_THR1_3
201 0x7FF0 //TX_DTD_THR1_4
202 0x7FF0 //TX_DTD_THR1_5
@@ -34932,7 +34932,7 @@
211 0x7FFF //TX_DTD_THR3
212 0x0000 //TX_SPK_CUT_K
213 0x07D0 //TX_DT_CUT_K
-214 0x0100 //TX_DT_CUT_THR
+214 0x0020 //TX_DT_CUT_THR
215 0x04EB //TX_COMFORT_G
216 0x01F4 //TX_POWER_YOUT_TH
217 0x4000 //TX_FDPFGAINECHO
@@ -34941,10 +34941,10 @@
220 0x0000 //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x03E8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x0578 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+225 0x01CC //TX_RATIO_DT_L_TH_HIGH
+226 0x4A38 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -34952,7 +34952,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH
+234 0x015E //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -35074,9 +35074,9 @@
353 0x0200 //TX_DT_BINVAD_TH_0
354 0x0200 //TX_DT_BINVAD_TH_1
355 0x0200 //TX_DT_BINVAD_TH_2
-356 0x0200 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0800 //TX_C_POST_FLT_DT
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1388 //TX_DT_BINVAD_ENDF
+358 0x2000 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
360 0x0140 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
@@ -35119,7 +35119,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x4000 //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -35491,8 +35491,8 @@
770 0x0046 //TX_MIC_PWR_BIAS_1
771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x0009 //TX_GAIN_LIMIT_0
-774 0x000F //TX_GAIN_LIMIT_1
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
775 0x000F //TX_GAIN_LIMIT_2
776 0x000F //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
@@ -35662,8 +35662,8 @@
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
943 0x0C97 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+944 0xD508 //TX_AMS_RESRV_02
+945 0x1F40 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -37384,14 +37384,14 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x00B3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0003 //TX_SAMPLINGFREQ_SIG
@@ -37553,13 +37553,13 @@
162 0x7800 //TX_MIN_EQ_RE_EST_10
163 0x7800 //TX_MIN_EQ_RE_EST_11
164 0x7800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
+165 0x3000 //TX_LAMBDA_RE_EST
166 0x3000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x4000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x0260 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
-171 0x05DC //TX_DT2_HOLD_N
+171 0x0680 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
173 0x0000 //TX_AEC_RESRV_1
174 0x0014 //TX_AEC_RESRV_2
@@ -37585,7 +37585,7 @@
194 0x0000 //TX_NORMENERTH
195 0x0000 //TX_NORMENERHIGHTH
196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7FF0 //TX_DTD_THR1_0
+197 0x7B0C //TX_DTD_THR1_0
198 0x7FF0 //TX_DTD_THR1_1
199 0x7FF0 //TX_DTD_THR1_2
200 0x7FF0 //TX_DTD_THR1_3
@@ -37611,18 +37611,18 @@
220 0x7FFF //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1F40 //TX_RATIO_DT_L_TH_HIGH
-226 0x5014 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
+225 0x01F4 //TX_RATIO_DT_L_TH_HIGH
+226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x2328 //TX_RATIO_DT_L0_TH_HIGH
+234 0x00C8 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -37744,7 +37744,7 @@
353 0x0040 //TX_DT_BINVAD_TH_0
354 0x0040 //TX_DT_BINVAD_TH_1
355 0x0100 //TX_DT_BINVAD_TH_2
-356 0x0100 //TX_DT_BINVAD_TH_3
+356 0x2000 //TX_DT_BINVAD_TH_3
357 0x36B0 //TX_DT_BINVAD_ENDF
358 0x0200 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
@@ -37789,7 +37789,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -37960,17 +37960,17 @@
569 0x4850 //TX_FDEQ_GAIN_2
570 0x5050 //TX_FDEQ_GAIN_3
571 0x4B48 //TX_FDEQ_GAIN_4
-572 0x484B //TX_FDEQ_GAIN_5
-573 0x4B5C //TX_FDEQ_GAIN_6
+572 0x484E //TX_FDEQ_GAIN_5
+573 0x4E5C //TX_FDEQ_GAIN_6
574 0x564E //TX_FDEQ_GAIN_7
575 0x4C4E //TX_FDEQ_GAIN_8
576 0x4E45 //TX_FDEQ_GAIN_9
577 0x494A //TX_FDEQ_GAIN_10
578 0x534D //TX_FDEQ_GAIN_11
-579 0x5C57 //TX_FDEQ_GAIN_12
-580 0x5667 //TX_FDEQ_GAIN_13
-581 0x6778 //TX_FDEQ_GAIN_14
-582 0x8087 //TX_FDEQ_GAIN_15
+579 0x5C54 //TX_FDEQ_GAIN_12
+580 0x5466 //TX_FDEQ_GAIN_13
+581 0x5C70 //TX_FDEQ_GAIN_14
+582 0x7C84 //TX_FDEQ_GAIN_15
583 0x4848 //TX_FDEQ_GAIN_16
584 0x4848 //TX_FDEQ_GAIN_17
585 0x4848 //TX_FDEQ_GAIN_18
@@ -38158,12 +38158,12 @@
767 0x0050 //TX_MIC_CALIBRATION_2
768 0x0050 //TX_MIC_CALIBRATION_3
769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
+770 0x0046 //TX_MIC_PWR_BIAS_1
771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
-775 0x0000 //TX_GAIN_LIMIT_2
+775 0x000F //TX_GAIN_LIMIT_2
776 0x0000 //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
778 0x7FDE //TX_BVE_VAD0_ALPHAUP
@@ -38331,9 +38331,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0E21 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE0C0 //TX_AMS_RESRV_02
+945 0x0FA0 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -40054,9 +40054,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
@@ -42724,9 +42724,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0008 //TX_OPERATION_MODE_1
@@ -45394,9 +45394,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0008 //TX_OPERATION_MODE_1
@@ -48064,9 +48064,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
@@ -50734,9 +50734,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0009 //TX_OPERATION_MODE_0
1 0x0009 //TX_OPERATION_MODE_1
@@ -53404,9 +53404,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-NB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -54371,18 +54371,18 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x247C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0000 //RX_SAMPLINGFREQ_SIG
3 0x0000 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
-6 0x6000 //RX_TDDRC_ALPHA_UP_1
-7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
-8 0x6000 //RX_TDDRC_ALPHA_UP_3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0403 //RX_PGA
-11 0x7646 //RX_A_HP
+10 0x0800 //RX_PGA
+11 0x7652 //RX_A_HP
12 0x4000 //RX_B_PE
13 0x7800 //RX_THR_PITCH_DET_0
14 0x7000 //RX_THR_PITCH_DET_1
@@ -54399,8 +54399,8 @@
25 0x000A //RX_FENS_RESRV_0
26 0x0190 //RX_FENS_RESRV_1
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
30 0x0002 //RX_EXTRA_NS_L
31 0x0800 //RX_EXTRA_NS_A
32 0x4000 //RX_TDDRC_ALPHA_DWN_4
@@ -54410,16 +54410,16 @@
36 0x0000 //RX_LMT_THRD
37 0x4000 //RX_LMT_ALPHA
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8480 //RX_FDEQ_GAIN_0
-40 0x805A //RX_FDEQ_GAIN_1
-41 0x6060 //RX_FDEQ_GAIN_2
-42 0x6E7C //RX_FDEQ_GAIN_3
-43 0x808A //RX_FDEQ_GAIN_4
-44 0x8468 //RX_FDEQ_GAIN_5
-45 0x5452 //RX_FDEQ_GAIN_6
-46 0x5448 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
+39 0x5252 //RX_FDEQ_GAIN_0
+40 0x4E4F //RX_FDEQ_GAIN_1
+41 0x4743 //RX_FDEQ_GAIN_2
+42 0x454C //RX_FDEQ_GAIN_3
+43 0x4C49 //RX_FDEQ_GAIN_4
+44 0x584A //RX_FDEQ_GAIN_5
+45 0x4642 //RX_FDEQ_GAIN_6
+46 0x4043 //RX_FDEQ_GAIN_7
+47 0x454A //RX_FDEQ_GAIN_8
+48 0x4C53 //RX_FDEQ_GAIN_9
49 0x4848 //RX_FDEQ_GAIN_10
50 0x4848 //RX_FDEQ_GAIN_11
51 0x4848 //RX_FDEQ_GAIN_12
@@ -54434,16 +54434,16 @@
60 0x4848 //RX_FDEQ_GAIN_21
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0302 //RX_FDEQ_BIN_0
-64 0x0104 //RX_FDEQ_BIN_1
-65 0x0203 //RX_FDEQ_BIN_2
-66 0x0205 //RX_FDEQ_BIN_3
-67 0x0404 //RX_FDEQ_BIN_4
-68 0x0605 //RX_FDEQ_BIN_5
-69 0x0C08 //RX_FDEQ_BIN_6
-70 0x050A //RX_FDEQ_BIN_7
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0503 //RX_FDEQ_BIN_4
+68 0x0107 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
71 0x0B0C //RX_FDEQ_BIN_8
-72 0x1407 //RX_FDEQ_BIN_9
+72 0x0D08 //RX_FDEQ_BIN_9
73 0x0000 //RX_FDEQ_BIN_10
74 0x0000 //RX_FDEQ_BIN_11
75 0x0000 //RX_FDEQ_BIN_12
@@ -54483,23 +54483,23 @@
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
111 0x0004 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
+112 0x0002 //RX_TDDRC_THRD_0
113 0x0004 //RX_TDDRC_THRD_1
-114 0x0340 //RX_TDDRC_THRD_2
-115 0x1C00 //RX_TDDRC_THRD_3
-116 0x0000 //RX_TDDRC_SLANT_0
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x6000 //RX_TDDRC_ALPHA_UP_0
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0284 //RX_TDDRC_DRC_GAIN
+124 0x02D2 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x1194 //RX_TPKA_FP
+126 0x13E0 //RX_TPKA_FP
127 0x0400 //RX_MIN_G_FP
-128 0x0800 //RX_MAX_G_FP
+128 0x0B50 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -54553,13 +54553,13 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8476 //RX_FDEQ_GAIN_0
-40 0x765E //RX_FDEQ_GAIN_1
-41 0x626C //RX_FDEQ_GAIN_2
-42 0x7280 //RX_FDEQ_GAIN_3
-43 0x868C //RX_FDEQ_GAIN_4
-44 0x847C //RX_FDEQ_GAIN_5
-45 0x6662 //RX_FDEQ_GAIN_6
+39 0x8470 //RX_FDEQ_GAIN_0
+40 0x745E //RX_FDEQ_GAIN_1
+41 0x6675 //RX_FDEQ_GAIN_2
+42 0x7680 //RX_FDEQ_GAIN_3
+43 0x8684 //RX_FDEQ_GAIN_4
+44 0x7870 //RX_FDEQ_GAIN_5
+45 0x6462 //RX_FDEQ_GAIN_6
46 0x6056 //RX_FDEQ_GAIN_7
47 0x5454 //RX_FDEQ_GAIN_8
48 0x5454 //RX_FDEQ_GAIN_9
@@ -54625,7 +54625,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x006C //RX_SPK_VOL
+129 0x0047 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -54652,13 +54652,13 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8476 //RX_FDEQ_GAIN_0
-40 0x765E //RX_FDEQ_GAIN_1
-41 0x626C //RX_FDEQ_GAIN_2
-42 0x7280 //RX_FDEQ_GAIN_3
-43 0x868C //RX_FDEQ_GAIN_4
-44 0x847C //RX_FDEQ_GAIN_5
-45 0x6662 //RX_FDEQ_GAIN_6
+39 0x8470 //RX_FDEQ_GAIN_0
+40 0x745E //RX_FDEQ_GAIN_1
+41 0x6675 //RX_FDEQ_GAIN_2
+42 0x7680 //RX_FDEQ_GAIN_3
+43 0x8684 //RX_FDEQ_GAIN_4
+44 0x7870 //RX_FDEQ_GAIN_5
+45 0x6462 //RX_FDEQ_GAIN_6
46 0x6056 //RX_FDEQ_GAIN_7
47 0x5454 //RX_FDEQ_GAIN_8
48 0x5454 //RX_FDEQ_GAIN_9
@@ -54724,7 +54724,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00A4 //RX_SPK_VOL
+129 0x006B //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -54751,13 +54751,13 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8476 //RX_FDEQ_GAIN_0
-40 0x765E //RX_FDEQ_GAIN_1
-41 0x626C //RX_FDEQ_GAIN_2
-42 0x7280 //RX_FDEQ_GAIN_3
-43 0x868C //RX_FDEQ_GAIN_4
-44 0x847C //RX_FDEQ_GAIN_5
-45 0x6662 //RX_FDEQ_GAIN_6
+39 0x8470 //RX_FDEQ_GAIN_0
+40 0x745E //RX_FDEQ_GAIN_1
+41 0x6675 //RX_FDEQ_GAIN_2
+42 0x7680 //RX_FDEQ_GAIN_3
+43 0x8684 //RX_FDEQ_GAIN_4
+44 0x7870 //RX_FDEQ_GAIN_5
+45 0x6462 //RX_FDEQ_GAIN_6
46 0x6056 //RX_FDEQ_GAIN_7
47 0x5454 //RX_FDEQ_GAIN_8
48 0x5454 //RX_FDEQ_GAIN_9
@@ -54823,7 +54823,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00F6 //RX_SPK_VOL
+129 0x009F //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -54831,9 +54831,9 @@
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
29 0x6000 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
33 0x7214 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
@@ -54848,15 +54848,15 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0177 //RX_TDDRC_DRC_GAIN
+124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8476 //RX_FDEQ_GAIN_0
-40 0x765E //RX_FDEQ_GAIN_1
-41 0x626C //RX_FDEQ_GAIN_2
-42 0x7280 //RX_FDEQ_GAIN_3
-43 0x868C //RX_FDEQ_GAIN_4
-44 0x847C //RX_FDEQ_GAIN_5
-45 0x6662 //RX_FDEQ_GAIN_6
+39 0x8470 //RX_FDEQ_GAIN_0
+40 0x745E //RX_FDEQ_GAIN_1
+41 0x6675 //RX_FDEQ_GAIN_2
+42 0x7680 //RX_FDEQ_GAIN_3
+43 0x8684 //RX_FDEQ_GAIN_4
+44 0x7870 //RX_FDEQ_GAIN_5
+45 0x6462 //RX_FDEQ_GAIN_6
46 0x6056 //RX_FDEQ_GAIN_7
47 0x5454 //RX_FDEQ_GAIN_8
48 0x5454 //RX_FDEQ_GAIN_9
@@ -54922,7 +54922,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
+129 0x00ED //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -54936,7 +54936,7 @@
33 0x7214 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
112 0x0000 //RX_TDDRC_THRD_0
-113 0x0004 //RX_TDDRC_THRD_1
+113 0x0002 //RX_TDDRC_THRD_1
114 0x0340 //RX_TDDRC_THRD_2
115 0x0CE0 //RX_TDDRC_THRD_3
116 0x0000 //RX_TDDRC_SLANT_0
@@ -54947,15 +54947,15 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x023E //RX_TDDRC_DRC_GAIN
+124 0x016A //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8476 //RX_FDEQ_GAIN_0
-40 0x765E //RX_FDEQ_GAIN_1
-41 0x626C //RX_FDEQ_GAIN_2
-42 0x7280 //RX_FDEQ_GAIN_3
-43 0x868C //RX_FDEQ_GAIN_4
-44 0x847C //RX_FDEQ_GAIN_5
-45 0x6662 //RX_FDEQ_GAIN_6
+39 0x8470 //RX_FDEQ_GAIN_0
+40 0x745E //RX_FDEQ_GAIN_1
+41 0x6675 //RX_FDEQ_GAIN_2
+42 0x7680 //RX_FDEQ_GAIN_3
+43 0x8684 //RX_FDEQ_GAIN_4
+44 0x7870 //RX_FDEQ_GAIN_5
+45 0x6462 //RX_FDEQ_GAIN_6
46 0x6056 //RX_FDEQ_GAIN_7
47 0x5454 //RX_FDEQ_GAIN_8
48 0x5454 //RX_FDEQ_GAIN_9
@@ -55046,15 +55046,15 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0284 //RX_TDDRC_DRC_GAIN
+124 0x020B //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8480 //RX_FDEQ_GAIN_0
-40 0x805A //RX_FDEQ_GAIN_1
+39 0x8484 //RX_FDEQ_GAIN_0
+40 0x845A //RX_FDEQ_GAIN_1
41 0x6060 //RX_FDEQ_GAIN_2
-42 0x6E7C //RX_FDEQ_GAIN_3
-43 0x808A //RX_FDEQ_GAIN_4
+42 0x6E7E //RX_FDEQ_GAIN_3
+43 0x848C //RX_FDEQ_GAIN_4
44 0x8468 //RX_FDEQ_GAIN_5
-45 0x5452 //RX_FDEQ_GAIN_6
+45 0x5852 //RX_FDEQ_GAIN_6
46 0x5448 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
48 0x4848 //RX_FDEQ_GAIN_9
@@ -55145,15 +55145,15 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0478 //RX_TDDRC_DRC_GAIN
+124 0x03C3 //RX_TDDRC_DRC_GAIN
38 0x0014 //RX_FDEQ_SUBNUM
-39 0x8480 //RX_FDEQ_GAIN_0
-40 0x805A //RX_FDEQ_GAIN_1
+39 0x8484 //RX_FDEQ_GAIN_0
+40 0x845A //RX_FDEQ_GAIN_1
41 0x6060 //RX_FDEQ_GAIN_2
-42 0x6E7C //RX_FDEQ_GAIN_3
-43 0x808A //RX_FDEQ_GAIN_4
+42 0x6E7E //RX_FDEQ_GAIN_3
+43 0x848C //RX_FDEQ_GAIN_4
44 0x8468 //RX_FDEQ_GAIN_5
-45 0x5452 //RX_FDEQ_GAIN_6
+45 0x5852 //RX_FDEQ_GAIN_6
46 0x5448 //RX_FDEQ_GAIN_7
47 0x4848 //RX_FDEQ_GAIN_8
48 0x4848 //RX_FDEQ_GAIN_9
@@ -55222,7 +55222,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x243C //RX_RECVFUNC_MODE_0
+157 0x027C //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0000 //RX_SAMPLINGFREQ_SIG
160 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -55232,8 +55232,8 @@
164 0x1000 //RX_TDDRC_ALPHA_UP_2
165 0x1000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
-167 0x0403 //RX_PGA
-168 0x7646 //RX_A_HP
+167 0x0800 //RX_PGA
+168 0x7652 //RX_A_HP
169 0x4000 //RX_B_PE
170 0x7800 //RX_THR_PITCH_DET_0
171 0x7000 //RX_THR_PITCH_DET_1
@@ -55348,10 +55348,10 @@
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0780 //RX_TDDRC_DRC_GAIN
282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x1194 //RX_TPKA_FP
-284 0x0400 //RX_MIN_G_FP
-285 0x0800 //RX_MAX_G_FP
-286 0x0015 //RX_SPK_VOL
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
288 0x0000 //RX_MAXLEVEL_CNG
289 0x3000 //RX_BWE_UV_TH
@@ -55392,8 +55392,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55405,15 +55405,15 @@
281 0x0780 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4C68 //RX_FDEQ_GAIN_4
-201 0x403C //RX_FDEQ_GAIN_5
-202 0x3C38 //RX_FDEQ_GAIN_6
-203 0x3430 //RX_FDEQ_GAIN_7
-204 0x303C //RX_FDEQ_GAIN_8
-205 0x4C50 //RX_FDEQ_GAIN_9
+197 0x8054 //RX_FDEQ_GAIN_1
+198 0x5050 //RX_FDEQ_GAIN_2
+199 0x5058 //RX_FDEQ_GAIN_3
+200 0x5C70 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x484C //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -55432,7 +55432,7 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
+224 0x0604 //RX_FDEQ_BIN_4
225 0x0406 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
@@ -55476,7 +55476,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0012 //RX_SPK_VOL
+286 0x0015 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
163 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -55491,8 +55491,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55504,15 +55504,15 @@
281 0x0780 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4C68 //RX_FDEQ_GAIN_4
-201 0x403C //RX_FDEQ_GAIN_5
-202 0x3C38 //RX_FDEQ_GAIN_6
-203 0x3430 //RX_FDEQ_GAIN_7
-204 0x303C //RX_FDEQ_GAIN_8
-205 0x4C50 //RX_FDEQ_GAIN_9
+197 0x8054 //RX_FDEQ_GAIN_1
+198 0x5050 //RX_FDEQ_GAIN_2
+199 0x5058 //RX_FDEQ_GAIN_3
+200 0x5C70 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x484C //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -55531,7 +55531,7 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
+224 0x0604 //RX_FDEQ_BIN_4
225 0x0406 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
@@ -55575,7 +55575,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x001B //RX_SPK_VOL
+286 0x001E //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
163 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -55590,8 +55590,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55603,15 +55603,15 @@
281 0x0780 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4C68 //RX_FDEQ_GAIN_4
-201 0x403C //RX_FDEQ_GAIN_5
-202 0x3C38 //RX_FDEQ_GAIN_6
-203 0x3430 //RX_FDEQ_GAIN_7
-204 0x303C //RX_FDEQ_GAIN_8
-205 0x4C50 //RX_FDEQ_GAIN_9
+197 0x8054 //RX_FDEQ_GAIN_1
+198 0x5050 //RX_FDEQ_GAIN_2
+199 0x5058 //RX_FDEQ_GAIN_3
+200 0x5C70 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x484C //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -55630,7 +55630,7 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
+224 0x0604 //RX_FDEQ_BIN_4
225 0x0406 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
@@ -55674,7 +55674,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0026 //RX_SPK_VOL
+286 0x002A //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
163 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -55689,8 +55689,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55702,15 +55702,15 @@
281 0x0780 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4C68 //RX_FDEQ_GAIN_4
-201 0x403C //RX_FDEQ_GAIN_5
-202 0x3C38 //RX_FDEQ_GAIN_6
-203 0x3430 //RX_FDEQ_GAIN_7
-204 0x303C //RX_FDEQ_GAIN_8
-205 0x4C50 //RX_FDEQ_GAIN_9
+197 0x8054 //RX_FDEQ_GAIN_1
+198 0x5050 //RX_FDEQ_GAIN_2
+199 0x5058 //RX_FDEQ_GAIN_3
+200 0x5C70 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x484C //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -55729,7 +55729,7 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
+224 0x0604 //RX_FDEQ_BIN_4
225 0x0406 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
@@ -55773,7 +55773,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0037 //RX_SPK_VOL
+286 0x003C //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
163 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -55788,8 +55788,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55798,18 +55798,18 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0D56 //RX_TDDRC_DRC_GAIN
+281 0x0780 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4470 //RX_FDEQ_GAIN_4
-201 0x383C //RX_FDEQ_GAIN_5
-202 0x3C3C //RX_FDEQ_GAIN_6
-203 0x3434 //RX_FDEQ_GAIN_7
-204 0x344C //RX_FDEQ_GAIN_8
-205 0x585C //RX_FDEQ_GAIN_9
+197 0x8054 //RX_FDEQ_GAIN_1
+198 0x5050 //RX_FDEQ_GAIN_2
+199 0x5058 //RX_FDEQ_GAIN_3
+200 0x5C70 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x484C //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -55828,7 +55828,7 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
+224 0x0604 //RX_FDEQ_BIN_4
225 0x0406 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
@@ -55872,7 +55872,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x002C //RX_SPK_VOL
+286 0x0058 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
163 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -55887,8 +55887,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55897,18 +55897,18 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0D56 //RX_TDDRC_DRC_GAIN
+281 0x0780 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4470 //RX_FDEQ_GAIN_4
-201 0x383C //RX_FDEQ_GAIN_5
-202 0x3C3C //RX_FDEQ_GAIN_6
-203 0x3434 //RX_FDEQ_GAIN_7
-204 0x344C //RX_FDEQ_GAIN_8
-205 0x585C //RX_FDEQ_GAIN_9
+197 0x8054 //RX_FDEQ_GAIN_1
+198 0x5050 //RX_FDEQ_GAIN_2
+199 0x5058 //RX_FDEQ_GAIN_3
+200 0x5C70 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x484C //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -55927,7 +55927,7 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
+224 0x0604 //RX_FDEQ_BIN_4
225 0x0406 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
@@ -55971,7 +55971,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0051 //RX_SPK_VOL
+286 0x0082 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
163 0x1000 //RX_TDDRC_ALPHA_UP_1
@@ -55986,8 +55986,8 @@
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x1000 //RX_TDDRC_ALPHA_UP_0
@@ -55996,18 +55996,18 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0D56 //RX_TDDRC_DRC_GAIN
+281 0x0780 //RX_TDDRC_DRC_GAIN
195 0x0014 //RX_FDEQ_SUBNUM
196 0x8080 //RX_FDEQ_GAIN_0
-197 0x8050 //RX_FDEQ_GAIN_1
-198 0x4840 //RX_FDEQ_GAIN_2
-199 0x4040 //RX_FDEQ_GAIN_3
-200 0x4470 //RX_FDEQ_GAIN_4
-201 0x383C //RX_FDEQ_GAIN_5
-202 0x3C3C //RX_FDEQ_GAIN_6
-203 0x3434 //RX_FDEQ_GAIN_7
-204 0x344C //RX_FDEQ_GAIN_8
-205 0x585C //RX_FDEQ_GAIN_9
+197 0x8054 //RX_FDEQ_GAIN_1
+198 0x5050 //RX_FDEQ_GAIN_2
+199 0x5058 //RX_FDEQ_GAIN_3
+200 0x5C70 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x484C //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x485A //RX_FDEQ_GAIN_8
+205 0x5A58 //RX_FDEQ_GAIN_9
206 0x4848 //RX_FDEQ_GAIN_10
207 0x4848 //RX_FDEQ_GAIN_11
208 0x4848 //RX_FDEQ_GAIN_12
@@ -56026,7 +56026,7 @@
221 0x0203 //RX_FDEQ_BIN_1
222 0x0303 //RX_FDEQ_BIN_2
223 0x0304 //RX_FDEQ_BIN_3
-224 0x0703 //RX_FDEQ_BIN_4
+224 0x0604 //RX_FDEQ_BIN_4
225 0x0406 //RX_FDEQ_BIN_5
226 0x0708 //RX_FDEQ_BIN_6
227 0x090A //RX_FDEQ_BIN_7
@@ -56074,9 +56074,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-WB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -57041,7 +57041,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x247C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0001 //RX_SAMPLINGFREQ_SIG
3 0x0001 //RX_SAMPLINGFREQ_PROC
@@ -57051,7 +57051,7 @@
7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0403 //RX_PGA
+10 0x0800 //RX_PGA
11 0x7B02 //RX_A_HP
12 0x4000 //RX_B_PE
13 0x7800 //RX_THR_PITCH_DET_0
@@ -57167,9 +57167,9 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0180 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x157C //RX_TPKA_FP
+126 0x13E0 //RX_TPKA_FP
127 0x0400 //RX_MIN_G_FP
-128 0x0800 //RX_MAX_G_FP
+128 0x0B50 //RX_MAX_G_FP
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
@@ -57223,20 +57223,20 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x8474 //RX_FDEQ_GAIN_0
-40 0x6862 //RX_FDEQ_GAIN_1
-41 0x6460 //RX_FDEQ_GAIN_2
-42 0x6868 //RX_FDEQ_GAIN_3
-43 0x747A //RX_FDEQ_GAIN_4
-44 0x746A //RX_FDEQ_GAIN_5
-45 0x585E //RX_FDEQ_GAIN_6
-46 0x5A5A //RX_FDEQ_GAIN_7
-47 0x5A5A //RX_FDEQ_GAIN_8
-48 0x5A58 //RX_FDEQ_GAIN_9
-49 0x5854 //RX_FDEQ_GAIN_10
-50 0x5254 //RX_FDEQ_GAIN_11
-51 0x5656 //RX_FDEQ_GAIN_12
-52 0x5656 //RX_FDEQ_GAIN_13
+39 0x8478 //RX_FDEQ_GAIN_0
+40 0x6864 //RX_FDEQ_GAIN_1
+41 0x6C70 //RX_FDEQ_GAIN_2
+42 0x788C //RX_FDEQ_GAIN_3
+43 0x8686 //RX_FDEQ_GAIN_4
+44 0x7C7A //RX_FDEQ_GAIN_5
+45 0x5C6A //RX_FDEQ_GAIN_6
+46 0x6860 //RX_FDEQ_GAIN_7
+47 0x5C50 //RX_FDEQ_GAIN_8
+48 0x545A //RX_FDEQ_GAIN_9
+49 0x5C58 //RX_FDEQ_GAIN_10
+50 0x5858 //RX_FDEQ_GAIN_11
+51 0x6460 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -57250,8 +57250,8 @@
63 0x0401 //RX_FDEQ_BIN_0
64 0x0104 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
-66 0x0202 //RX_FDEQ_BIN_3
-67 0x0704 //RX_FDEQ_BIN_4
+66 0x0403 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
68 0x0605 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
@@ -57295,7 +57295,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0048 //RX_SPK_VOL
+129 0x0042 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -57322,20 +57322,20 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x8474 //RX_FDEQ_GAIN_0
-40 0x6862 //RX_FDEQ_GAIN_1
-41 0x6460 //RX_FDEQ_GAIN_2
-42 0x6868 //RX_FDEQ_GAIN_3
-43 0x747A //RX_FDEQ_GAIN_4
-44 0x746A //RX_FDEQ_GAIN_5
-45 0x585E //RX_FDEQ_GAIN_6
-46 0x5A5A //RX_FDEQ_GAIN_7
-47 0x5A5A //RX_FDEQ_GAIN_8
-48 0x5A58 //RX_FDEQ_GAIN_9
-49 0x5854 //RX_FDEQ_GAIN_10
-50 0x5254 //RX_FDEQ_GAIN_11
-51 0x5656 //RX_FDEQ_GAIN_12
-52 0x5656 //RX_FDEQ_GAIN_13
+39 0x8478 //RX_FDEQ_GAIN_0
+40 0x6864 //RX_FDEQ_GAIN_1
+41 0x6C70 //RX_FDEQ_GAIN_2
+42 0x788C //RX_FDEQ_GAIN_3
+43 0x8686 //RX_FDEQ_GAIN_4
+44 0x7C7A //RX_FDEQ_GAIN_5
+45 0x5C6A //RX_FDEQ_GAIN_6
+46 0x6860 //RX_FDEQ_GAIN_7
+47 0x5C50 //RX_FDEQ_GAIN_8
+48 0x545A //RX_FDEQ_GAIN_9
+49 0x5C58 //RX_FDEQ_GAIN_10
+50 0x5858 //RX_FDEQ_GAIN_11
+51 0x6460 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -57349,8 +57349,8 @@
63 0x0401 //RX_FDEQ_BIN_0
64 0x0104 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
-66 0x0202 //RX_FDEQ_BIN_3
-67 0x0704 //RX_FDEQ_BIN_4
+66 0x0403 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
68 0x0605 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
@@ -57394,7 +57394,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x006E //RX_SPK_VOL
+129 0x0065 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -57421,20 +57421,20 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x8474 //RX_FDEQ_GAIN_0
-40 0x6862 //RX_FDEQ_GAIN_1
-41 0x6460 //RX_FDEQ_GAIN_2
-42 0x6868 //RX_FDEQ_GAIN_3
-43 0x747A //RX_FDEQ_GAIN_4
-44 0x746A //RX_FDEQ_GAIN_5
-45 0x585E //RX_FDEQ_GAIN_6
-46 0x5A5A //RX_FDEQ_GAIN_7
-47 0x5A5A //RX_FDEQ_GAIN_8
-48 0x5A58 //RX_FDEQ_GAIN_9
-49 0x5854 //RX_FDEQ_GAIN_10
-50 0x5254 //RX_FDEQ_GAIN_11
-51 0x5656 //RX_FDEQ_GAIN_12
-52 0x5656 //RX_FDEQ_GAIN_13
+39 0x8478 //RX_FDEQ_GAIN_0
+40 0x6864 //RX_FDEQ_GAIN_1
+41 0x6C70 //RX_FDEQ_GAIN_2
+42 0x788C //RX_FDEQ_GAIN_3
+43 0x8686 //RX_FDEQ_GAIN_4
+44 0x7C7A //RX_FDEQ_GAIN_5
+45 0x5C6A //RX_FDEQ_GAIN_6
+46 0x6860 //RX_FDEQ_GAIN_7
+47 0x5C50 //RX_FDEQ_GAIN_8
+48 0x545A //RX_FDEQ_GAIN_9
+49 0x5C58 //RX_FDEQ_GAIN_10
+50 0x5858 //RX_FDEQ_GAIN_11
+51 0x6460 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -57448,8 +57448,8 @@
63 0x0401 //RX_FDEQ_BIN_0
64 0x0104 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
-66 0x0202 //RX_FDEQ_BIN_3
-67 0x0704 //RX_FDEQ_BIN_4
+66 0x0403 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
68 0x0605 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
@@ -57493,7 +57493,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00A8 //RX_SPK_VOL
+129 0x0098 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -57520,20 +57520,20 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x8474 //RX_FDEQ_GAIN_0
-40 0x6862 //RX_FDEQ_GAIN_1
-41 0x6460 //RX_FDEQ_GAIN_2
-42 0x6868 //RX_FDEQ_GAIN_3
-43 0x747A //RX_FDEQ_GAIN_4
-44 0x746A //RX_FDEQ_GAIN_5
-45 0x585E //RX_FDEQ_GAIN_6
-46 0x5A5A //RX_FDEQ_GAIN_7
-47 0x5A5A //RX_FDEQ_GAIN_8
-48 0x5A58 //RX_FDEQ_GAIN_9
-49 0x5854 //RX_FDEQ_GAIN_10
-50 0x5254 //RX_FDEQ_GAIN_11
-51 0x5656 //RX_FDEQ_GAIN_12
-52 0x5656 //RX_FDEQ_GAIN_13
+39 0x8478 //RX_FDEQ_GAIN_0
+40 0x6864 //RX_FDEQ_GAIN_1
+41 0x6C70 //RX_FDEQ_GAIN_2
+42 0x788C //RX_FDEQ_GAIN_3
+43 0x8686 //RX_FDEQ_GAIN_4
+44 0x7C7A //RX_FDEQ_GAIN_5
+45 0x5C6A //RX_FDEQ_GAIN_6
+46 0x6860 //RX_FDEQ_GAIN_7
+47 0x5C50 //RX_FDEQ_GAIN_8
+48 0x545A //RX_FDEQ_GAIN_9
+49 0x5C58 //RX_FDEQ_GAIN_10
+50 0x5858 //RX_FDEQ_GAIN_11
+51 0x6460 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -57547,8 +57547,8 @@
63 0x0401 //RX_FDEQ_BIN_0
64 0x0104 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
-66 0x0202 //RX_FDEQ_BIN_3
-67 0x0704 //RX_FDEQ_BIN_4
+66 0x0403 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
68 0x0605 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
@@ -57592,7 +57592,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
+129 0x00E6 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -57617,22 +57617,22 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0180 //RX_TDDRC_DRC_GAIN
+124 0x015E //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x8474 //RX_FDEQ_GAIN_0
-40 0x6862 //RX_FDEQ_GAIN_1
-41 0x6460 //RX_FDEQ_GAIN_2
-42 0x6868 //RX_FDEQ_GAIN_3
-43 0x747A //RX_FDEQ_GAIN_4
-44 0x746A //RX_FDEQ_GAIN_5
-45 0x585E //RX_FDEQ_GAIN_6
-46 0x5A5A //RX_FDEQ_GAIN_7
-47 0x5A5A //RX_FDEQ_GAIN_8
-48 0x5A58 //RX_FDEQ_GAIN_9
-49 0x5854 //RX_FDEQ_GAIN_10
-50 0x5254 //RX_FDEQ_GAIN_11
-51 0x5656 //RX_FDEQ_GAIN_12
-52 0x5656 //RX_FDEQ_GAIN_13
+39 0x8478 //RX_FDEQ_GAIN_0
+40 0x6864 //RX_FDEQ_GAIN_1
+41 0x6C70 //RX_FDEQ_GAIN_2
+42 0x788C //RX_FDEQ_GAIN_3
+43 0x8686 //RX_FDEQ_GAIN_4
+44 0x7C7A //RX_FDEQ_GAIN_5
+45 0x5C6A //RX_FDEQ_GAIN_6
+46 0x6860 //RX_FDEQ_GAIN_7
+47 0x5C50 //RX_FDEQ_GAIN_8
+48 0x545A //RX_FDEQ_GAIN_9
+49 0x5C58 //RX_FDEQ_GAIN_10
+50 0x5858 //RX_FDEQ_GAIN_11
+51 0x6460 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
53 0x4848 //RX_FDEQ_GAIN_14
54 0x4848 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -57646,8 +57646,8 @@
63 0x0401 //RX_FDEQ_BIN_0
64 0x0104 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
-66 0x0202 //RX_FDEQ_BIN_3
-67 0x0704 //RX_FDEQ_BIN_4
+66 0x0403 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
68 0x0605 //RX_FDEQ_BIN_5
69 0x0410 //RX_FDEQ_BIN_6
70 0x050A //RX_FDEQ_BIN_7
@@ -57716,14 +57716,14 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0284 //RX_TDDRC_DRC_GAIN
+124 0x01FF //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x846E //RX_FDEQ_GAIN_0
-40 0x6266 //RX_FDEQ_GAIN_1
-41 0x6666 //RX_FDEQ_GAIN_2
-42 0x6E80 //RX_FDEQ_GAIN_3
-43 0x7A7E //RX_FDEQ_GAIN_4
-44 0x7470 //RX_FDEQ_GAIN_5
+39 0x847A //RX_FDEQ_GAIN_0
+40 0x6C66 //RX_FDEQ_GAIN_1
+41 0x6868 //RX_FDEQ_GAIN_2
+42 0x7084 //RX_FDEQ_GAIN_3
+43 0x7E82 //RX_FDEQ_GAIN_4
+44 0x7874 //RX_FDEQ_GAIN_5
45 0x5864 //RX_FDEQ_GAIN_6
46 0x625C //RX_FDEQ_GAIN_7
47 0x5C50 //RX_FDEQ_GAIN_8
@@ -57815,14 +57815,14 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0478 //RX_TDDRC_DRC_GAIN
+124 0x038D //RX_TDDRC_DRC_GAIN
38 0x001C //RX_FDEQ_SUBNUM
-39 0x846E //RX_FDEQ_GAIN_0
-40 0x6266 //RX_FDEQ_GAIN_1
-41 0x6666 //RX_FDEQ_GAIN_2
-42 0x6E80 //RX_FDEQ_GAIN_3
-43 0x7A7E //RX_FDEQ_GAIN_4
-44 0x7470 //RX_FDEQ_GAIN_5
+39 0x847A //RX_FDEQ_GAIN_0
+40 0x6C66 //RX_FDEQ_GAIN_1
+41 0x6868 //RX_FDEQ_GAIN_2
+42 0x7084 //RX_FDEQ_GAIN_3
+43 0x7E82 //RX_FDEQ_GAIN_4
+44 0x7874 //RX_FDEQ_GAIN_5
45 0x5864 //RX_FDEQ_GAIN_6
46 0x625C //RX_FDEQ_GAIN_7
47 0x5C50 //RX_FDEQ_GAIN_8
@@ -57892,7 +57892,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x243C //RX_RECVFUNC_MODE_0
+157 0x027C //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0001 //RX_SAMPLINGFREQ_SIG
160 0x0001 //RX_SAMPLINGFREQ_PROC
@@ -57902,7 +57902,7 @@
164 0x6000 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
-167 0x0403 //RX_PGA
+167 0x0800 //RX_PGA
168 0x7B02 //RX_A_HP
169 0x4000 //RX_B_PE
170 0x7800 //RX_THR_PITCH_DET_0
@@ -57932,19 +57932,19 @@
194 0x4000 //RX_LMT_ALPHA
195 0x001C //RX_FDEQ_SUBNUM
196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6864 //RX_FDEQ_GAIN_1
-198 0x7070 //RX_FDEQ_GAIN_2
-199 0x6058 //RX_FDEQ_GAIN_3
+197 0x6858 //RX_FDEQ_GAIN_1
+198 0x5858 //RX_FDEQ_GAIN_2
+199 0x5858 //RX_FDEQ_GAIN_3
200 0x5C5C //RX_FDEQ_GAIN_4
-201 0x8854 //RX_FDEQ_GAIN_5
-202 0x5448 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
+201 0x5C54 //RX_FDEQ_GAIN_5
+202 0x544C //RX_FDEQ_GAIN_6
+203 0x4A48 //RX_FDEQ_GAIN_7
204 0x4860 //RX_FDEQ_GAIN_8
205 0x6068 //RX_FDEQ_GAIN_9
-206 0x7070 //RX_FDEQ_GAIN_10
-207 0x8070 //RX_FDEQ_GAIN_11
-208 0x6060 //RX_FDEQ_GAIN_12
-209 0x7070 //RX_FDEQ_GAIN_13
+206 0x6C6C //RX_FDEQ_GAIN_10
+207 0x6C68 //RX_FDEQ_GAIN_11
+208 0x5A5A //RX_FDEQ_GAIN_12
+209 0x5A5C //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58018,10 +58018,10 @@
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0715 //RX_TDDRC_DRC_GAIN
282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x157C //RX_TPKA_FP
-284 0x0400 //RX_MIN_G_FP
-285 0x0800 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0011 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
288 0x0000 //RX_MAXLEVEL_CNG
289 0x3000 //RX_BWE_UV_TH
@@ -58055,15 +58055,15 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58072,22 +58072,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x0715 //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
-196 0x5C5C //RX_FDEQ_GAIN_0
-197 0x5448 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4840 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x6048 //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4038 //RX_FDEQ_GAIN_7
-204 0x3C48 //RX_FDEQ_GAIN_8
-205 0x545C //RX_FDEQ_GAIN_9
-206 0x6864 //RX_FDEQ_GAIN_10
-207 0x7058 //RX_FDEQ_GAIN_11
-208 0x443C //RX_FDEQ_GAIN_12
-209 0x3838 //RX_FDEQ_GAIN_13
+196 0x6868 //RX_FDEQ_GAIN_0
+197 0x6858 //RX_FDEQ_GAIN_1
+198 0x5858 //RX_FDEQ_GAIN_2
+199 0x5858 //RX_FDEQ_GAIN_3
+200 0x5C5C //RX_FDEQ_GAIN_4
+201 0x5C54 //RX_FDEQ_GAIN_5
+202 0x544C //RX_FDEQ_GAIN_6
+203 0x4A48 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x6068 //RX_FDEQ_GAIN_9
+206 0x6C6C //RX_FDEQ_GAIN_10
+207 0x6C68 //RX_FDEQ_GAIN_11
+208 0x5A5A //RX_FDEQ_GAIN_12
+209 0x5A5C //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58154,15 +58154,15 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58171,22 +58171,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x0715 //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
-196 0x5C5C //RX_FDEQ_GAIN_0
-197 0x5448 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4840 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x6048 //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4038 //RX_FDEQ_GAIN_7
-204 0x3C48 //RX_FDEQ_GAIN_8
-205 0x545C //RX_FDEQ_GAIN_9
-206 0x6864 //RX_FDEQ_GAIN_10
-207 0x7058 //RX_FDEQ_GAIN_11
-208 0x443C //RX_FDEQ_GAIN_12
-209 0x3838 //RX_FDEQ_GAIN_13
+196 0x6868 //RX_FDEQ_GAIN_0
+197 0x6858 //RX_FDEQ_GAIN_1
+198 0x5858 //RX_FDEQ_GAIN_2
+199 0x5858 //RX_FDEQ_GAIN_3
+200 0x5C5C //RX_FDEQ_GAIN_4
+201 0x5C54 //RX_FDEQ_GAIN_5
+202 0x544C //RX_FDEQ_GAIN_6
+203 0x4A48 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x6068 //RX_FDEQ_GAIN_9
+206 0x6C6C //RX_FDEQ_GAIN_10
+207 0x6C68 //RX_FDEQ_GAIN_11
+208 0x5A5A //RX_FDEQ_GAIN_12
+209 0x5A5C //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58253,15 +58253,15 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58270,22 +58270,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x0715 //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
-196 0x5C5C //RX_FDEQ_GAIN_0
-197 0x5448 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4840 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x6048 //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4038 //RX_FDEQ_GAIN_7
-204 0x3C48 //RX_FDEQ_GAIN_8
-205 0x545C //RX_FDEQ_GAIN_9
-206 0x6864 //RX_FDEQ_GAIN_10
-207 0x7058 //RX_FDEQ_GAIN_11
-208 0x443C //RX_FDEQ_GAIN_12
-209 0x3838 //RX_FDEQ_GAIN_13
+196 0x6868 //RX_FDEQ_GAIN_0
+197 0x6858 //RX_FDEQ_GAIN_1
+198 0x5858 //RX_FDEQ_GAIN_2
+199 0x5858 //RX_FDEQ_GAIN_3
+200 0x5C5C //RX_FDEQ_GAIN_4
+201 0x5C54 //RX_FDEQ_GAIN_5
+202 0x544C //RX_FDEQ_GAIN_6
+203 0x4A48 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x6068 //RX_FDEQ_GAIN_9
+206 0x6C6C //RX_FDEQ_GAIN_10
+207 0x6C68 //RX_FDEQ_GAIN_11
+208 0x5A5A //RX_FDEQ_GAIN_12
+209 0x5A5C //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58352,114 +58352,15 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
-190 0x7214 //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0002 //RX_TDDRC_THRD_0
-270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x6000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x5C5C //RX_FDEQ_GAIN_0
-197 0x5448 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4840 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x6048 //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4038 //RX_FDEQ_GAIN_7
-204 0x3C48 //RX_FDEQ_GAIN_8
-205 0x545C //RX_FDEQ_GAIN_9
-206 0x6864 //RX_FDEQ_GAIN_10
-207 0x7058 //RX_FDEQ_GAIN_11
-208 0x443C //RX_FDEQ_GAIN_12
-209 0x3838 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0404 //RX_FDEQ_BIN_4
-225 0x0204 //RX_FDEQ_BIN_5
-226 0x0A0A //RX_FDEQ_BIN_6
-227 0x0A0A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1104 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0035 //RX_FDDRC_BAND_MARGIN_1
-248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
-249 0x0120 //RX_FDDRC_BAND_MARGIN_3
-250 0x0004 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x2000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x2000 //RX_FDDRC_THRD_3_2
-258 0x5000 //RX_FDDRC_THRD_3_3
-259 0x4000 //RX_FDDRC_SLANT_0_0
-260 0x4000 //RX_FDDRC_SLANT_0_1
-261 0x4000 //RX_FDDRC_SLANT_0_2
-262 0x4000 //RX_FDDRC_SLANT_0_3
-263 0x7FFF //RX_FDDRC_SLANT_1_0
-264 0x7FFF //RX_FDDRC_SLANT_1_1
-265 0x7FFF //RX_FDDRC_SLANT_1_2
-266 0x7FFF //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0034 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x6000 //RX_TDDRC_ALPHA_UP_1
-164 0x6000 //RX_TDDRC_ALPHA_UP_2
-165 0x6000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58468,22 +58369,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0B39 //RX_TDDRC_DRC_GAIN
+281 0x0715 //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
196 0x6868 //RX_FDEQ_GAIN_0
-197 0x685C //RX_FDEQ_GAIN_1
-198 0x6868 //RX_FDEQ_GAIN_2
-199 0x544C //RX_FDEQ_GAIN_3
-200 0x4C54 //RX_FDEQ_GAIN_4
-201 0x704C //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x445C //RX_FDEQ_GAIN_8
+197 0x6858 //RX_FDEQ_GAIN_1
+198 0x5858 //RX_FDEQ_GAIN_2
+199 0x5858 //RX_FDEQ_GAIN_3
+200 0x5C5C //RX_FDEQ_GAIN_4
+201 0x5C54 //RX_FDEQ_GAIN_5
+202 0x544C //RX_FDEQ_GAIN_6
+203 0x4A48 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
205 0x6068 //RX_FDEQ_GAIN_9
-206 0x7070 //RX_FDEQ_GAIN_10
-207 0x7C74 //RX_FDEQ_GAIN_11
-208 0x6060 //RX_FDEQ_GAIN_12
-209 0x6C6C //RX_FDEQ_GAIN_13
+206 0x6C6C //RX_FDEQ_GAIN_10
+207 0x6C68 //RX_FDEQ_GAIN_11
+208 0x5A5A //RX_FDEQ_GAIN_12
+209 0x5A5C //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58542,23 +58443,23 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0038 //RX_SPK_VOL
+286 0x0033 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
+#VOL 4
163 0x6000 //RX_TDDRC_ALPHA_UP_1
164 0x6000 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58567,22 +58468,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0B39 //RX_TDDRC_DRC_GAIN
+281 0x0715 //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
196 0x6868 //RX_FDEQ_GAIN_0
-197 0x685C //RX_FDEQ_GAIN_1
-198 0x6868 //RX_FDEQ_GAIN_2
-199 0x544C //RX_FDEQ_GAIN_3
-200 0x4C54 //RX_FDEQ_GAIN_4
-201 0x704C //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x445C //RX_FDEQ_GAIN_8
+197 0x6858 //RX_FDEQ_GAIN_1
+198 0x5858 //RX_FDEQ_GAIN_2
+199 0x5858 //RX_FDEQ_GAIN_3
+200 0x5C5C //RX_FDEQ_GAIN_4
+201 0x8854 //RX_FDEQ_GAIN_5
+202 0x5448 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
205 0x6068 //RX_FDEQ_GAIN_9
206 0x7070 //RX_FDEQ_GAIN_10
-207 0x7C74 //RX_FDEQ_GAIN_11
+207 0x8070 //RX_FDEQ_GAIN_11
208 0x6060 //RX_FDEQ_GAIN_12
-209 0x6C6C //RX_FDEQ_GAIN_13
+209 0x7070 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58641,7 +58542,106 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0060 //RX_SPK_VOL
+286 0x0049 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x6000 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0002 //RX_TDDRC_THRD_0
+270 0x0004 //RX_TDDRC_THRD_1
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0715 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x6868 //RX_FDEQ_GAIN_0
+197 0x6858 //RX_FDEQ_GAIN_1
+198 0x5858 //RX_FDEQ_GAIN_2
+199 0x5858 //RX_FDEQ_GAIN_3
+200 0x5C5C //RX_FDEQ_GAIN_4
+201 0x8854 //RX_FDEQ_GAIN_5
+202 0x5448 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x6068 //RX_FDEQ_GAIN_9
+206 0x7070 //RX_FDEQ_GAIN_10
+207 0x8070 //RX_FDEQ_GAIN_11
+208 0x6060 //RX_FDEQ_GAIN_12
+209 0x7070 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0204 //RX_FDEQ_BIN_5
+226 0x0A0A //RX_FDEQ_BIN_6
+227 0x0A0A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1104 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0074 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -58649,15 +58649,15 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
+271 0x1C00 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
273 0x7FFF //RX_TDDRC_SLANT_0
274 0x7FFF //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
@@ -58666,22 +58666,22 @@
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0B39 //RX_TDDRC_DRC_GAIN
+281 0x0715 //RX_TDDRC_DRC_GAIN
195 0x001C //RX_FDEQ_SUBNUM
196 0x6868 //RX_FDEQ_GAIN_0
-197 0x685C //RX_FDEQ_GAIN_1
-198 0x6868 //RX_FDEQ_GAIN_2
-199 0x544C //RX_FDEQ_GAIN_3
-200 0x4C54 //RX_FDEQ_GAIN_4
-201 0x704C //RX_FDEQ_GAIN_5
-202 0x4C40 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x445C //RX_FDEQ_GAIN_8
+197 0x6864 //RX_FDEQ_GAIN_1
+198 0x7070 //RX_FDEQ_GAIN_2
+199 0x6058 //RX_FDEQ_GAIN_3
+200 0x5C5C //RX_FDEQ_GAIN_4
+201 0x8854 //RX_FDEQ_GAIN_5
+202 0x5448 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
205 0x6068 //RX_FDEQ_GAIN_9
206 0x7070 //RX_FDEQ_GAIN_10
-207 0x7C74 //RX_FDEQ_GAIN_11
+207 0x8070 //RX_FDEQ_GAIN_11
208 0x6060 //RX_FDEQ_GAIN_12
-209 0x6C6C //RX_FDEQ_GAIN_13
+209 0x7070 //RX_FDEQ_GAIN_13
210 0x4848 //RX_FDEQ_GAIN_14
211 0x4848 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
@@ -58744,9 +58744,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-SWB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -59711,18 +59711,18 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x206C //RX_RECVFUNC_MODE_0
+0 0x247C //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0003 //RX_SAMPLINGFREQ_SIG
3 0x0003 //RX_SAMPLINGFREQ_PROC
4 0x000A //RX_FRAME_SZ
5 0x0000 //RX_DELAY_OPT
6 0x6000 //RX_TDDRC_ALPHA_UP_1
-7 0x6000 //RX_TDDRC_ALPHA_UP_2
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
8 0x6000 //RX_TDDRC_ALPHA_UP_3
9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0403 //RX_PGA
-11 0x7D83 //RX_A_HP
+10 0x0800 //RX_PGA
+11 0x7652 //RX_A_HP
12 0x4000 //RX_B_PE
13 0x7800 //RX_THR_PITCH_DET_0
14 0x7000 //RX_THR_PITCH_DET_1
@@ -59740,32 +59740,32 @@
26 0x0190 //RX_FENS_RESRV_1
27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
30 0x0002 //RX_EXTRA_NS_L
31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
33 0x7214 //RX_TDDRC_LIMITER_THRD
34 0x0800 //RX_TDDRC_LIMITER_GAIN
35 0x199A //RX_A_POST_FLT
36 0x0000 //RX_LMT_THRD
37 0x4000 //RX_LMT_ALPHA
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x7C48 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4860 //RX_FDEQ_GAIN_8
-48 0x7468 //RX_FDEQ_GAIN_9
-49 0x5858 //RX_FDEQ_GAIN_10
-50 0x5858 //RX_FDEQ_GAIN_11
-51 0x5C54 //RX_FDEQ_GAIN_12
-52 0x5448 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x5858 //RX_FDEQ_GAIN_15
+39 0x847E //RX_FDEQ_GAIN_0
+40 0x5C58 //RX_FDEQ_GAIN_1
+41 0x5E5C //RX_FDEQ_GAIN_2
+42 0x6260 //RX_FDEQ_GAIN_3
+43 0x6C64 //RX_FDEQ_GAIN_4
+44 0x6260 //RX_FDEQ_GAIN_5
+45 0x6664 //RX_FDEQ_GAIN_6
+46 0x6460 //RX_FDEQ_GAIN_7
+47 0x5E6A //RX_FDEQ_GAIN_8
+48 0x6668 //RX_FDEQ_GAIN_9
+49 0x645A //RX_FDEQ_GAIN_10
+50 0x5A5E //RX_FDEQ_GAIN_11
+51 0x6A58 //RX_FDEQ_GAIN_12
+52 0x646E //RX_FDEQ_GAIN_13
+53 0x787C //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
57 0x4848 //RX_FDEQ_GAIN_18
@@ -59774,22 +59774,22 @@
60 0x4848 //RX_FDEQ_GAIN_21
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
-68 0x0308 //RX_FDEQ_BIN_5
-69 0x0808 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E2D //RX_FDEQ_BIN_11
+75 0x1923 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
79 0x0000 //RX_FDEQ_BIN_16
80 0x0000 //RX_FDEQ_BIN_17
81 0x0000 //RX_FDEQ_BIN_18
@@ -59823,24 +59823,24 @@
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
111 0x0003 //RX_FILTINDX
-112 0x0002 //RX_TDDRC_THRD_0
-113 0x0004 //RX_TDDRC_THRD_1
-114 0x1A00 //RX_TDDRC_THRD_2
-115 0x1A00 //RX_TDDRC_THRD_3
-116 0x7EB8 //RX_TDDRC_SLANT_0
-117 0x2500 //RX_TDDRC_SLANT_1
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
118 0x6000 //RX_TDDRC_ALPHA_UP_0
119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
120 0x0000 //RX_TDDRC_HMNC_FLAG
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0550 //RX_TDDRC_DRC_GAIN
+124 0x0100 //RX_TDDRC_DRC_GAIN
125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x0FA0 //RX_TPKA_FP
+126 0x13E0 //RX_TPKA_FP
127 0x0400 //RX_MIN_G_FP
-128 0x0800 //RX_MAX_G_FP
-129 0x0014 //RX_SPK_VOL
+128 0x0B50 //RX_MAX_G_FP
+129 0x004B //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
131 0x0000 //RX_MAXLEVEL_CNG
132 0x3000 //RX_BWE_UV_TH
@@ -59893,21 +59893,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -59965,7 +59965,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x004B //RX_SPK_VOL
+129 0x0040 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 1
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -59992,21 +59992,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -60064,7 +60064,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0072 //RX_SPK_VOL
+129 0x0060 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 2
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -60091,21 +60091,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -60163,7 +60163,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x00AF //RX_SPK_VOL
+129 0x0094 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 3
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -60190,21 +60190,21 @@
123 0x0CCD //RX_TDDRC_SMT_W
124 0x0100 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -60262,7 +60262,7 @@
108 0x7FFF //RX_FDDRC_SLANT_1_2
109 0x7FFF //RX_FDDRC_SLANT_1_3
110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
+129 0x00E1 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#VOL 4
6 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -60287,23 +60287,23 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0197 //RX_TDDRC_DRC_GAIN
+124 0x0152 //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x847E //RX_FDEQ_GAIN_0
-40 0x5C58 //RX_FDEQ_GAIN_1
-41 0x5E5C //RX_FDEQ_GAIN_2
-42 0x6260 //RX_FDEQ_GAIN_3
-43 0x6C64 //RX_FDEQ_GAIN_4
-44 0x6260 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6460 //RX_FDEQ_GAIN_7
-47 0x5E6A //RX_FDEQ_GAIN_8
-48 0x6668 //RX_FDEQ_GAIN_9
-49 0x645A //RX_FDEQ_GAIN_10
-50 0x5A5E //RX_FDEQ_GAIN_11
-51 0x6A58 //RX_FDEQ_GAIN_12
-52 0x646E //RX_FDEQ_GAIN_13
-53 0x787C //RX_FDEQ_GAIN_14
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
56 0x4848 //RX_FDEQ_GAIN_17
@@ -60386,22 +60386,22 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0260 //RX_TDDRC_DRC_GAIN
+124 0x021E //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x846C //RX_FDEQ_GAIN_0
-40 0x4A48 //RX_FDEQ_GAIN_1
-41 0x5054 //RX_FDEQ_GAIN_2
-42 0x6268 //RX_FDEQ_GAIN_3
-43 0x726C //RX_FDEQ_GAIN_4
-44 0x6862 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6462 //RX_FDEQ_GAIN_7
-47 0x6060 //RX_FDEQ_GAIN_8
-48 0x5C60 //RX_FDEQ_GAIN_9
-49 0x6060 //RX_FDEQ_GAIN_10
-50 0x6064 //RX_FDEQ_GAIN_11
-51 0x705C //RX_FDEQ_GAIN_12
-52 0x6870 //RX_FDEQ_GAIN_13
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x5C50 //RX_FDEQ_GAIN_1
+41 0x5C5C //RX_FDEQ_GAIN_2
+42 0x6C74 //RX_FDEQ_GAIN_3
+43 0x7E78 //RX_FDEQ_GAIN_4
+44 0x7670 //RX_FDEQ_GAIN_5
+45 0x666E //RX_FDEQ_GAIN_6
+46 0x6C6C //RX_FDEQ_GAIN_7
+47 0x686A //RX_FDEQ_GAIN_8
+48 0x666A //RX_FDEQ_GAIN_9
+49 0x6668 //RX_FDEQ_GAIN_10
+50 0x6C6C //RX_FDEQ_GAIN_11
+51 0x7C68 //RX_FDEQ_GAIN_12
+52 0x7478 //RX_FDEQ_GAIN_13
53 0x787C //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -60413,7 +60413,7 @@
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0301 //RX_FDEQ_BIN_0
-64 0x0105 //RX_FDEQ_BIN_1
+64 0x0204 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
@@ -60485,22 +60485,22 @@
121 0x199A //RX_TDDRC_HMNC_GAIN
122 0x0001 //RX_TDDRC_SMT_FLAG
123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0478 //RX_TDDRC_DRC_GAIN
+124 0x03FC //RX_TDDRC_DRC_GAIN
38 0x0020 //RX_FDEQ_SUBNUM
-39 0x846C //RX_FDEQ_GAIN_0
-40 0x4A48 //RX_FDEQ_GAIN_1
-41 0x5054 //RX_FDEQ_GAIN_2
-42 0x6268 //RX_FDEQ_GAIN_3
-43 0x726C //RX_FDEQ_GAIN_4
-44 0x6862 //RX_FDEQ_GAIN_5
-45 0x6664 //RX_FDEQ_GAIN_6
-46 0x6462 //RX_FDEQ_GAIN_7
-47 0x6060 //RX_FDEQ_GAIN_8
-48 0x5C60 //RX_FDEQ_GAIN_9
-49 0x6060 //RX_FDEQ_GAIN_10
-50 0x6064 //RX_FDEQ_GAIN_11
-51 0x705C //RX_FDEQ_GAIN_12
-52 0x6870 //RX_FDEQ_GAIN_13
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x5C50 //RX_FDEQ_GAIN_1
+41 0x5C5C //RX_FDEQ_GAIN_2
+42 0x6C74 //RX_FDEQ_GAIN_3
+43 0x7E78 //RX_FDEQ_GAIN_4
+44 0x7670 //RX_FDEQ_GAIN_5
+45 0x666E //RX_FDEQ_GAIN_6
+46 0x6C6C //RX_FDEQ_GAIN_7
+47 0x686A //RX_FDEQ_GAIN_8
+48 0x666A //RX_FDEQ_GAIN_9
+49 0x6668 //RX_FDEQ_GAIN_10
+50 0x6C6C //RX_FDEQ_GAIN_11
+51 0x7C68 //RX_FDEQ_GAIN_12
+52 0x7478 //RX_FDEQ_GAIN_13
53 0x787C //RX_FDEQ_GAIN_14
54 0x9898 //RX_FDEQ_GAIN_15
55 0x4848 //RX_FDEQ_GAIN_16
@@ -60512,7 +60512,7 @@
61 0x4848 //RX_FDEQ_GAIN_22
62 0x4848 //RX_FDEQ_GAIN_23
63 0x0301 //RX_FDEQ_BIN_0
-64 0x0105 //RX_FDEQ_BIN_1
+64 0x0204 //RX_FDEQ_BIN_1
65 0x0203 //RX_FDEQ_BIN_2
66 0x0205 //RX_FDEQ_BIN_3
67 0x0404 //RX_FDEQ_BIN_4
@@ -60562,7 +60562,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x243C //RX_RECVFUNC_MODE_0
+157 0x027C //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0003 //RX_SAMPLINGFREQ_SIG
160 0x0003 //RX_SAMPLINGFREQ_PROC
@@ -60572,8 +60572,8 @@
164 0x6000 //RX_TDDRC_ALPHA_UP_2
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
-167 0x0403 //RX_PGA
-168 0x7D83 //RX_A_HP
+167 0x0800 //RX_PGA
+168 0x7652 //RX_A_HP
169 0x4000 //RX_B_PE
170 0x7800 //RX_THR_PITCH_DET_0
171 0x7000 //RX_THR_PITCH_DET_1
@@ -60606,17 +60606,17 @@
198 0x4848 //RX_FDEQ_GAIN_2
199 0x4848 //RX_FDEQ_GAIN_3
200 0x4848 //RX_FDEQ_GAIN_4
-201 0x7C48 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
203 0x4848 //RX_FDEQ_GAIN_7
204 0x4860 //RX_FDEQ_GAIN_8
205 0x7468 //RX_FDEQ_GAIN_9
-206 0x5858 //RX_FDEQ_GAIN_10
-207 0x5858 //RX_FDEQ_GAIN_11
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6060 //RX_FDEQ_GAIN_11
208 0x5C54 //RX_FDEQ_GAIN_12
-209 0x5448 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x5858 //RX_FDEQ_GAIN_15
+209 0x5450 //RX_FDEQ_GAIN_13
+210 0x5050 //RX_FDEQ_GAIN_14
+211 0x5860 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -60688,9 +60688,9 @@
280 0x0CCD //RX_TDDRC_SMT_W
281 0x0550 //RX_TDDRC_DRC_GAIN
282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x0FA0 //RX_TPKA_FP
-284 0x0400 //RX_MIN_G_FP
-285 0x0800 //RX_MAX_G_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
286 0x0014 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
288 0x0000 //RX_MAXLEVEL_CNG
@@ -60725,41 +60725,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x0550 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6848 //RX_FDEQ_GAIN_1
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
-199 0x3434 //RX_FDEQ_GAIN_3
-200 0x3840 //RX_FDEQ_GAIN_4
-201 0x4838 //RX_FDEQ_GAIN_5
-202 0x5444 //RX_FDEQ_GAIN_6
-203 0x443C //RX_FDEQ_GAIN_7
-204 0x3C60 //RX_FDEQ_GAIN_8
-205 0x6460 //RX_FDEQ_GAIN_9
-206 0x6064 //RX_FDEQ_GAIN_10
-207 0x5C5C //RX_FDEQ_GAIN_11
-208 0x5440 //RX_FDEQ_GAIN_12
-209 0x4040 //RX_FDEQ_GAIN_13
-210 0x4040 //RX_FDEQ_GAIN_14
-211 0x5858 //RX_FDEQ_GAIN_15
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6060 //RX_FDEQ_GAIN_11
+208 0x5C54 //RX_FDEQ_GAIN_12
+209 0x5450 //RX_FDEQ_GAIN_13
+210 0x5050 //RX_FDEQ_GAIN_14
+211 0x5860 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -60816,7 +60816,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0011 //RX_SPK_VOL
+286 0x0014 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 1
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -60824,41 +60824,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x0550 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6848 //RX_FDEQ_GAIN_1
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
-199 0x3434 //RX_FDEQ_GAIN_3
-200 0x3840 //RX_FDEQ_GAIN_4
-201 0x4838 //RX_FDEQ_GAIN_5
-202 0x5444 //RX_FDEQ_GAIN_6
-203 0x443C //RX_FDEQ_GAIN_7
-204 0x3C60 //RX_FDEQ_GAIN_8
-205 0x6460 //RX_FDEQ_GAIN_9
-206 0x6064 //RX_FDEQ_GAIN_10
-207 0x5C5C //RX_FDEQ_GAIN_11
-208 0x5440 //RX_FDEQ_GAIN_12
-209 0x4040 //RX_FDEQ_GAIN_13
-210 0x4040 //RX_FDEQ_GAIN_14
-211 0x5858 //RX_FDEQ_GAIN_15
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6060 //RX_FDEQ_GAIN_11
+208 0x5C54 //RX_FDEQ_GAIN_12
+209 0x5450 //RX_FDEQ_GAIN_13
+210 0x5050 //RX_FDEQ_GAIN_14
+211 0x5860 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -60915,7 +60915,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0019 //RX_SPK_VOL
+286 0x001D //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 2
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -60923,41 +60923,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x0550 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6848 //RX_FDEQ_GAIN_1
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
-199 0x3434 //RX_FDEQ_GAIN_3
-200 0x3840 //RX_FDEQ_GAIN_4
-201 0x4838 //RX_FDEQ_GAIN_5
-202 0x5444 //RX_FDEQ_GAIN_6
-203 0x443C //RX_FDEQ_GAIN_7
-204 0x3C60 //RX_FDEQ_GAIN_8
-205 0x6460 //RX_FDEQ_GAIN_9
-206 0x6064 //RX_FDEQ_GAIN_10
-207 0x5C5C //RX_FDEQ_GAIN_11
-208 0x5440 //RX_FDEQ_GAIN_12
-209 0x4040 //RX_FDEQ_GAIN_13
-210 0x4040 //RX_FDEQ_GAIN_14
-211 0x5858 //RX_FDEQ_GAIN_15
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6060 //RX_FDEQ_GAIN_11
+208 0x5C54 //RX_FDEQ_GAIN_12
+209 0x5450 //RX_FDEQ_GAIN_13
+210 0x5050 //RX_FDEQ_GAIN_14
+211 0x5860 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -61014,7 +61014,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0025 //RX_SPK_VOL
+286 0x0029 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 3
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -61022,41 +61022,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0780 //RX_TDDRC_DRC_GAIN
+281 0x0550 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6848 //RX_FDEQ_GAIN_1
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
198 0x4848 //RX_FDEQ_GAIN_2
-199 0x3434 //RX_FDEQ_GAIN_3
-200 0x3840 //RX_FDEQ_GAIN_4
-201 0x4838 //RX_FDEQ_GAIN_5
-202 0x5444 //RX_FDEQ_GAIN_6
-203 0x443C //RX_FDEQ_GAIN_7
-204 0x3C60 //RX_FDEQ_GAIN_8
-205 0x6460 //RX_FDEQ_GAIN_9
-206 0x6064 //RX_FDEQ_GAIN_10
-207 0x5C5C //RX_FDEQ_GAIN_11
-208 0x5440 //RX_FDEQ_GAIN_12
-209 0x4040 //RX_FDEQ_GAIN_13
-210 0x4040 //RX_FDEQ_GAIN_14
-211 0x5858 //RX_FDEQ_GAIN_15
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6060 //RX_FDEQ_GAIN_11
+208 0x5C54 //RX_FDEQ_GAIN_12
+209 0x5450 //RX_FDEQ_GAIN_13
+210 0x5050 //RX_FDEQ_GAIN_14
+211 0x5860 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -61113,7 +61113,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0036 //RX_SPK_VOL
+286 0x0039 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 4
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -61121,41 +61121,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0D56 //RX_TDDRC_DRC_GAIN
+281 0x0550 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6850 //RX_FDEQ_GAIN_1
-198 0x5048 //RX_FDEQ_GAIN_2
-199 0x383C //RX_FDEQ_GAIN_3
-200 0x4048 //RX_FDEQ_GAIN_4
-201 0x7040 //RX_FDEQ_GAIN_5
-202 0x4C44 //RX_FDEQ_GAIN_6
-203 0x4448 //RX_FDEQ_GAIN_7
-204 0x4868 //RX_FDEQ_GAIN_8
-205 0x7C70 //RX_FDEQ_GAIN_9
-206 0x707C //RX_FDEQ_GAIN_10
-207 0x786C //RX_FDEQ_GAIN_11
-208 0x6454 //RX_FDEQ_GAIN_12
-209 0x604C //RX_FDEQ_GAIN_13
-210 0x585C //RX_FDEQ_GAIN_14
-211 0x7480 //RX_FDEQ_GAIN_15
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x5454 //RX_FDEQ_GAIN_4
+201 0x7C54 //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6060 //RX_FDEQ_GAIN_11
+208 0x5C54 //RX_FDEQ_GAIN_12
+209 0x5450 //RX_FDEQ_GAIN_13
+210 0x5050 //RX_FDEQ_GAIN_14
+211 0x5860 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -61212,7 +61212,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0034 //RX_SPK_VOL
+286 0x005F //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 5
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -61220,41 +61220,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0D56 //RX_TDDRC_DRC_GAIN
+281 0x0550 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6850 //RX_FDEQ_GAIN_1
-198 0x5048 //RX_FDEQ_GAIN_2
-199 0x383C //RX_FDEQ_GAIN_3
-200 0x4048 //RX_FDEQ_GAIN_4
-201 0x7040 //RX_FDEQ_GAIN_5
-202 0x4C44 //RX_FDEQ_GAIN_6
-203 0x4448 //RX_FDEQ_GAIN_7
-204 0x4868 //RX_FDEQ_GAIN_8
-205 0x7C70 //RX_FDEQ_GAIN_9
-206 0x707C //RX_FDEQ_GAIN_10
-207 0x786C //RX_FDEQ_GAIN_11
-208 0x6454 //RX_FDEQ_GAIN_12
-209 0x604C //RX_FDEQ_GAIN_13
-210 0x585C //RX_FDEQ_GAIN_14
-211 0x7480 //RX_FDEQ_GAIN_15
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x5454 //RX_FDEQ_GAIN_4
+201 0x7C54 //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6060 //RX_FDEQ_GAIN_11
+208 0x5C54 //RX_FDEQ_GAIN_12
+209 0x5450 //RX_FDEQ_GAIN_13
+210 0x5050 //RX_FDEQ_GAIN_14
+211 0x5860 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -61311,7 +61311,7 @@
265 0x7FFF //RX_FDDRC_SLANT_1_2
266 0x7FFF //RX_FDDRC_SLANT_1_3
267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0059 //RX_SPK_VOL
+286 0x008E //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
#VOL 6
163 0x6000 //RX_TDDRC_ALPHA_UP_1
@@ -61319,41 +61319,41 @@
165 0x6000 //RX_TDDRC_ALPHA_UP_3
166 0x1000 //RX_TDDRC_ALPHA_UP_4
184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x4000 //RX_TDDRC_ALPHA_DWN_2
-186 0x4000 //RX_TDDRC_ALPHA_DWN_3
-189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
190 0x7214 //RX_TDDRC_LIMITER_THRD
191 0x0800 //RX_TDDRC_LIMITER_GAIN
269 0x0002 //RX_TDDRC_THRD_0
270 0x0004 //RX_TDDRC_THRD_1
-271 0x1800 //RX_TDDRC_THRD_2
-272 0x1800 //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
275 0x6000 //RX_TDDRC_ALPHA_UP_0
276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
277 0x0000 //RX_TDDRC_HMNC_FLAG
278 0x199A //RX_TDDRC_HMNC_GAIN
279 0x0001 //RX_TDDRC_SMT_FLAG
280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0D56 //RX_TDDRC_DRC_GAIN
+281 0x0550 //RX_TDDRC_DRC_GAIN
195 0x0020 //RX_FDEQ_SUBNUM
-196 0x6868 //RX_FDEQ_GAIN_0
-197 0x6850 //RX_FDEQ_GAIN_1
-198 0x5048 //RX_FDEQ_GAIN_2
-199 0x383C //RX_FDEQ_GAIN_3
-200 0x4048 //RX_FDEQ_GAIN_4
-201 0x7040 //RX_FDEQ_GAIN_5
-202 0x4C44 //RX_FDEQ_GAIN_6
-203 0x4448 //RX_FDEQ_GAIN_7
-204 0x4868 //RX_FDEQ_GAIN_8
-205 0x7C70 //RX_FDEQ_GAIN_9
-206 0x707C //RX_FDEQ_GAIN_10
-207 0x786C //RX_FDEQ_GAIN_11
-208 0x6454 //RX_FDEQ_GAIN_12
-209 0x604C //RX_FDEQ_GAIN_13
-210 0x585C //RX_FDEQ_GAIN_14
-211 0x7480 //RX_FDEQ_GAIN_15
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x5454 //RX_FDEQ_GAIN_4
+201 0x7C54 //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6060 //RX_FDEQ_GAIN_11
+208 0x5C54 //RX_FDEQ_GAIN_12
+209 0x5450 //RX_FDEQ_GAIN_13
+210 0x5050 //RX_FDEQ_GAIN_14
+211 0x5860 //RX_FDEQ_GAIN_15
212 0x4848 //RX_FDEQ_GAIN_16
213 0x4848 //RX_FDEQ_GAIN_17
214 0x4848 //RX_FDEQ_GAIN_18
@@ -61414,9 +61414,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-FB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -64084,14 +64084,14 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-NB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
2 0x00F3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0000 //TX_SAMPLINGFREQ_SIG
@@ -64253,7 +64253,7 @@
162 0x4000 //TX_MIN_EQ_RE_EST_10
163 0x6000 //TX_MIN_EQ_RE_EST_11
164 0x7FFF //TX_MIN_EQ_RE_EST_12
-165 0x2000 //TX_LAMBDA_RE_EST
+165 0x4000 //TX_LAMBDA_RE_EST
166 0x0000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x2000 //TX_GAIN_NP
@@ -64287,8 +64287,8 @@
196 0x0000 //TX_NORMENERHIGHTHL
197 0x7148 //TX_DTD_THR1_0
198 0x7148 //TX_DTD_THR1_1
-199 0x7148 //TX_DTD_THR1_2
-200 0x5DC0 //TX_DTD_THR1_3
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
201 0x7FF0 //TX_DTD_THR1_4
202 0x7FF0 //TX_DTD_THR1_5
203 0x7FF0 //TX_DTD_THR1_6
@@ -64446,7 +64446,7 @@
355 0x0800 //TX_DT_BINVAD_TH_2
356 0x0800 //TX_DT_BINVAD_TH_3
357 0x0FA0 //TX_DT_BINVAD_ENDF
-358 0x0400 //TX_C_POST_FLT_DT
+358 0x0200 //TX_C_POST_FLT_DT
359 0x4000 //TX_NS_B_POST_FLT_LESSCUT
360 0x0100 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
@@ -64489,7 +64489,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0004 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -64861,7 +64861,7 @@
770 0x0044 //TX_MIC_PWR_BIAS_1
771 0x0044 //TX_MIC_PWR_BIAS_2
772 0x0044 //TX_MIC_PWR_BIAS_3
-773 0x0009 //TX_GAIN_LIMIT_0
+773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
775 0x000F //TX_GAIN_LIMIT_2
776 0x000F //TX_GAIN_LIMIT_3
@@ -65032,8 +65032,8 @@
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
943 0x0A98 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+944 0xE890 //TX_AMS_RESRV_02
+945 0x2EE0 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -66754,14 +66754,14 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-WB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x0073 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0001 //TX_SAMPLINGFREQ_SIG
@@ -66927,9 +66927,9 @@
166 0x4000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x5000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x02A0 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
-171 0x05DC //TX_DT2_HOLD_N
+171 0x01B0 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
173 0x0000 //TX_AEC_RESRV_1
174 0x0014 //TX_AEC_RESRV_2
@@ -66955,9 +66955,9 @@
194 0x0000 //TX_NORMENERTH
195 0x0000 //TX_NORMENERHIGHTH
196 0x0000 //TX_NORMENERHIGHTHL
-197 0x6590 //TX_DTD_THR1_0
-198 0x6590 //TX_DTD_THR1_1
-199 0x6590 //TX_DTD_THR1_2
+197 0x7148 //TX_DTD_THR1_0
+198 0x7148 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
200 0x7FF0 //TX_DTD_THR1_3
201 0x7FF0 //TX_DTD_THR1_4
202 0x7FF0 //TX_DTD_THR1_5
@@ -66972,7 +66972,7 @@
211 0x7FFF //TX_DTD_THR3
212 0x0000 //TX_SPK_CUT_K
213 0x07D0 //TX_DT_CUT_K
-214 0x0100 //TX_DT_CUT_THR
+214 0x0020 //TX_DT_CUT_THR
215 0x04EB //TX_COMFORT_G
216 0x01F4 //TX_POWER_YOUT_TH
217 0x4000 //TX_FDPFGAINECHO
@@ -66981,10 +66981,10 @@
220 0x0000 //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x03E8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x0578 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+225 0x01CC //TX_RATIO_DT_L_TH_HIGH
+226 0x4A38 //TX_RATIO_DT_H_TH_HIGH
227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
@@ -66992,7 +66992,7 @@
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH
+234 0x015E //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -67114,9 +67114,9 @@
353 0x0200 //TX_DT_BINVAD_TH_0
354 0x0200 //TX_DT_BINVAD_TH_1
355 0x0200 //TX_DT_BINVAD_TH_2
-356 0x0200 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0800 //TX_C_POST_FLT_DT
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1388 //TX_DT_BINVAD_ENDF
+358 0x2000 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
360 0x0140 //TX_DT_BOOST
361 0x0000 //TX_BF_SGRAD_FLG
@@ -67159,7 +67159,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x4000 //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -67531,8 +67531,8 @@
770 0x0046 //TX_MIC_PWR_BIAS_1
771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x0009 //TX_GAIN_LIMIT_0
-774 0x000F //TX_GAIN_LIMIT_1
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
775 0x000F //TX_GAIN_LIMIT_2
776 0x000F //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
@@ -67702,8 +67702,8 @@
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
943 0x0C97 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+944 0xD508 //TX_AMS_RESRV_02
+945 0x1F40 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -69424,14 +69424,14 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-SWB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
-2 0x00B3 //TX_PATCH_REG
-3 0x2F7C //TX_SENDFUNC_MODE_0
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
4 0x0000 //TX_SENDFUNC_MODE_1
5 0x0003 //TX_NUM_MIC
6 0x0003 //TX_SAMPLINGFREQ_SIG
@@ -69593,13 +69593,13 @@
162 0x7800 //TX_MIN_EQ_RE_EST_10
163 0x7800 //TX_MIN_EQ_RE_EST_11
164 0x7800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
+165 0x3000 //TX_LAMBDA_RE_EST
166 0x3000 //TX_LAMBDA_CB_NLE
167 0x7FFF //TX_C_POST_FLT
168 0x4000 //TX_GAIN_NP
-169 0x0180 //TX_SE_HOLD_N
+169 0x0260 //TX_SE_HOLD_N
170 0x00C8 //TX_DT_HOLD_N
-171 0x05DC //TX_DT2_HOLD_N
+171 0x0680 //TX_DT2_HOLD_N
172 0x6666 //TX_AEC_RESRV_0
173 0x0000 //TX_AEC_RESRV_1
174 0x0014 //TX_AEC_RESRV_2
@@ -69625,7 +69625,7 @@
194 0x0000 //TX_NORMENERTH
195 0x0000 //TX_NORMENERHIGHTH
196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7FF0 //TX_DTD_THR1_0
+197 0x7B0C //TX_DTD_THR1_0
198 0x7FF0 //TX_DTD_THR1_1
199 0x7FF0 //TX_DTD_THR1_2
200 0x7FF0 //TX_DTD_THR1_3
@@ -69651,18 +69651,18 @@
220 0x7FFF //TX_DTD_MIC_BLK
221 0x023E //TX_ADPT_STRICT_L
222 0x023E //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1F40 //TX_RATIO_DT_L_TH_HIGH
-226 0x5014 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
+225 0x01F4 //TX_RATIO_DT_L_TH_HIGH
+226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+227 0x0001 //TX_RATIO_DT_L0_TH
228 0x7FFF //TX_B_POST_FILT_ECHO_L
229 0x7FFF //TX_B_POST_FILT_ECHO_H
230 0x0200 //TX_MIN_G_CTRL_ECHO
231 0x1000 //TX_B_LESSCUT_RTO_ECHO
232 0x0000 //TX_EPD_OFFSET_00
233 0x0000 //TX_EPD_OFFST_01
-234 0x2328 //TX_RATIO_DT_L0_TH_HIGH
+234 0x00C8 //TX_RATIO_DT_L0_TH_HIGH
235 0x7FFF //TX_RATIO_DT_H_TH_CUT
236 0x7FFF //TX_MIN_EQ_RE_EST_13
237 0x0000 //TX_DTD_THR1_7
@@ -69784,7 +69784,7 @@
353 0x0040 //TX_DT_BINVAD_TH_0
354 0x0040 //TX_DT_BINVAD_TH_1
355 0x0100 //TX_DT_BINVAD_TH_2
-356 0x0100 //TX_DT_BINVAD_TH_3
+356 0x2000 //TX_DT_BINVAD_TH_3
357 0x36B0 //TX_DT_BINVAD_ENDF
358 0x0200 //TX_C_POST_FLT_DT
359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
@@ -69829,7 +69829,7 @@
398 0x1800 //TX_C_POST_FLT_MASK
399 0x7FFF //TX_A_POST_FLT_WNS
400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0001 //TX_MAXLEVEL_CNG
+401 0x0005 //TX_MAXLEVEL_CNG
402 0x00B4 //TX_STN_NOISE_TH
403 0x4000 //TX_POST_MASK_SUP
404 0x7FFF //TX_POST_MASK_ADJUST
@@ -70000,17 +70000,17 @@
569 0x4850 //TX_FDEQ_GAIN_2
570 0x5050 //TX_FDEQ_GAIN_3
571 0x4B48 //TX_FDEQ_GAIN_4
-572 0x484B //TX_FDEQ_GAIN_5
-573 0x4B5C //TX_FDEQ_GAIN_6
+572 0x484E //TX_FDEQ_GAIN_5
+573 0x4E5C //TX_FDEQ_GAIN_6
574 0x564E //TX_FDEQ_GAIN_7
575 0x4C4E //TX_FDEQ_GAIN_8
576 0x4E45 //TX_FDEQ_GAIN_9
577 0x494A //TX_FDEQ_GAIN_10
578 0x534D //TX_FDEQ_GAIN_11
-579 0x5C57 //TX_FDEQ_GAIN_12
-580 0x5667 //TX_FDEQ_GAIN_13
-581 0x6778 //TX_FDEQ_GAIN_14
-582 0x8087 //TX_FDEQ_GAIN_15
+579 0x5C54 //TX_FDEQ_GAIN_12
+580 0x5466 //TX_FDEQ_GAIN_13
+581 0x5C70 //TX_FDEQ_GAIN_14
+582 0x7C84 //TX_FDEQ_GAIN_15
583 0x4848 //TX_FDEQ_GAIN_16
584 0x4848 //TX_FDEQ_GAIN_17
585 0x4848 //TX_FDEQ_GAIN_18
@@ -70198,12 +70198,12 @@
767 0x0050 //TX_MIC_CALIBRATION_2
768 0x0050 //TX_MIC_CALIBRATION_3
769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
+770 0x0046 //TX_MIC_PWR_BIAS_1
771 0x0046 //TX_MIC_PWR_BIAS_2
772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
774 0x000F //TX_GAIN_LIMIT_1
-775 0x0000 //TX_GAIN_LIMIT_2
+775 0x000F //TX_GAIN_LIMIT_2
776 0x0000 //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
778 0x7FDE //TX_BVE_VAD0_ALPHAUP
@@ -70371,9 +70371,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0E21 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x4E20 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE0C0 //TX_AMS_RESRV_02
+945 0x0FA0 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -72094,9 +72094,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-FB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0001 //TX_OPERATION_MODE_1
@@ -74764,9 +74764,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-NB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -77434,9 +77434,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-WB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -80104,9 +80104,9 @@
287 0x0000 //RX_VOL_RESRV_0
#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-SWB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -80749,23 +80749,21383 @@
638 0x4848 //TX_PREEQ_GAIN_MIC0_21
639 0x4848 //TX_PREEQ_GAIN_MIC0_22
640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0000 //TX_PREEQ_BIN_MIC0_0
-642 0x0000 //TX_PREEQ_BIN_MIC0_1
-643 0x0000 //TX_PREEQ_BIN_MIC0_2
-644 0x0000 //TX_PREEQ_BIN_MIC0_3
-645 0x0000 //TX_PREEQ_BIN_MIC0_4
-646 0x0000 //TX_PREEQ_BIN_MIC0_5
-647 0x0000 //TX_PREEQ_BIN_MIC0_6
-648 0x0000 //TX_PREEQ_BIN_MIC0_7
-649 0x0000 //TX_PREEQ_BIN_MIC0_8
-650 0x0000 //TX_PREEQ_BIN_MIC0_9
-651 0x0000 //TX_PREEQ_BIN_MIC0_10
-652 0x0000 //TX_PREEQ_BIN_MIC0_11
-653 0x0000 //TX_PREEQ_BIN_MIC0_12
-654 0x0000 //TX_PREEQ_BIN_MIC0_13
-655 0x0000 //TX_PREEQ_BIN_MIC0_14
-656 0x0000 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x2040 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x050D //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0000 //RX_PITCH_BFR_LEN
+17 0x0000 //RX_SBD_PITCH_DET
+18 0x0000 //RX_PP_RESRV_0
+19 0x0000 //RX_PP_RESRV_1
+20 0xF800 //RX_N_SN_EST
+21 0x0000 //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0000 //RX_FENS_RESRV_1
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+30 0x0000 //RX_EXTRA_NS_L
+31 0x0000 //RX_EXTRA_NS_A
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x0000 //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x0080 //RX_MIN_G_FP
+128 0x2000 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0010 //RX_MAXLEVEL_CNG
+132 0x0000 //RX_BWE_UV_TH
+133 0x0000 //RX_BWE_UV_TH2
+134 0x0000 //RX_BWE_UV_TH3
+135 0x0000 //RX_BWE_V_TH
+136 0x0000 //RX_BWE_GAIN1_V_TH1
+137 0x0000 //RX_BWE_GAIN1_V_TH2
+138 0x0000 //RX_BWE_UV_EQ
+139 0x0000 //RX_BWE_V_EQ
+140 0x0000 //RX_BWE_TONE_TH
+141 0x0000 //RX_BWE_UV_HOLD_T
+142 0x0000 //RX_BWE_GAIN2_ALPHA
+143 0x0000 //RX_BWE_GAIN3_ALPHA
+144 0x0000 //RX_BWE_CUTOFF
+145 0x0000 //RX_BWE_GAINFILL
+146 0x0000 //RX_BWE_MAXTH_TONE
+147 0x0000 //RX_BWE_EQ_0
+148 0x0000 //RX_BWE_EQ_1
+149 0x0000 //RX_BWE_EQ_2
+150 0x0000 //RX_BWE_EQ_3
+151 0x0000 //RX_BWE_EQ_4
+152 0x0000 //RX_BWE_EQ_5
+153 0x0000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x2040 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0000 //RX_SAMPLINGFREQ_SIG
+160 0x0000 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x050D //RX_PGA
+168 0x7652 //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0000 //RX_PITCH_BFR_LEN
+174 0x0000 //RX_SBD_PITCH_DET
+175 0x0000 //RX_PP_RESRV_0
+176 0x0000 //RX_PP_RESRV_1
+177 0xF800 //RX_N_SN_EST
+178 0x0000 //RX_N2_SN_EST
+179 0x000F //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7E00 //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0000 //RX_FENS_RESRV_1
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+187 0x0000 //RX_EXTRA_NS_L
+188 0x0000 //RX_EXTRA_NS_A
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x0000 //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0003 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x0080 //RX_MIN_G_FP
+285 0x2000 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0010 //RX_MAXLEVEL_CNG
+289 0x0000 //RX_BWE_UV_TH
+290 0x0000 //RX_BWE_UV_TH2
+291 0x0000 //RX_BWE_UV_TH3
+292 0x0000 //RX_BWE_V_TH
+293 0x0000 //RX_BWE_GAIN1_V_TH1
+294 0x0000 //RX_BWE_GAIN1_V_TH2
+295 0x0000 //RX_BWE_UV_EQ
+296 0x0000 //RX_BWE_V_EQ
+297 0x0000 //RX_BWE_TONE_TH
+298 0x0000 //RX_BWE_UV_HOLD_T
+299 0x0000 //RX_BWE_GAIN2_ALPHA
+300 0x0000 //RX_BWE_GAIN3_ALPHA
+301 0x0000 //RX_BWE_CUTOFF
+302 0x0000 //RX_BWE_GAINFILL
+303 0x0000 //RX_BWE_MAXTH_TONE
+304 0x0000 //RX_BWE_EQ_0
+305 0x0000 //RX_BWE_EQ_1
+306 0x0000 //RX_BWE_EQ_2
+307 0x0000 //RX_BWE_EQ_3
+308 0x0000 //RX_BWE_EQ_4
+309 0x0000 //RX_BWE_EQ_5
+310 0x0000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0000 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0078 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0302 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0000 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0000 //TX_MICS_OF_PAIR0
+38 0x0000 //TX_MICS_OF_PAIR1
+39 0x0000 //TX_MICS_OF_PAIR2
+40 0x0000 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0003 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x0000 //TX_HD_BIN_MASK
+53 0x0000 //TX_HD_SUBAND_MASK
+54 0x0000 //TX_HD_FRAME_AVG_MASK
+55 0x0000 //TX_HD_MIN_FRQ
+56 0x0000 //TX_HD_ALPHA_PSD
+57 0x0000 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0x0000 //TX_T_PSDVAT
+63 0x0000 //TX_CNT
+64 0x0000 //TX_ANTI_HOWL_GAIN
+65 0x0000 //TX_MICFORBFMARK_0
+66 0x0000 //TX_MICFORBFMARK_1
+67 0x0000 //TX_MICFORBFMARK_2
+68 0x0000 //TX_MICFORBFMARK_3
+69 0x0000 //TX_MICFORBFMARK_4
+70 0x0000 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x0000 //TX_ADCS_GAIN
+112 0x0000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x7FFF //TX_BLMIC_BLKFACTOR
+116 0x7FFF //TX_BRMIC_BLKFACTOR
+117 0x000A //TX_MICBLK_START_BIN
+118 0x0041 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0020 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7800 //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6000 //TX_THR_PITCH_DET_2
+133 0x0000 //TX_PITCH_BFR_LEN
+134 0x0000 //TX_SBD_PITCH_DET
+135 0x0000 //TX_TD_AEC_L
+136 0x0000 //TX_MU0_UNP_TD_AEC
+137 0x0000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x2000 //TX_AEC_REF_GAIN_0
+148 0x2000 //TX_AEC_REF_GAIN_1
+149 0x2000 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x0200 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0100 //TX_MIN_EQ_RE_EST_3
+156 0x0100 //TX_MIN_EQ_RE_EST_4
+157 0x0100 //TX_MIN_EQ_RE_EST_5
+158 0x0100 //TX_MIN_EQ_RE_EST_6
+159 0x0100 //TX_MIN_EQ_RE_EST_7
+160 0x0100 //TX_MIN_EQ_RE_EST_8
+161 0x0100 //TX_MIN_EQ_RE_EST_9
+162 0x0100 //TX_MIN_EQ_RE_EST_10
+163 0x0100 //TX_MIN_EQ_RE_EST_11
+164 0x0100 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0008 //TX_SE_HOLD_N
+170 0x0050 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x0000 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x0000 //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0000 //TX_FRQ_LIN_LEN
+184 0x0000 //TX_FRQ_AEC_LEN_RHO
+185 0x0000 //TX_MU0_UNP_FRQ_AEC
+186 0x0000 //TX_MU0_PTD_FRQ_AEC
+187 0x0000 //TX_MINENOISETH
+188 0x0000 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x0000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7333 //TX_DTD_THR1_0
+198 0x7333 //TX_DTD_THR1_1
+199 0x7333 //TX_DTD_THR1_2
+200 0x7333 //TX_DTD_THR1_3
+201 0x7333 //TX_DTD_THR1_4
+202 0x7333 //TX_DTD_THR1_5
+203 0x7333 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0400 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x0000 //TX_COMFORT_G
+216 0x0000 //TX_POWER_YOUT_TH
+217 0x0000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x0800 //TX_B_POST_FILT_ECHO_H
+230 0x0000 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0000 //TX_DT_RESRV_7
+240 0x0000 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF800 //TX_THR_SN_EST_2
+245 0xF600 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0A00 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0000 //TX_INBEAMHOLDT
+269 0x1FFF //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x001A //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x000C //TX_NS_LVL_CTRL_3
+285 0x000C //TX_NS_LVL_CTRL_4
+286 0x000C //TX_NS_LVL_CTRL_5
+287 0x001A //TX_NS_LVL_CTRL_6
+288 0x000C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0014 //TX_MIN_GAIN_S_1
+291 0x0014 //TX_MIN_GAIN_S_2
+292 0x0014 //TX_MIN_GAIN_S_3
+293 0x0014 //TX_MIN_GAIN_S_4
+294 0x0014 //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0064 //TX_NS_MAX_PRI_SNR_TH
+299 0x7FFF //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x1200 //TX_THR_LFNS
+309 0x0147 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x7FFF //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x7FFF //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x1000 //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x6666 //TX_A_POST_FILT_S_3
+318 0x6666 //TX_A_POST_FILT_S_4
+319 0x6666 //TX_A_POST_FILT_S_5
+320 0x199A //TX_A_POST_FILT_S_6
+321 0x6666 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7E00 //TX_LAMBDA_PFILT_S_0
+340 0x7E00 //TX_LAMBDA_PFILT_S_1
+341 0x7E00 //TX_LAMBDA_PFILT_S_2
+342 0x7E00 //TX_LAMBDA_PFILT_S_3
+343 0x7E00 //TX_LAMBDA_PFILT_S_4
+344 0x7E00 //TX_LAMBDA_PFILT_S_5
+345 0x7E00 //TX_LAMBDA_PFILT_S_6
+346 0x7E00 //TX_LAMBDA_PFILT_S_7
+347 0x0010 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0001 //TX_BF_SGRAD_FLG
+362 0x0000 //TX_BF_DVG_TH
+363 0x0000 //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x05A0 //TX_NDETCT
+367 0x04E8 //TX_NOISE_TH_0
+368 0x1388 //TX_NOISE_TH_0_2
+369 0x3A98 //TX_NOISE_TH_0_3
+370 0x0C80 //TX_NOISE_TH_1
+371 0x0032 //TX_NOISE_TH_2
+372 0x3D54 //TX_NOISE_TH_3
+373 0x012C //TX_NOISE_TH_4
+374 0x07D0 //TX_NOISE_TH_5
+375 0x6590 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00C8 //TX_NOISE_TH_6
+379 0x02BC //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x1482 //TX_DT_CUT_K1
+384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
+385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x6400 //TX_OUT_ENER_S_TH_NOISY
+387 0x6400 //TX_OUT_ENER_TH_NOISE
+388 0x7D00 //TX_OUT_ENER_TH_SPEECH
+389 0x0000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0000 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0000 //TX_MIN_G_LOW300HZ
+401 0x0010 //TX_MAXLEVEL_CNG
+402 0x0000 //TX_STN_NOISE_TH
+403 0x0000 //TX_POST_MASK_SUP
+404 0x0000 //TX_POST_MASK_ADJUST
+405 0x0014 //TX_NS_ENOISE_MIC0_TH
+406 0x04E7 //TX_MINENOISE_MIC0_TH
+407 0x0226 //TX_MINENOISE_MIC0_S_TH
+408 0x2879 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0080 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x2000 //TX_RHO_UPB
+415 0x0020 //TX_N_HOLD_HS
+416 0x0009 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0000 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x0219 //TX_THR_STD_PLH
+421 0x09C4 //TX_N_HOLD_STD
+422 0x0166 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x0000 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x1000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0000 //TX_HS_VAD_BIN
+435 0x0000 //TX_THR_VAD_HS
+436 0x0000 //TX_MEAN_RTO_MIN_TH2
+437 0x0000 //TX_SILENCE_T
+438 0x4000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x099A //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x001E //TX_DOA_VAD_THR_1
+445 0x001E //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x005A //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x005A //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x005A //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0172 //TX_BF_HOLDOFF_T
+473 0x8000 //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x071C //TX_DOA_TRACK_HT
+477 0x0280 //TX_N1_HOLD_HF
+478 0x0140 //TX_N2_HOLD_HF
+479 0x2AAB //TX_BF_RESET_THR_HF
+480 0x4000 //TX_DOA_SMOOTH
+481 0x0000 //TX_MU_BF
+482 0x0200 //TX_BF_MU_LF_B2
+483 0x0000 //TX_BF_FC_END_BIN_B2
+484 0x0000 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0000 //TX_N_DOA_SEED
+488 0x0000 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x0000 //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x0000 //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x0000 //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0168 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0004 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0230 //TX_NOR_OFF_TH1
+503 0xD333 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x6666 //TX_MICTOBFGAIN0
+513 0x0014 //TX_FASTMUE_TH
+514 0xC000 //TX_DEREVERB_LF_MU
+515 0xC000 //TX_DEREVERB_HF_MU
+516 0xCCCC //TX_DEREVERB_DELAY
+517 0xD999 //TX_DEREVERB_COEF_LEN
+518 0x1F40 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x7000 //TX_GSC_RTOH_TH
+523 0x0064 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0028 //TX_SNR_THR
+531 0x03E8 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x0000 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x000A //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0000 //TX_BVE_NOISE_FLOOR_1
+554 0x0000 //TX_BVE_NOISE_FLOOR_2
+555 0x0000 //TX_BVE_NOISE_FLOOR_3
+556 0x0000 //TX_BVE_NOISE_FLOOR_4
+557 0x0000 //TX_BVE_NOISE_FLOOR_5
+558 0x0000 //TX_BVE_NOISE_FLOOR_6
+559 0x0000 //TX_BVE_NOISE_FLOOR_7
+560 0x0000 //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x2040 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x050D //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0000 //RX_PITCH_BFR_LEN
+17 0x0000 //RX_SBD_PITCH_DET
+18 0x0000 //RX_PP_RESRV_0
+19 0x0000 //RX_PP_RESRV_1
+20 0xF800 //RX_N_SN_EST
+21 0x0000 //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0000 //RX_FENS_RESRV_1
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+30 0x0000 //RX_EXTRA_NS_L
+31 0x0000 //RX_EXTRA_NS_A
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x0000 //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x0080 //RX_MIN_G_FP
+128 0x2000 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0010 //RX_MAXLEVEL_CNG
+132 0x0000 //RX_BWE_UV_TH
+133 0x0000 //RX_BWE_UV_TH2
+134 0x0000 //RX_BWE_UV_TH3
+135 0x0000 //RX_BWE_V_TH
+136 0x0000 //RX_BWE_GAIN1_V_TH1
+137 0x0000 //RX_BWE_GAIN1_V_TH2
+138 0x0000 //RX_BWE_UV_EQ
+139 0x0000 //RX_BWE_V_EQ
+140 0x0000 //RX_BWE_TONE_TH
+141 0x0000 //RX_BWE_UV_HOLD_T
+142 0x0000 //RX_BWE_GAIN2_ALPHA
+143 0x0000 //RX_BWE_GAIN3_ALPHA
+144 0x0000 //RX_BWE_CUTOFF
+145 0x0000 //RX_BWE_GAINFILL
+146 0x0000 //RX_BWE_MAXTH_TONE
+147 0x0000 //RX_BWE_EQ_0
+148 0x0000 //RX_BWE_EQ_1
+149 0x0000 //RX_BWE_EQ_2
+150 0x0000 //RX_BWE_EQ_3
+151 0x0000 //RX_BWE_EQ_4
+152 0x0000 //RX_BWE_EQ_5
+153 0x0000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x2040 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0000 //RX_SAMPLINGFREQ_SIG
+160 0x0000 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x050D //RX_PGA
+168 0x7652 //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0000 //RX_PITCH_BFR_LEN
+174 0x0000 //RX_SBD_PITCH_DET
+175 0x0000 //RX_PP_RESRV_0
+176 0x0000 //RX_PP_RESRV_1
+177 0xF800 //RX_N_SN_EST
+178 0x0000 //RX_N2_SN_EST
+179 0x000F //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7E00 //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0000 //RX_FENS_RESRV_1
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+187 0x0000 //RX_EXTRA_NS_L
+188 0x0000 //RX_EXTRA_NS_A
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x0000 //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0003 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x0080 //RX_MIN_G_FP
+285 0x2000 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0010 //RX_MAXLEVEL_CNG
+289 0x0000 //RX_BWE_UV_TH
+290 0x0000 //RX_BWE_UV_TH2
+291 0x0000 //RX_BWE_UV_TH3
+292 0x0000 //RX_BWE_V_TH
+293 0x0000 //RX_BWE_GAIN1_V_TH1
+294 0x0000 //RX_BWE_GAIN1_V_TH2
+295 0x0000 //RX_BWE_UV_EQ
+296 0x0000 //RX_BWE_V_EQ
+297 0x0000 //RX_BWE_TONE_TH
+298 0x0000 //RX_BWE_UV_HOLD_T
+299 0x0000 //RX_BWE_GAIN2_ALPHA
+300 0x0000 //RX_BWE_GAIN3_ALPHA
+301 0x0000 //RX_BWE_CUTOFF
+302 0x0000 //RX_BWE_GAINFILL
+303 0x0000 //RX_BWE_MAXTH_TONE
+304 0x0000 //RX_BWE_EQ_0
+305 0x0000 //RX_BWE_EQ_1
+306 0x0000 //RX_BWE_EQ_2
+307 0x0000 //RX_BWE_EQ_3
+308 0x0000 //RX_BWE_EQ_4
+309 0x0000 //RX_BWE_EQ_5
+310 0x0000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+190 0xDA9E //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x0E80 //RX_TDDRC_THRD_2
+272 0x3800 //RX_TDDRC_THRD_3
+273 0x2A00 //RX_TDDRC_SLANT_0
+274 0x6E00 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x0000 //RX_TDDRC_HMNC_GAIN
+279 0x0000 //RX_TDDRC_SMT_FLAG
+280 0x0000 //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0000 //RX_FDEQ_BIN_0
+221 0x0000 //RX_FDEQ_BIN_1
+222 0x0000 //RX_FDEQ_BIN_2
+223 0x0000 //RX_FDEQ_BIN_3
+224 0x0000 //RX_FDEQ_BIN_4
+225 0x0000 //RX_FDEQ_BIN_5
+226 0x0000 //RX_FDEQ_BIN_6
+227 0x0000 //RX_FDEQ_BIN_7
+228 0x0000 //RX_FDEQ_BIN_8
+229 0x0000 //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x0000 //RX_FDEQ_RESRV_0
+245 0x0000 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x2000 //RX_FDDRC_SLANT_1_0
+264 0x2000 //RX_FDDRC_SLANT_1_1
+265 0x2000 //RX_FDDRC_SLANT_1_2
+266 0x2000 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-USB_BLACKBIRD-RESERVE2-SWB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x6B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6D60 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7D00 //TX_DTD_THR1_0
+198 0x7D00 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xF700 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0100 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0018 //TX_NS_LVL_CTRL_2
+284 0x0012 //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x0018 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x0009 //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x5000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x3000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7000 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7F00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0383 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x2904 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x044C //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x0DAC //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x02F3 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0xC000 //TX_DEREVERB_LF_MU
+515 0xC000 //TX_DEREVERB_HF_MU
+516 0xCCCC //TX_DEREVERB_DELAY
+517 0xD999 //TX_DEREVERB_COEF_LEN
+518 0x1F40 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x7000 //TX_GSC_RTOH_TH
+523 0x0064 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4040 //TX_FDEQ_GAIN_6
+574 0x4040 //TX_FDEQ_GAIN_7
+575 0x4040 //TX_FDEQ_GAIN_8
+576 0x3838 //TX_FDEQ_GAIN_9
+577 0x3838 //TX_FDEQ_GAIN_10
+578 0x3828 //TX_FDEQ_GAIN_11
+579 0x2828 //TX_FDEQ_GAIN_12
+580 0x2828 //TX_FDEQ_GAIN_13
+581 0x1C1C //TX_FDEQ_GAIN_14
+582 0x1C1C //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x284A //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0020 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x042C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4E52 //RX_FDEQ_GAIN_0
+40 0x5252 //RX_FDEQ_GAIN_1
+41 0x5252 //RX_FDEQ_GAIN_2
+42 0x5250 //RX_FDEQ_GAIN_3
+43 0x4C46 //RX_FDEQ_GAIN_4
+44 0x4748 //RX_FDEQ_GAIN_5
+45 0x5768 //RX_FDEQ_GAIN_6
+46 0x6162 //RX_FDEQ_GAIN_7
+47 0x5252 //RX_FDEQ_GAIN_8
+48 0x5256 //RX_FDEQ_GAIN_9
+49 0x5248 //RX_FDEQ_GAIN_10
+50 0x3434 //RX_FDEQ_GAIN_11
+51 0x3436 //RX_FDEQ_GAIN_12
+52 0x2A18 //RX_FDEQ_GAIN_13
+53 0x1830 //RX_FDEQ_GAIN_14
+54 0x3648 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x023E //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x280A //RX_TPKA_FP
+127 0x032D //RX_MIN_G_FP
+128 0x0A00 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000A //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0011 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x001C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x002F //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x004F //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0086 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7220 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0214 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x6270 //RX_FDEQ_GAIN_0
+40 0x7A70 //RX_FDEQ_GAIN_1
+41 0x7270 //RX_FDEQ_GAIN_2
+42 0x6A70 //RX_FDEQ_GAIN_3
+43 0x645A //RX_FDEQ_GAIN_4
+44 0x5A5E //RX_FDEQ_GAIN_5
+45 0x6E72 //RX_FDEQ_GAIN_6
+46 0x7268 //RX_FDEQ_GAIN_7
+47 0x665A //RX_FDEQ_GAIN_8
+48 0x5A5A //RX_FDEQ_GAIN_9
+49 0x5A64 //RX_FDEQ_GAIN_10
+50 0x6448 //RX_FDEQ_GAIN_11
+51 0x4949 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x284A //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x042C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4E52 //RX_FDEQ_GAIN_0
+197 0x5252 //RX_FDEQ_GAIN_1
+198 0x5252 //RX_FDEQ_GAIN_2
+199 0x5250 //RX_FDEQ_GAIN_3
+200 0x4C46 //RX_FDEQ_GAIN_4
+201 0x4748 //RX_FDEQ_GAIN_5
+202 0x5768 //RX_FDEQ_GAIN_6
+203 0x6162 //RX_FDEQ_GAIN_7
+204 0x5252 //RX_FDEQ_GAIN_8
+205 0x5256 //RX_FDEQ_GAIN_9
+206 0x5248 //RX_FDEQ_GAIN_10
+207 0x3434 //RX_FDEQ_GAIN_11
+208 0x3436 //RX_FDEQ_GAIN_12
+209 0x2A18 //RX_FDEQ_GAIN_13
+210 0x1830 //RX_FDEQ_GAIN_14
+211 0x3648 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0002 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x023E //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x280A //RX_TPKA_FP
+284 0x032D //RX_MIN_G_FP
+285 0x0A00 //RX_MAX_G_FP
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x000A //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0011 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x001C //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x002F //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x004F //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0086 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7220 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1800 //RX_TDDRC_THRD_2
+272 0x1800 //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0214 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x6270 //RX_FDEQ_GAIN_0
+197 0x7A70 //RX_FDEQ_GAIN_1
+198 0x7270 //RX_FDEQ_GAIN_2
+199 0x6A70 //RX_FDEQ_GAIN_3
+200 0x645A //RX_FDEQ_GAIN_4
+201 0x5A5E //RX_FDEQ_GAIN_5
+202 0x6E72 //RX_FDEQ_GAIN_6
+203 0x7268 //RX_FDEQ_GAIN_7
+204 0x665A //RX_FDEQ_GAIN_8
+205 0x5A5A //RX_FDEQ_GAIN_9
+206 0x5A64 //RX_FDEQ_GAIN_10
+207 0x6448 //RX_FDEQ_GAIN_11
+208 0x4949 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x284A //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR-RESERVE2-SWB
+#PARAM_MODE Full
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0383 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x044C //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x0DAC //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x02F3 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0xC000 //TX_DEREVERB_LF_MU
+515 0xC000 //TX_DEREVERB_HF_MU
+516 0xCCCC //TX_DEREVERB_DELAY
+517 0xD999 //TX_DEREVERB_COEF_LEN
+518 0x1F40 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x7000 //TX_GSC_RTOH_TH
+523 0x0064 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x002C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0013 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0020 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0036 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x002C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0002 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0013 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0020 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0036 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x005B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0099 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-RESERVE1-RESERVE2-SWB
+#PARAM_MODE Simple
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0383 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x044C //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x0DAC //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x02F3 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0xC000 //TX_DEREVERB_LF_MU
+515 0xC000 //TX_DEREVERB_HF_MU
+516 0xCCCC //TX_DEREVERB_DELAY
+517 0xD999 //TX_DEREVERB_COEF_LEN
+518 0x1F40 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x7000 //TX_GSC_RTOH_TH
+523 0x0064 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x002C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0013 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0020 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0036 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x002C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0002 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0013 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0020 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0036 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x005B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0099 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-RESERVE2-SWB
+#PARAM_MODE Simple
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009C //TX_DIST2REF1
+22 0x0019 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0002 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0CAE //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0400 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x2000 //TX_MIN_EQ_RE_EST_0
+153 0x0600 //TX_MIN_EQ_RE_EST_1
+154 0x3000 //TX_MIN_EQ_RE_EST_2
+155 0x3000 //TX_MIN_EQ_RE_EST_3
+156 0x3000 //TX_MIN_EQ_RE_EST_4
+157 0x3000 //TX_MIN_EQ_RE_EST_5
+158 0x3000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x7800 //TX_MIN_EQ_RE_EST_8
+161 0x7800 //TX_MIN_EQ_RE_EST_9
+162 0x7800 //TX_MIN_EQ_RE_EST_10
+163 0x7800 //TX_MIN_EQ_RE_EST_11
+164 0x7800 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x3000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0260 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x0680 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7B0C //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x36B0 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x01F4 //TX_RATIO_DT_L_TH_HIGH
+226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+227 0x0001 //TX_RATIO_DT_L0_TH
+228 0x7FFF //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x00C8 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0000 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0100 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0024 //TX_NS_LVL_CTRL_2
+284 0x001A //TX_NS_LVL_CTRL_3
+285 0x0014 //TX_NS_LVL_CTRL_4
+286 0x0011 //TX_NS_LVL_CTRL_5
+287 0x001A //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x0020 //TX_MIN_GAIN_S_0
+290 0x0020 //TX_MIN_GAIN_S_1
+291 0x0020 //TX_MIN_GAIN_S_2
+292 0x0020 //TX_MIN_GAIN_S_3
+293 0x0020 //TX_MIN_GAIN_S_4
+294 0x0020 //TX_MIN_GAIN_S_5
+295 0x0020 //TX_MIN_GAIN_S_6
+296 0x0020 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x7FFF //TX_A_POST_FILT_S_0
+315 0x7FFF //TX_A_POST_FILT_S_1
+316 0x7FFF //TX_A_POST_FILT_S_2
+317 0x7FFF //TX_A_POST_FILT_S_3
+318 0x7FFF //TX_A_POST_FILT_S_4
+319 0x7FFF //TX_A_POST_FILT_S_5
+320 0x7FFF //TX_A_POST_FILT_S_6
+321 0x7FFF //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x6000 //TX_B_POST_FILT_1
+324 0x6000 //TX_B_POST_FILT_2
+325 0x6000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7F00 //TX_LAMBDA_PFILT
+339 0x7F00 //TX_LAMBDA_PFILT_S_0
+340 0x7F00 //TX_LAMBDA_PFILT_S_1
+341 0x7F00 //TX_LAMBDA_PFILT_S_2
+342 0x7F00 //TX_LAMBDA_PFILT_S_3
+343 0x7F00 //TX_LAMBDA_PFILT_S_4
+344 0x7F00 //TX_LAMBDA_PFILT_S_5
+345 0x7F00 //TX_LAMBDA_PFILT_S_6
+346 0x7F00 //TX_LAMBDA_PFILT_S_7
+347 0x3E80 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0040 //TX_DT_BINVAD_TH_0
+354 0x0040 //TX_DT_BINVAD_TH_1
+355 0x0100 //TX_DT_BINVAD_TH_2
+356 0x2000 //TX_DT_BINVAD_TH_3
+357 0x36B0 //TX_DT_BINVAD_ENDF
+358 0x0200 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x01F4 //TX_NOISE_TH_2
+372 0x36B0 //TX_NOISE_TH_3
+373 0x2710 //TX_NOISE_TH_4
+374 0x2CEC //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0DAC //TX_NOISE_TH_6
+379 0x0050 //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x07D0 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0005 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0050 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4000 //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x3000 //TX_DEREVERB_LF_MU
+515 0x34CD //TX_DEREVERB_HF_MU
+516 0x0007 //TX_DEREVERB_DELAY
+517 0x0004 //TX_DEREVERB_COEF_LEN
+518 0x0003 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x3A98 //TX_GSC_RTOL_TH
+522 0x3A98 //TX_GSC_RTOH_TH
+523 0x7E2C //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4850 //TX_FDEQ_GAIN_2
+570 0x5050 //TX_FDEQ_GAIN_3
+571 0x4B48 //TX_FDEQ_GAIN_4
+572 0x484E //TX_FDEQ_GAIN_5
+573 0x4E5C //TX_FDEQ_GAIN_6
+574 0x564E //TX_FDEQ_GAIN_7
+575 0x4C4E //TX_FDEQ_GAIN_8
+576 0x4E45 //TX_FDEQ_GAIN_9
+577 0x494A //TX_FDEQ_GAIN_10
+578 0x534D //TX_FDEQ_GAIN_11
+579 0x5C54 //TX_FDEQ_GAIN_12
+580 0x5466 //TX_FDEQ_GAIN_13
+581 0x5C70 //TX_FDEQ_GAIN_14
+582 0x7C84 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0202 //TX_PREEQ_BIN_MIC0_0
+642 0x0203 //TX_PREEQ_BIN_MIC0_1
+643 0x0303 //TX_PREEQ_BIN_MIC0_2
+644 0x0304 //TX_PREEQ_BIN_MIC0_3
+645 0x0405 //TX_PREEQ_BIN_MIC0_4
+646 0x0506 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0809 //TX_PREEQ_BIN_MIC0_7
+649 0x0A0A //TX_PREEQ_BIN_MIC0_8
+650 0x0C10 //TX_PREEQ_BIN_MIC0_9
+651 0x1013 //TX_PREEQ_BIN_MIC0_10
+652 0x1414 //TX_PREEQ_BIN_MIC0_11
+653 0x261E //TX_PREEQ_BIN_MIC0_12
+654 0x1E14 //TX_PREEQ_BIN_MIC0_13
+655 0x1414 //TX_PREEQ_BIN_MIC0_14
+656 0x2814 //TX_PREEQ_BIN_MIC0_15
+657 0x401E //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4849 //TX_PREEQ_GAIN_MIC1_7
+674 0x4A4A //TX_PREEQ_GAIN_MIC1_8
+675 0x4B4D //TX_PREEQ_GAIN_MIC1_9
+676 0x4E4F //TX_PREEQ_GAIN_MIC1_10
+677 0x5052 //TX_PREEQ_GAIN_MIC1_11
+678 0x5354 //TX_PREEQ_GAIN_MIC1_12
+679 0x5454 //TX_PREEQ_GAIN_MIC1_13
+680 0x5653 //TX_PREEQ_GAIN_MIC1_14
+681 0x4C48 //TX_PREEQ_GAIN_MIC1_15
+682 0x4444 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0202 //TX_PREEQ_BIN_MIC1_0
+691 0x0203 //TX_PREEQ_BIN_MIC1_1
+692 0x0303 //TX_PREEQ_BIN_MIC1_2
+693 0x0304 //TX_PREEQ_BIN_MIC1_3
+694 0x0405 //TX_PREEQ_BIN_MIC1_4
+695 0x0506 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0809 //TX_PREEQ_BIN_MIC1_7
+698 0x0A0A //TX_PREEQ_BIN_MIC1_8
+699 0x0C10 //TX_PREEQ_BIN_MIC1_9
+700 0x1013 //TX_PREEQ_BIN_MIC1_10
+701 0x1414 //TX_PREEQ_BIN_MIC1_11
+702 0x261E //TX_PREEQ_BIN_MIC1_12
+703 0x1E14 //TX_PREEQ_BIN_MIC1_13
+704 0x1414 //TX_PREEQ_BIN_MIC1_14
+705 0x2814 //TX_PREEQ_BIN_MIC1_15
+706 0x401E //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x494B //TX_PREEQ_GAIN_MIC2_6
+722 0x4C4D //TX_PREEQ_GAIN_MIC2_7
+723 0x4E4F //TX_PREEQ_GAIN_MIC2_8
+724 0x5051 //TX_PREEQ_GAIN_MIC2_9
+725 0x5255 //TX_PREEQ_GAIN_MIC2_10
+726 0x5754 //TX_PREEQ_GAIN_MIC2_11
+727 0x5454 //TX_PREEQ_GAIN_MIC2_12
+728 0x544F //TX_PREEQ_GAIN_MIC2_13
+729 0x463D //TX_PREEQ_GAIN_MIC2_14
+730 0x4A48 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0203 //TX_PREEQ_BIN_MIC2_0
+740 0x0303 //TX_PREEQ_BIN_MIC2_1
+741 0x0304 //TX_PREEQ_BIN_MIC2_2
+742 0x0405 //TX_PREEQ_BIN_MIC2_3
+743 0x0506 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0809 //TX_PREEQ_BIN_MIC2_6
+746 0x0A0A //TX_PREEQ_BIN_MIC2_7
+747 0x0C10 //TX_PREEQ_BIN_MIC2_8
+748 0x1013 //TX_PREEQ_BIN_MIC2_9
+749 0x1414 //TX_PREEQ_BIN_MIC2_10
+750 0x261E //TX_PREEQ_BIN_MIC2_11
+751 0x1E14 //TX_PREEQ_BIN_MIC2_12
+752 0x1414 //TX_PREEQ_BIN_MIC2_13
+753 0x2814 //TX_PREEQ_BIN_MIC2_14
+754 0x4022 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x0000 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0003 //TX_TDDRC_THRD_0
+855 0x0004 //TX_TDDRC_THRD_1
+856 0x1000 //TX_TDDRC_THRD_2
+857 0x1000 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0E21 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE0C0 //TX_AMS_RESRV_02
+945 0x0FA0 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x002C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0013 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0020 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0036 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x002C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0002 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x000B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0013 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0020 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0036 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x005B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0099 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-RESERVE2-SWB
+#PARAM_MODE Simple
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0383 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x044C //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x0DAC //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x02F3 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0xC000 //TX_DEREVERB_LF_MU
+515 0xC000 //TX_DEREVERB_HF_MU
+516 0xCCCC //TX_DEREVERB_DELAY
+517 0xD999 //TX_DEREVERB_COEF_LEN
+518 0x1F40 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x7000 //TX_GSC_RTOH_TH
+523 0x0064 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x0024 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0003 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0002 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x000C //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x000C //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0014 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0021 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0037 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x005B //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0099 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x5000 //RX_TDDRC_ALPHA_UP_1
+164 0x5000 //RX_TDDRC_ALPHA_UP_2
+165 0x5000 //RX_TDDRC_ALPHA_UP_3
+166 0x2000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x65AD //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x3000 //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x5000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x01C8 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_HCO-RESERVE2-SWB
+#PARAM_MODE Simple
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0000 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0078 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0302 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0000 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0000 //TX_MICS_OF_PAIR0
+38 0x0000 //TX_MICS_OF_PAIR1
+39 0x0000 //TX_MICS_OF_PAIR2
+40 0x0000 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0003 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x0000 //TX_HD_BIN_MASK
+53 0x0000 //TX_HD_SUBAND_MASK
+54 0x0000 //TX_HD_FRAME_AVG_MASK
+55 0x0000 //TX_HD_MIN_FRQ
+56 0x0000 //TX_HD_ALPHA_PSD
+57 0x0000 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0x0000 //TX_T_PSDVAT
+63 0x0000 //TX_CNT
+64 0x0000 //TX_ANTI_HOWL_GAIN
+65 0x0000 //TX_MICFORBFMARK_0
+66 0x0000 //TX_MICFORBFMARK_1
+67 0x0000 //TX_MICFORBFMARK_2
+68 0x0000 //TX_MICFORBFMARK_3
+69 0x0000 //TX_MICFORBFMARK_4
+70 0x0000 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x0000 //TX_ADCS_GAIN
+112 0x0000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x7FFF //TX_BLMIC_BLKFACTOR
+116 0x7FFF //TX_BRMIC_BLKFACTOR
+117 0x000A //TX_MICBLK_START_BIN
+118 0x0041 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0020 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7800 //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6000 //TX_THR_PITCH_DET_2
+133 0x0000 //TX_PITCH_BFR_LEN
+134 0x0000 //TX_SBD_PITCH_DET
+135 0x0000 //TX_TD_AEC_L
+136 0x0000 //TX_MU0_UNP_TD_AEC
+137 0x0000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x2000 //TX_AEC_REF_GAIN_0
+148 0x2000 //TX_AEC_REF_GAIN_1
+149 0x2000 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x0200 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0100 //TX_MIN_EQ_RE_EST_3
+156 0x0100 //TX_MIN_EQ_RE_EST_4
+157 0x0100 //TX_MIN_EQ_RE_EST_5
+158 0x0100 //TX_MIN_EQ_RE_EST_6
+159 0x0100 //TX_MIN_EQ_RE_EST_7
+160 0x0100 //TX_MIN_EQ_RE_EST_8
+161 0x0100 //TX_MIN_EQ_RE_EST_9
+162 0x0100 //TX_MIN_EQ_RE_EST_10
+163 0x0100 //TX_MIN_EQ_RE_EST_11
+164 0x0100 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0008 //TX_SE_HOLD_N
+170 0x0050 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x0000 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x0000 //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0000 //TX_FRQ_LIN_LEN
+184 0x0000 //TX_FRQ_AEC_LEN_RHO
+185 0x0000 //TX_MU0_UNP_FRQ_AEC
+186 0x0000 //TX_MU0_PTD_FRQ_AEC
+187 0x0000 //TX_MINENOISETH
+188 0x0000 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x0000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7333 //TX_DTD_THR1_0
+198 0x7333 //TX_DTD_THR1_1
+199 0x7333 //TX_DTD_THR1_2
+200 0x7333 //TX_DTD_THR1_3
+201 0x7333 //TX_DTD_THR1_4
+202 0x7333 //TX_DTD_THR1_5
+203 0x7333 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0400 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x0000 //TX_COMFORT_G
+216 0x0000 //TX_POWER_YOUT_TH
+217 0x0000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x0800 //TX_B_POST_FILT_ECHO_H
+230 0x0000 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0000 //TX_DT_RESRV_7
+240 0x0000 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF800 //TX_THR_SN_EST_2
+245 0xF600 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0A00 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0000 //TX_INBEAMHOLDT
+269 0x1FFF //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x001A //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x000C //TX_NS_LVL_CTRL_3
+285 0x000C //TX_NS_LVL_CTRL_4
+286 0x000C //TX_NS_LVL_CTRL_5
+287 0x001A //TX_NS_LVL_CTRL_6
+288 0x000C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0014 //TX_MIN_GAIN_S_1
+291 0x0014 //TX_MIN_GAIN_S_2
+292 0x0014 //TX_MIN_GAIN_S_3
+293 0x0014 //TX_MIN_GAIN_S_4
+294 0x0014 //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0064 //TX_NS_MAX_PRI_SNR_TH
+299 0x7FFF //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x1200 //TX_THR_LFNS
+309 0x0147 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x7FFF //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x7FFF //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x1000 //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x6666 //TX_A_POST_FILT_S_3
+318 0x6666 //TX_A_POST_FILT_S_4
+319 0x6666 //TX_A_POST_FILT_S_5
+320 0x199A //TX_A_POST_FILT_S_6
+321 0x6666 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7E00 //TX_LAMBDA_PFILT_S_0
+340 0x7E00 //TX_LAMBDA_PFILT_S_1
+341 0x7E00 //TX_LAMBDA_PFILT_S_2
+342 0x7E00 //TX_LAMBDA_PFILT_S_3
+343 0x7E00 //TX_LAMBDA_PFILT_S_4
+344 0x7E00 //TX_LAMBDA_PFILT_S_5
+345 0x7E00 //TX_LAMBDA_PFILT_S_6
+346 0x7E00 //TX_LAMBDA_PFILT_S_7
+347 0x0010 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0001 //TX_BF_SGRAD_FLG
+362 0x0000 //TX_BF_DVG_TH
+363 0x0000 //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x05A0 //TX_NDETCT
+367 0x0383 //TX_NOISE_TH_0
+368 0x1388 //TX_NOISE_TH_0_2
+369 0x3A98 //TX_NOISE_TH_0_3
+370 0x0C80 //TX_NOISE_TH_1
+371 0x0032 //TX_NOISE_TH_2
+372 0x3D54 //TX_NOISE_TH_3
+373 0x012C //TX_NOISE_TH_4
+374 0x07D0 //TX_NOISE_TH_5
+375 0x6590 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00C8 //TX_NOISE_TH_6
+379 0x044C //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x0DAC //TX_DT_CUT_K1
+384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
+385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x6400 //TX_OUT_ENER_S_TH_NOISY
+387 0x6400 //TX_OUT_ENER_TH_NOISE
+388 0x7D00 //TX_OUT_ENER_TH_SPEECH
+389 0x0000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0000 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0000 //TX_MIN_G_LOW300HZ
+401 0x0010 //TX_MAXLEVEL_CNG
+402 0x0000 //TX_STN_NOISE_TH
+403 0x0000 //TX_POST_MASK_SUP
+404 0x0000 //TX_POST_MASK_ADJUST
+405 0x0014 //TX_NS_ENOISE_MIC0_TH
+406 0x02F3 //TX_MINENOISE_MIC0_TH
+407 0x0226 //TX_MINENOISE_MIC0_S_TH
+408 0x2879 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0080 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x2000 //TX_RHO_UPB
+415 0x0020 //TX_N_HOLD_HS
+416 0x0009 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0000 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x0219 //TX_THR_STD_PLH
+421 0x09C4 //TX_N_HOLD_STD
+422 0x0166 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x0000 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x1000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0000 //TX_HS_VAD_BIN
+435 0x0000 //TX_THR_VAD_HS
+436 0x0000 //TX_MEAN_RTO_MIN_TH2
+437 0x0000 //TX_SILENCE_T
+438 0x4000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x099A //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x001E //TX_DOA_VAD_THR_1
+445 0x001E //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x005A //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x005A //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x005A //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0172 //TX_BF_HOLDOFF_T
+473 0x8000 //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x071C //TX_DOA_TRACK_HT
+477 0x0280 //TX_N1_HOLD_HF
+478 0x0140 //TX_N2_HOLD_HF
+479 0x2AAB //TX_BF_RESET_THR_HF
+480 0x4000 //TX_DOA_SMOOTH
+481 0x0000 //TX_MU_BF
+482 0x0200 //TX_BF_MU_LF_B2
+483 0x0000 //TX_BF_FC_END_BIN_B2
+484 0x0000 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0000 //TX_N_DOA_SEED
+488 0x0000 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x0000 //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x0000 //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x0000 //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0168 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0004 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0230 //TX_NOR_OFF_TH1
+503 0xD333 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x6666 //TX_MICTOBFGAIN0
+513 0x0014 //TX_FASTMUE_TH
+514 0xC000 //TX_DEREVERB_LF_MU
+515 0xC000 //TX_DEREVERB_HF_MU
+516 0xCCCC //TX_DEREVERB_DELAY
+517 0xD999 //TX_DEREVERB_COEF_LEN
+518 0x1F40 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x7000 //TX_GSC_RTOH_TH
+523 0x0064 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0028 //TX_SNR_THR
+531 0x03E8 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x0000 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x000A //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0000 //TX_BVE_NOISE_FLOOR_1
+554 0x0000 //TX_BVE_NOISE_FLOOR_2
+555 0x0000 //TX_BVE_NOISE_FLOOR_3
+556 0x0000 //TX_BVE_NOISE_FLOOR_4
+557 0x0000 //TX_BVE_NOISE_FLOOR_5
+558 0x0000 //TX_BVE_NOISE_FLOOR_6
+559 0x0000 //TX_BVE_NOISE_FLOOR_7
+560 0x0000 //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x2339 //TX_SENDFUNC_REG_MICMUTE
+898 0x0021 //TX_SENDFUNC_REG_MICMUTE1
+899 0x02BC //TX_MICMUTE_RATIO_THR
+900 0x0140 //TX_MICMUTE_AMP_THR
+901 0x0004 //TX_MICMUTE_HPF_IND
+902 0x00C0 //TX_MICMUTE_LOG_EYR_TH
+903 0x0008 //TX_MICMUTE_CVG_TIME
+904 0x0008 //TX_MICMUTE_RELEASE_TIME
+905 0x01FE //TX_MIC_VOLUME_MIC0MUTE
+906 0x0020 //TX_MICMUTE_EPD_OFFSET_0
+907 0x001E //TX_MICMUTE_FRQ_AEC_L
+908 0x7999 //TX_MICMUTE_EAD_THR
+909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST
+911 0x4000 //TX_DTD_THR1_MICMUTE_0
+912 0x7000 //TX_DTD_THR1_MICMUTE_1
+913 0x7FFF //TX_DTD_THR1_MICMUTE_2
+914 0x7FFF //TX_DTD_THR1_MICMUTE_3
+915 0x6CCC //TX_DTD_THR2_MICMUTE_0
+916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x4000 //TX_MICMUTE_C_POST_FLT
+922 0x03E8 //TX_MICMUTE_DT_CUT_K
+923 0x0001 //TX_MICMUTE_DT_CUT_THR
+924 0x03E8 //TX_MICMUTE_DT_CUT_K2
+925 0x0001 //TX_MICMUTE_DT_CUT_THR2
+926 0x0064 //TX_MICMUTE_DT2_HOLD_N
+927 0x1000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0258 //TX_MICMUTE_DT_CUT_K1
+933 0x0800 //TX_MICMUTE_N2_SN_EST
+934 0xFC00 //TX_MICMUTE_THR_SN_EST_0
+935 0x001C //TX_MICMUTE_MIN_G_CTRL_0
+936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x7000 //TX_MICMUTE_B_POST_FILT_0
+938 0x2710 //TX_MIC1RUB_AMP_THR
+939 0x0010 //TX_MIC1MUTE_RATIO_THR
+940 0x0450 //TX_MIC1MUTE_AMP_THR
+941 0x0008 //TX_MIC1MUTE_CVG_TIME
+942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_AMS_RESRV_01
+944 0x0000 //TX_AMS_RESRV_02
+945 0x0000 //TX_AMS_RESRV_03
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+#RX
+0 0x047C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x000A //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x847E //RX_FDEQ_GAIN_0
+40 0x5C58 //RX_FDEQ_GAIN_1
+41 0x5E5C //RX_FDEQ_GAIN_2
+42 0x6260 //RX_FDEQ_GAIN_3
+43 0x6C64 //RX_FDEQ_GAIN_4
+44 0x6260 //RX_FDEQ_GAIN_5
+45 0x6664 //RX_FDEQ_GAIN_6
+46 0x6460 //RX_FDEQ_GAIN_7
+47 0x5E6A //RX_FDEQ_GAIN_8
+48 0x6668 //RX_FDEQ_GAIN_9
+49 0x645A //RX_FDEQ_GAIN_10
+50 0x5A5E //RX_FDEQ_GAIN_11
+51 0x6A58 //RX_FDEQ_GAIN_12
+52 0x646E //RX_FDEQ_GAIN_13
+53 0x787C //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E2D //RX_FDEQ_BIN_11
+75 0x1923 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x13E0 //RX_TPKA_FP
+127 0x0400 //RX_MIN_G_FP
+128 0x0B50 //RX_MAX_G_FP
+129 0x004B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E2D //RX_FDEQ_BIN_11
+75 0x1923 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0040 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E2D //RX_FDEQ_BIN_11
+75 0x1923 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0060 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E2D //RX_FDEQ_BIN_11
+75 0x1923 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0094 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E2D //RX_FDEQ_BIN_11
+75 0x1923 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x00E1 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x0CE0 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0152 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x847C //RX_FDEQ_GAIN_0
+40 0x5A56 //RX_FDEQ_GAIN_1
+41 0x6266 //RX_FDEQ_GAIN_2
+42 0x6E7A //RX_FDEQ_GAIN_3
+43 0x8678 //RX_FDEQ_GAIN_4
+44 0x746E //RX_FDEQ_GAIN_5
+45 0x706E //RX_FDEQ_GAIN_6
+46 0x6C64 //RX_FDEQ_GAIN_7
+47 0x5C6A //RX_FDEQ_GAIN_8
+48 0x6268 //RX_FDEQ_GAIN_9
+49 0x6462 //RX_FDEQ_GAIN_10
+50 0x646E //RX_FDEQ_GAIN_11
+51 0x6860 //RX_FDEQ_GAIN_12
+52 0x646A //RX_FDEQ_GAIN_13
+53 0x7478 //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0105 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E2D //RX_FDEQ_BIN_11
+75 0x1923 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x021E //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x5C50 //RX_FDEQ_GAIN_1
+41 0x5C5C //RX_FDEQ_GAIN_2
+42 0x6C74 //RX_FDEQ_GAIN_3
+43 0x7E78 //RX_FDEQ_GAIN_4
+44 0x7670 //RX_FDEQ_GAIN_5
+45 0x666E //RX_FDEQ_GAIN_6
+46 0x6C6C //RX_FDEQ_GAIN_7
+47 0x686A //RX_FDEQ_GAIN_8
+48 0x666A //RX_FDEQ_GAIN_9
+49 0x6668 //RX_FDEQ_GAIN_10
+50 0x6C6C //RX_FDEQ_GAIN_11
+51 0x7C68 //RX_FDEQ_GAIN_12
+52 0x7478 //RX_FDEQ_GAIN_13
+53 0x787C //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0204 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E2D //RX_FDEQ_BIN_11
+75 0x1923 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x6000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0006 //RX_TDDRC_THRD_1
+114 0x0340 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x03FC //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8474 //RX_FDEQ_GAIN_0
+40 0x5C50 //RX_FDEQ_GAIN_1
+41 0x5C5C //RX_FDEQ_GAIN_2
+42 0x6C74 //RX_FDEQ_GAIN_3
+43 0x7E78 //RX_FDEQ_GAIN_4
+44 0x7670 //RX_FDEQ_GAIN_5
+45 0x666E //RX_FDEQ_GAIN_6
+46 0x6C6C //RX_FDEQ_GAIN_7
+47 0x686A //RX_FDEQ_GAIN_8
+48 0x666A //RX_FDEQ_GAIN_9
+49 0x6668 //RX_FDEQ_GAIN_10
+50 0x6C6C //RX_FDEQ_GAIN_11
+51 0x7C68 //RX_FDEQ_GAIN_12
+52 0x7478 //RX_FDEQ_GAIN_13
+53 0x787C //RX_FDEQ_GAIN_14
+54 0x9898 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0301 //RX_FDEQ_BIN_0
+64 0x0204 //RX_FDEQ_BIN_1
+65 0x0203 //RX_FDEQ_BIN_2
+66 0x0205 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0410 //RX_FDEQ_BIN_6
+70 0x050A //RX_FDEQ_BIN_7
+71 0x0B07 //RX_FDEQ_BIN_8
+72 0x120E //RX_FDEQ_BIN_9
+73 0x100E //RX_FDEQ_BIN_10
+74 0x0E2D //RX_FDEQ_BIN_11
+75 0x1923 //RX_FDEQ_BIN_12
+76 0x151E //RX_FDEQ_BIN_13
+77 0x1E2D //RX_FDEQ_BIN_14
+78 0x2D40 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x047C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x6000 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7652 //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0010 //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7E00 //RX_LAMBDA_PFILT
+182 0x000A //RX_FENS_RESRV_0
+183 0x0190 //RX_FENS_RESRV_1
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4850 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4860 //RX_FDEQ_GAIN_8
+205 0x7468 //RX_FDEQ_GAIN_9
+206 0x6060 //RX_FDEQ_GAIN_10
+207 0x6060 //RX_FDEQ_GAIN_11
+208 0x5C54 //RX_FDEQ_GAIN_12
+209 0x5450 //RX_FDEQ_GAIN_13
+210 0x5050 //RX_FDEQ_GAIN_14
+211 0x5860 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0308 //RX_FDEQ_BIN_5
+226 0x0808 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0003 //RX_FILTINDX
+269 0x0002 //RX_TDDRC_THRD_0
+270 0x0004 //RX_TDDRC_THRD_1
+271 0x1A00 //RX_TDDRC_THRD_2
+272 0x1A00 //RX_TDDRC_THRD_3
+273 0x7EB8 //RX_TDDRC_SLANT_0
+274 0x2500 //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0550 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x13E0 //RX_TPKA_FP
+284 0x0400 //RX_MIN_G_FP
+285 0x0B50 //RX_MAX_G_FP
+286 0x0014 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x847C //RX_FDEQ_GAIN_0
+197 0x5A56 //RX_FDEQ_GAIN_1
+198 0x6266 //RX_FDEQ_GAIN_2
+199 0x6E7A //RX_FDEQ_GAIN_3
+200 0x8678 //RX_FDEQ_GAIN_4
+201 0x746E //RX_FDEQ_GAIN_5
+202 0x706E //RX_FDEQ_GAIN_6
+203 0x6C64 //RX_FDEQ_GAIN_7
+204 0x5C6A //RX_FDEQ_GAIN_8
+205 0x6268 //RX_FDEQ_GAIN_9
+206 0x6462 //RX_FDEQ_GAIN_10
+207 0x646E //RX_FDEQ_GAIN_11
+208 0x6860 //RX_FDEQ_GAIN_12
+209 0x646A //RX_FDEQ_GAIN_13
+210 0x7478 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0040 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x847C //RX_FDEQ_GAIN_0
+197 0x5A56 //RX_FDEQ_GAIN_1
+198 0x6266 //RX_FDEQ_GAIN_2
+199 0x6E7A //RX_FDEQ_GAIN_3
+200 0x8678 //RX_FDEQ_GAIN_4
+201 0x746E //RX_FDEQ_GAIN_5
+202 0x706E //RX_FDEQ_GAIN_6
+203 0x6C64 //RX_FDEQ_GAIN_7
+204 0x5C6A //RX_FDEQ_GAIN_8
+205 0x6268 //RX_FDEQ_GAIN_9
+206 0x6462 //RX_FDEQ_GAIN_10
+207 0x646E //RX_FDEQ_GAIN_11
+208 0x6860 //RX_FDEQ_GAIN_12
+209 0x646A //RX_FDEQ_GAIN_13
+210 0x7478 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0060 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x847C //RX_FDEQ_GAIN_0
+197 0x5A56 //RX_FDEQ_GAIN_1
+198 0x6266 //RX_FDEQ_GAIN_2
+199 0x6E7A //RX_FDEQ_GAIN_3
+200 0x8678 //RX_FDEQ_GAIN_4
+201 0x746E //RX_FDEQ_GAIN_5
+202 0x706E //RX_FDEQ_GAIN_6
+203 0x6C64 //RX_FDEQ_GAIN_7
+204 0x5C6A //RX_FDEQ_GAIN_8
+205 0x6268 //RX_FDEQ_GAIN_9
+206 0x6462 //RX_FDEQ_GAIN_10
+207 0x646E //RX_FDEQ_GAIN_11
+208 0x6860 //RX_FDEQ_GAIN_12
+209 0x646A //RX_FDEQ_GAIN_13
+210 0x7478 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0094 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0100 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x847C //RX_FDEQ_GAIN_0
+197 0x5A56 //RX_FDEQ_GAIN_1
+198 0x6266 //RX_FDEQ_GAIN_2
+199 0x6E7A //RX_FDEQ_GAIN_3
+200 0x8678 //RX_FDEQ_GAIN_4
+201 0x746E //RX_FDEQ_GAIN_5
+202 0x706E //RX_FDEQ_GAIN_6
+203 0x6C64 //RX_FDEQ_GAIN_7
+204 0x5C6A //RX_FDEQ_GAIN_8
+205 0x6268 //RX_FDEQ_GAIN_9
+206 0x6462 //RX_FDEQ_GAIN_10
+207 0x646E //RX_FDEQ_GAIN_11
+208 0x6860 //RX_FDEQ_GAIN_12
+209 0x646A //RX_FDEQ_GAIN_13
+210 0x7478 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x00E1 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0002 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x0CE0 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0152 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x847C //RX_FDEQ_GAIN_0
+197 0x5A56 //RX_FDEQ_GAIN_1
+198 0x6266 //RX_FDEQ_GAIN_2
+199 0x6E7A //RX_FDEQ_GAIN_3
+200 0x8678 //RX_FDEQ_GAIN_4
+201 0x746E //RX_FDEQ_GAIN_5
+202 0x706E //RX_FDEQ_GAIN_6
+203 0x6C64 //RX_FDEQ_GAIN_7
+204 0x5C6A //RX_FDEQ_GAIN_8
+205 0x6268 //RX_FDEQ_GAIN_9
+206 0x6462 //RX_FDEQ_GAIN_10
+207 0x646E //RX_FDEQ_GAIN_11
+208 0x6860 //RX_FDEQ_GAIN_12
+209 0x646A //RX_FDEQ_GAIN_13
+210 0x7478 //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0105 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0004 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x021E //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x8474 //RX_FDEQ_GAIN_0
+197 0x5C50 //RX_FDEQ_GAIN_1
+198 0x5C5C //RX_FDEQ_GAIN_2
+199 0x6C74 //RX_FDEQ_GAIN_3
+200 0x7E78 //RX_FDEQ_GAIN_4
+201 0x7670 //RX_FDEQ_GAIN_5
+202 0x666E //RX_FDEQ_GAIN_6
+203 0x6C6C //RX_FDEQ_GAIN_7
+204 0x686A //RX_FDEQ_GAIN_8
+205 0x666A //RX_FDEQ_GAIN_9
+206 0x6668 //RX_FDEQ_GAIN_10
+207 0x6C6C //RX_FDEQ_GAIN_11
+208 0x7C68 //RX_FDEQ_GAIN_12
+209 0x7478 //RX_FDEQ_GAIN_13
+210 0x787C //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0204 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x6000 //RX_TDDRC_ALPHA_UP_1
+164 0x7EB8 //RX_TDDRC_ALPHA_UP_2
+165 0x6000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x6000 //RX_TDDRC_ALPHA_DWN_3
+189 0x4000 //RX_TDDRC_ALPHA_DWN_4
+190 0x7214 //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0002 //RX_TDDRC_THRD_0
+270 0x0006 //RX_TDDRC_THRD_1
+271 0x0340 //RX_TDDRC_THRD_2
+272 0x1C00 //RX_TDDRC_THRD_3
+273 0x0000 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x6000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x03FC //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x8474 //RX_FDEQ_GAIN_0
+197 0x5C50 //RX_FDEQ_GAIN_1
+198 0x5C5C //RX_FDEQ_GAIN_2
+199 0x6C74 //RX_FDEQ_GAIN_3
+200 0x7E78 //RX_FDEQ_GAIN_4
+201 0x7670 //RX_FDEQ_GAIN_5
+202 0x666E //RX_FDEQ_GAIN_6
+203 0x6C6C //RX_FDEQ_GAIN_7
+204 0x686A //RX_FDEQ_GAIN_8
+205 0x666A //RX_FDEQ_GAIN_9
+206 0x6668 //RX_FDEQ_GAIN_10
+207 0x6C6C //RX_FDEQ_GAIN_11
+208 0x7C68 //RX_FDEQ_GAIN_12
+209 0x7478 //RX_FDEQ_GAIN_13
+210 0x787C //RX_FDEQ_GAIN_14
+211 0x9898 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0301 //RX_FDEQ_BIN_0
+221 0x0204 //RX_FDEQ_BIN_1
+222 0x0203 //RX_FDEQ_BIN_2
+223 0x0205 //RX_FDEQ_BIN_3
+224 0x0404 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0410 //RX_FDEQ_BIN_6
+227 0x050A //RX_FDEQ_BIN_7
+228 0x0B07 //RX_FDEQ_BIN_8
+229 0x120E //RX_FDEQ_BIN_9
+230 0x100E //RX_FDEQ_BIN_10
+231 0x0E2D //RX_FDEQ_BIN_11
+232 0x1923 //RX_FDEQ_BIN_12
+233 0x151E //RX_FDEQ_BIN_13
+234 0x1E2D //RX_FDEQ_BIN_14
+235 0x2D40 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0035 //RX_FDDRC_BAND_MARGIN_1
+248 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+249 0x0120 //RX_FDDRC_BAND_MARGIN_3
+250 0x0004 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x2000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x2000 //RX_FDDRC_THRD_3_2
+258 0x5000 //RX_FDDRC_THRD_3_3
+259 0x4000 //RX_FDDRC_SLANT_0_0
+260 0x4000 //RX_FDDRC_SLANT_0_1
+261 0x4000 //RX_FDDRC_SLANT_0_2
+262 0x4000 //RX_FDDRC_SLANT_0_3
+263 0x7FFF //RX_FDDRC_SLANT_1_0
+264 0x7FFF //RX_FDDRC_SLANT_1_1
+265 0x7FFF //RX_FDDRC_SLANT_1_2
+266 0x7FFF //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_VCO-RESERVE2-SWB
+#PARAM_MODE Simple
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x00F3 //TX_PATCH_REG
+3 0x6F7C //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009C //TX_DIST2REF1
+22 0x0019 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0002 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0CAE //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0400 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x2000 //TX_MIN_EQ_RE_EST_0
+153 0x0600 //TX_MIN_EQ_RE_EST_1
+154 0x3000 //TX_MIN_EQ_RE_EST_2
+155 0x3000 //TX_MIN_EQ_RE_EST_3
+156 0x3000 //TX_MIN_EQ_RE_EST_4
+157 0x3000 //TX_MIN_EQ_RE_EST_5
+158 0x3000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x7800 //TX_MIN_EQ_RE_EST_8
+161 0x7800 //TX_MIN_EQ_RE_EST_9
+162 0x7800 //TX_MIN_EQ_RE_EST_10
+163 0x7800 //TX_MIN_EQ_RE_EST_11
+164 0x7800 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x3000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0260 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x0680 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7B0C //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x36B0 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0001 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x01F4 //TX_RATIO_DT_L_TH_HIGH
+226 0x59D8 //TX_RATIO_DT_H_TH_HIGH
+227 0x0001 //TX_RATIO_DT_L0_TH
+228 0x7FFF //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x00C8 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0000 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0100 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0024 //TX_NS_LVL_CTRL_2
+284 0x001A //TX_NS_LVL_CTRL_3
+285 0x0014 //TX_NS_LVL_CTRL_4
+286 0x0011 //TX_NS_LVL_CTRL_5
+287 0x001A //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x0020 //TX_MIN_GAIN_S_0
+290 0x0020 //TX_MIN_GAIN_S_1
+291 0x0020 //TX_MIN_GAIN_S_2
+292 0x0020 //TX_MIN_GAIN_S_3
+293 0x0020 //TX_MIN_GAIN_S_4
+294 0x0020 //TX_MIN_GAIN_S_5
+295 0x0020 //TX_MIN_GAIN_S_6
+296 0x0020 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x7FFF //TX_A_POST_FILT_S_0
+315 0x7FFF //TX_A_POST_FILT_S_1
+316 0x7FFF //TX_A_POST_FILT_S_2
+317 0x7FFF //TX_A_POST_FILT_S_3
+318 0x7FFF //TX_A_POST_FILT_S_4
+319 0x7FFF //TX_A_POST_FILT_S_5
+320 0x7FFF //TX_A_POST_FILT_S_6
+321 0x7FFF //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x6000 //TX_B_POST_FILT_1
+324 0x6000 //TX_B_POST_FILT_2
+325 0x6000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7F00 //TX_LAMBDA_PFILT
+339 0x7F00 //TX_LAMBDA_PFILT_S_0
+340 0x7F00 //TX_LAMBDA_PFILT_S_1
+341 0x7F00 //TX_LAMBDA_PFILT_S_2
+342 0x7F00 //TX_LAMBDA_PFILT_S_3
+343 0x7F00 //TX_LAMBDA_PFILT_S_4
+344 0x7F00 //TX_LAMBDA_PFILT_S_5
+345 0x7F00 //TX_LAMBDA_PFILT_S_6
+346 0x7F00 //TX_LAMBDA_PFILT_S_7
+347 0x3E80 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0040 //TX_DT_BINVAD_TH_0
+354 0x0040 //TX_DT_BINVAD_TH_1
+355 0x0100 //TX_DT_BINVAD_TH_2
+356 0x2000 //TX_DT_BINVAD_TH_3
+357 0x36B0 //TX_DT_BINVAD_ENDF
+358 0x0200 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x01F4 //TX_NOISE_TH_2
+372 0x36B0 //TX_NOISE_TH_3
+373 0x2710 //TX_NOISE_TH_4
+374 0x2CEC //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0DAC //TX_NOISE_TH_6
+379 0x0050 //TX_MINENOISE_TH
+380 0xD508 //TX_MORENS_TFMASK_TH
+381 0x0001 //TX_DRC_QUIET_FLOOR
+382 0x3A98 //TX_RATIODTL_CUT_TH
+383 0x07D0 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x7FFF //TX_POST_MASK_SUP_HSNE
+392 0x1388 //TX_TAIL_DET_TH
+393 0x4000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0080 //TX_SUPHIGH_TH
+396 0x0000 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x1800 //TX_C_POST_FLT_MASK
+399 0x7FFF //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0005 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0050 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4000 //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x3000 //TX_DEREVERB_LF_MU
+515 0x34CD //TX_DEREVERB_HF_MU
+516 0x0007 //TX_DEREVERB_DELAY
+517 0x0004 //TX_DEREVERB_COEF_LEN
+518 0x0003 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x3A98 //TX_GSC_RTOL_TH
+522 0x3A98 //TX_GSC_RTOH_TH
+523 0x7E2C //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4850 //TX_FDEQ_GAIN_2
+570 0x5050 //TX_FDEQ_GAIN_3
+571 0x4B48 //TX_FDEQ_GAIN_4
+572 0x484E //TX_FDEQ_GAIN_5
+573 0x4E5C //TX_FDEQ_GAIN_6
+574 0x564E //TX_FDEQ_GAIN_7
+575 0x4C4E //TX_FDEQ_GAIN_8
+576 0x4E45 //TX_FDEQ_GAIN_9
+577 0x494A //TX_FDEQ_GAIN_10
+578 0x534D //TX_FDEQ_GAIN_11
+579 0x5C54 //TX_FDEQ_GAIN_12
+580 0x5466 //TX_FDEQ_GAIN_13
+581 0x5C70 //TX_FDEQ_GAIN_14
+582 0x7C84 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0202 //TX_PREEQ_BIN_MIC0_0
+642 0x0203 //TX_PREEQ_BIN_MIC0_1
+643 0x0303 //TX_PREEQ_BIN_MIC0_2
+644 0x0304 //TX_PREEQ_BIN_MIC0_3
+645 0x0405 //TX_PREEQ_BIN_MIC0_4
+646 0x0506 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0809 //TX_PREEQ_BIN_MIC0_7
+649 0x0A0A //TX_PREEQ_BIN_MIC0_8
+650 0x0C10 //TX_PREEQ_BIN_MIC0_9
+651 0x1013 //TX_PREEQ_BIN_MIC0_10
+652 0x1414 //TX_PREEQ_BIN_MIC0_11
+653 0x261E //TX_PREEQ_BIN_MIC0_12
+654 0x1E14 //TX_PREEQ_BIN_MIC0_13
+655 0x1414 //TX_PREEQ_BIN_MIC0_14
+656 0x2814 //TX_PREEQ_BIN_MIC0_15
+657 0x401E //TX_PREEQ_BIN_MIC0_16
658 0x0000 //TX_PREEQ_BIN_MIC0_17
659 0x0000 //TX_PREEQ_BIN_MIC0_18
660 0x0000 //TX_PREEQ_BIN_MIC0_19
@@ -80773,7 +102133,7 @@
662 0x0000 //TX_PREEQ_BIN_MIC0_21
663 0x0000 //TX_PREEQ_BIN_MIC0_22
664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
666 0x4848 //TX_PREEQ_GAIN_MIC1_0
667 0x4848 //TX_PREEQ_GAIN_MIC1_1
668 0x4848 //TX_PREEQ_GAIN_MIC1_2
@@ -80781,16 +102141,16 @@
670 0x4848 //TX_PREEQ_GAIN_MIC1_4
671 0x4848 //TX_PREEQ_GAIN_MIC1_5
672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+673 0x4849 //TX_PREEQ_GAIN_MIC1_7
+674 0x4A4A //TX_PREEQ_GAIN_MIC1_8
+675 0x4B4D //TX_PREEQ_GAIN_MIC1_9
+676 0x4E4F //TX_PREEQ_GAIN_MIC1_10
+677 0x5052 //TX_PREEQ_GAIN_MIC1_11
+678 0x5354 //TX_PREEQ_GAIN_MIC1_12
+679 0x5454 //TX_PREEQ_GAIN_MIC1_13
+680 0x5653 //TX_PREEQ_GAIN_MIC1_14
+681 0x4C48 //TX_PREEQ_GAIN_MIC1_15
+682 0x4444 //TX_PREEQ_GAIN_MIC1_16
683 0x4848 //TX_PREEQ_GAIN_MIC1_17
684 0x4848 //TX_PREEQ_GAIN_MIC1_18
685 0x4848 //TX_PREEQ_GAIN_MIC1_19
@@ -80798,23 +102158,23 @@
687 0x4848 //TX_PREEQ_GAIN_MIC1_21
688 0x4848 //TX_PREEQ_GAIN_MIC1_22
689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0000 //TX_PREEQ_BIN_MIC1_0
-691 0x0000 //TX_PREEQ_BIN_MIC1_1
-692 0x0000 //TX_PREEQ_BIN_MIC1_2
-693 0x0000 //TX_PREEQ_BIN_MIC1_3
-694 0x0000 //TX_PREEQ_BIN_MIC1_4
-695 0x0000 //TX_PREEQ_BIN_MIC1_5
-696 0x0000 //TX_PREEQ_BIN_MIC1_6
-697 0x0000 //TX_PREEQ_BIN_MIC1_7
-698 0x0000 //TX_PREEQ_BIN_MIC1_8
-699 0x0000 //TX_PREEQ_BIN_MIC1_9
-700 0x0000 //TX_PREEQ_BIN_MIC1_10
-701 0x0000 //TX_PREEQ_BIN_MIC1_11
-702 0x0000 //TX_PREEQ_BIN_MIC1_12
-703 0x0000 //TX_PREEQ_BIN_MIC1_13
-704 0x0000 //TX_PREEQ_BIN_MIC1_14
-705 0x0000 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
+690 0x0202 //TX_PREEQ_BIN_MIC1_0
+691 0x0203 //TX_PREEQ_BIN_MIC1_1
+692 0x0303 //TX_PREEQ_BIN_MIC1_2
+693 0x0304 //TX_PREEQ_BIN_MIC1_3
+694 0x0405 //TX_PREEQ_BIN_MIC1_4
+695 0x0506 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0809 //TX_PREEQ_BIN_MIC1_7
+698 0x0A0A //TX_PREEQ_BIN_MIC1_8
+699 0x0C10 //TX_PREEQ_BIN_MIC1_9
+700 0x1013 //TX_PREEQ_BIN_MIC1_10
+701 0x1414 //TX_PREEQ_BIN_MIC1_11
+702 0x261E //TX_PREEQ_BIN_MIC1_12
+703 0x1E14 //TX_PREEQ_BIN_MIC1_13
+704 0x1414 //TX_PREEQ_BIN_MIC1_14
+705 0x2814 //TX_PREEQ_BIN_MIC1_15
+706 0x401E //TX_PREEQ_BIN_MIC1_16
707 0x0000 //TX_PREEQ_BIN_MIC1_17
708 0x0000 //TX_PREEQ_BIN_MIC1_18
709 0x0000 //TX_PREEQ_BIN_MIC1_19
@@ -80829,16 +102189,16 @@
718 0x4848 //TX_PREEQ_GAIN_MIC2_3
719 0x4848 //TX_PREEQ_GAIN_MIC2_4
720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+721 0x494B //TX_PREEQ_GAIN_MIC2_6
+722 0x4C4D //TX_PREEQ_GAIN_MIC2_7
+723 0x4E4F //TX_PREEQ_GAIN_MIC2_8
+724 0x5051 //TX_PREEQ_GAIN_MIC2_9
+725 0x5255 //TX_PREEQ_GAIN_MIC2_10
+726 0x5754 //TX_PREEQ_GAIN_MIC2_11
+727 0x5454 //TX_PREEQ_GAIN_MIC2_12
+728 0x544F //TX_PREEQ_GAIN_MIC2_13
+729 0x463D //TX_PREEQ_GAIN_MIC2_14
+730 0x4A48 //TX_PREEQ_GAIN_MIC2_15
731 0x4848 //TX_PREEQ_GAIN_MIC2_16
732 0x4848 //TX_PREEQ_GAIN_MIC2_17
733 0x4848 //TX_PREEQ_GAIN_MIC2_18
@@ -80847,22 +102207,22 @@
736 0x4848 //TX_PREEQ_GAIN_MIC2_21
737 0x4848 //TX_PREEQ_GAIN_MIC2_22
738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0000 //TX_PREEQ_BIN_MIC2_0
-740 0x0000 //TX_PREEQ_BIN_MIC2_1
-741 0x0000 //TX_PREEQ_BIN_MIC2_2
-742 0x0000 //TX_PREEQ_BIN_MIC2_3
-743 0x0000 //TX_PREEQ_BIN_MIC2_4
-744 0x0000 //TX_PREEQ_BIN_MIC2_5
-745 0x0000 //TX_PREEQ_BIN_MIC2_6
-746 0x0000 //TX_PREEQ_BIN_MIC2_7
-747 0x0000 //TX_PREEQ_BIN_MIC2_8
-748 0x0000 //TX_PREEQ_BIN_MIC2_9
-749 0x0000 //TX_PREEQ_BIN_MIC2_10
-750 0x0000 //TX_PREEQ_BIN_MIC2_11
-751 0x0000 //TX_PREEQ_BIN_MIC2_12
-752 0x0000 //TX_PREEQ_BIN_MIC2_13
-753 0x0000 //TX_PREEQ_BIN_MIC2_14
-754 0x0000 //TX_PREEQ_BIN_MIC2_15
+739 0x0203 //TX_PREEQ_BIN_MIC2_0
+740 0x0303 //TX_PREEQ_BIN_MIC2_1
+741 0x0304 //TX_PREEQ_BIN_MIC2_2
+742 0x0405 //TX_PREEQ_BIN_MIC2_3
+743 0x0506 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0809 //TX_PREEQ_BIN_MIC2_6
+746 0x0A0A //TX_PREEQ_BIN_MIC2_7
+747 0x0C10 //TX_PREEQ_BIN_MIC2_8
+748 0x1013 //TX_PREEQ_BIN_MIC2_9
+749 0x1414 //TX_PREEQ_BIN_MIC2_10
+750 0x261E //TX_PREEQ_BIN_MIC2_11
+751 0x1E14 //TX_PREEQ_BIN_MIC2_12
+752 0x1414 //TX_PREEQ_BIN_MIC2_13
+753 0x2814 //TX_PREEQ_BIN_MIC2_14
+754 0x4022 //TX_PREEQ_BIN_MIC2_15
755 0x0000 //TX_PREEQ_BIN_MIC2_16
756 0x0000 //TX_PREEQ_BIN_MIC2_17
757 0x0000 //TX_PREEQ_BIN_MIC2_18
@@ -80872,34 +102232,34 @@
761 0x0000 //TX_PREEQ_BIN_MIC2_22
762 0x0000 //TX_PREEQ_BIN_MIC2_23
763 0x0006 //TX_MASKING_ABILITY
-764 0x2000 //TX_NND_WEIGHT
-765 0x0064 //TX_MIC_CALIBRATION_0
-766 0x006A //TX_MIC_CALIBRATION_1
-767 0x006A //TX_MIC_CALIBRATION_2
-768 0x006B //TX_MIC_CALIBRATION_3
-769 0x0048 //TX_MIC_PWR_BIAS_0
-770 0x003C //TX_MIC_PWR_BIAS_1
-771 0x003C //TX_MIC_PWR_BIAS_2
-772 0x003C //TX_MIC_PWR_BIAS_3
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
773 0x0000 //TX_GAIN_LIMIT_0
-774 0x0009 //TX_GAIN_LIMIT_1
-775 0x000C //TX_GAIN_LIMIT_2
-776 0x000F //TX_GAIN_LIMIT_3
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x0000 //TX_GAIN_LIMIT_3
777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
778 0x7FDE //TX_BVE_VAD0_ALPHAUP
779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
-783 0x3000 //TX_TDDRC_ALPHA_UP_01
-784 0x3000 //TX_TDDRC_ALPHA_UP_02
-785 0x3000 //TX_TDDRC_ALPHA_UP_03
-786 0x3000 //TX_TDDRC_ALPHA_UP_04
-787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
-788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
-789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
-790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
-791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
793 0x0000 //TX_TDDRC_RESRV_0
794 0x0000 //TX_TDDRC_RESRV_1
@@ -80924,16 +102284,16 @@
813 0x5333 //TX_FDDRC_SLANT_1_1
814 0x5333 //TX_FDDRC_SLANT_1_2
815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0002 //TX_DEADMIC_SILENCE_TH
-817 0x0147 //TX_MIC_DEGRADE_TH
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
818 0x0078 //TX_DEADMIC_CNT
819 0x0078 //TX_MIC_DEGRADE_CNT
820 0x0000 //TX_FDDRC_RESRV_4
821 0x0000 //TX_FDDRC_RESRV_5
822 0x0000 //TX_FDDRC_RESRV_6
-823 0x0000 //TX_KS_NOISEPASTE_FACTOR
-824 0x0000 //TX_KS_CONFIG
-825 0x0000 //TX_KS_GAIN_MIN
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
826 0x0000 //TX_KS_RESRV_0
827 0x0000 //TX_KS_RESRV_1
828 0x0000 //TX_KS_RESRV_2
@@ -80941,10 +102301,10 @@
830 0x2000 //TX_TPKA_FP
831 0x0080 //TX_MIN_G_FP
832 0x2000 //TX_MAX_G_FP
-833 0x0000 //TX_FFP_FP_K_METAL
-834 0x0000 //TX_A_POST_FLT_FP
-835 0x0000 //TX_RTO_OUTBEAM_TH
-836 0x0000 //TX_TPKA_FP_THD
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
837 0x0000 //TX_MAX_G_FP_BLK
838 0x0000 //TX_FFP_FADEIN
839 0x0000 //TX_FFP_FADEOUT
@@ -80954,51 +102314,51 @@
843 0x0000 //TX_WHISP_ENTHL
844 0x0000 //TX_WHISP_RTOTH
845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
+846 0x0096 //TX_MUTE_PERIOD
847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0000 //TX_FFP_RESRV_2
-849 0x0000 //TX_FFP_RESRV_3
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
850 0x0000 //TX_FFP_RESRV_4
851 0x0000 //TX_FFP_RESRV_5
852 0x0000 //TX_FFP_RESRV_6
853 0x0002 //TX_FILTINDX
-854 0x0000 //TX_TDDRC_THRD_0
-855 0x0000 //TX_TDDRC_THRD_1
-856 0x0E80 //TX_TDDRC_THRD_2
-857 0x3800 //TX_TDDRC_THRD_3
-858 0x2A00 //TX_TDDRC_SLANT_0
-859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x3000 //TX_TDDRC_ALPHA_UP_00
-861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+854 0x0003 //TX_TDDRC_THRD_0
+855 0x0004 //TX_TDDRC_THRD_1
+856 0x1000 //TX_TDDRC_THRD_2
+857 0x1000 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x0000 //TX_TDDRC_HMNC_GAIN
+863 0x199A //TX_TDDRC_HMNC_GAIN
864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0000 //TX_TDDRC_SMT_W
-866 0x0100 //TX_TDDRC_DRC_GAIN
-867 0x0000 //TX_TDDRC_LMT_THRD
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0E21 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x1EB8 //TX_TFMASKLTH
-870 0x170A //TX_TFMASKLTHL
-871 0x7FFF //TX_TFMASKHTH
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
872 0x0CCD //TX_TFMASKLTH_BINVAD
873 0xF333 //TX_TFMASKLTH_NS_EST
874 0x2CCD //TX_TFMASKLTH_DOA
-875 0x0CCD //TX_TFMASKTH_BLESSCUT
-876 0x4000 //TX_B_LESSCUT_RTO_MASK
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
878 0x2000 //TX_B_POST_FLT_MASK
879 0x0000 //TX_B_POST_FLT_MASK1
880 0x5333 //TX_GAIN_WIND_MASK
-881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x0000 //TX_FASTNS_OUTIN_TH
-884 0x0000 //TX_FASTNS_TFMASK_TH
-885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
-886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
-887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
888 0x00C8 //TX_FASTNS_ARSPC_TH
-889 0x8000 //TX_FASTNS_MASK5_TH
-890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
891 0x4000 //TX_A_LESSCUT_RTO_MASK
892 0x1770 //TX_FASTNS_NOISETH
893 0xC000 //TX_FASTNS_SSA_THLFL
@@ -81051,9 +102411,9 @@
940 0x0450 //TX_MIC1MUTE_AMP_THR
941 0x0008 //TX_MIC1MUTE_CVG_TIME
942 0x0008 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_AMS_RESRV_01
-944 0x0000 //TX_AMS_RESRV_02
-945 0x0000 //TX_AMS_RESRV_03
+943 0x0100 //TX_AMS_RESRV_01
+944 0xE0C0 //TX_AMS_RESRV_02
+945 0x0FA0 //TX_AMS_RESRV_03
946 0x0000 //TX_AMS_RESRV_04
947 0x0000 //TX_AMS_RESRV_05
948 0x0000 //TX_AMS_RESRV_06
@@ -81071,7 +102431,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x2040 //RX_RECVFUNC_MODE_0
+0 0x0040 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0000 //RX_SAMPLINGFREQ_SIG
3 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -81922,7 +103282,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x2040 //RX_RECVFUNC_MODE_0
+157 0x0040 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0000 //RX_SAMPLINGFREQ_SIG
160 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -82773,10 +104133,10 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB
-#PARAM_MODE FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#CASE_NAME HEADSET-TTY_FULL-RESERVE2-SWB
+#PARAM_MODE Simple
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
@@ -83020,7 +104380,7 @@
239 0x0000 //TX_DT_RESRV_7
240 0x0000 //TX_DT_RESRV_8
241 0x0000 //TX_DT_RESRV_9
-242 0xF700 //TX_THR_SN_EST_0
+242 0xFA00 //TX_THR_SN_EST_0
243 0xF400 //TX_THR_SN_EST_1
244 0xF800 //TX_THR_SN_EST_2
245 0xF600 //TX_THR_SN_EST_3
@@ -83145,7 +104505,7 @@
364 0x0000 //TX_K_APT
365 0x0001 //TX_NOISEDET
366 0x05A0 //TX_NDETCT
-367 0x04E8 //TX_NOISE_TH_0
+367 0x0383 //TX_NOISE_TH_0
368 0x1388 //TX_NOISE_TH_0_2
369 0x3A98 //TX_NOISE_TH_0_3
370 0x0C80 //TX_NOISE_TH_1
@@ -83157,11 +104517,11 @@
376 0x7FFF //TX_NOISE_TH_5_3
377 0x7FFF //TX_NOISE_TH_5_4
378 0x00C8 //TX_NOISE_TH_6
-379 0x02BC //TX_MINENOISE_TH
+379 0x044C //TX_MINENOISE_TH
380 0xD508 //TX_MORENS_TFMASK_TH
381 0x0001 //TX_DRC_QUIET_FLOOR
382 0x3A98 //TX_RATIODTL_CUT_TH
-383 0x1482 //TX_DT_CUT_K1
+383 0x0DAC //TX_DT_CUT_K1
384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
386 0x6400 //TX_OUT_ENER_S_TH_NOISY
@@ -83184,7 +104544,7 @@
403 0x0000 //TX_POST_MASK_SUP
404 0x0000 //TX_POST_MASK_ADJUST
405 0x0014 //TX_NS_ENOISE_MIC0_TH
-406 0x04E7 //TX_MINENOISE_MIC0_TH
+406 0x02F3 //TX_MINENOISE_MIC0_TH
407 0x0226 //TX_MINENOISE_MIC0_S_TH
408 0x2879 //TX_MIN_G_CTRL_SSNS
409 0x0400 //TX_METAL_RTO_THR
@@ -83667,9 +105027,9 @@
886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
888 0x00C8 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
+889 0x8000 //TX_FASTNS_MASK5_TH
890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7000 //TX_A_LESSCUT_RTO_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
892 0x1770 //TX_FASTNS_NOISETH
893 0xC000 //TX_FASTNS_SSA_THLFL
894 0xC000 //TX_FASTNS_SSA_THHFL
@@ -83741,7 +105101,7 @@
960 0x0000 //TX_AMS_RESRV_18
961 0x0000 //TX_AMS_RESRV_19
#RX
-0 0x2040 //RX_RECVFUNC_MODE_0
+0 0x0040 //RX_RECVFUNC_MODE_0
1 0x0000 //RX_RECVFUNC_MODE_1
2 0x0000 //RX_SAMPLINGFREQ_SIG
3 0x0000 //RX_SAMPLINGFREQ_PROC
@@ -84592,7 +105952,7 @@
129 0x0100 //RX_SPK_VOL
130 0x0000 //RX_VOL_RESRV_0
#RX 2
-157 0x2040 //RX_RECVFUNC_MODE_0
+157 0x0040 //RX_RECVFUNC_MODE_0
158 0x0000 //RX_RECVFUNC_MODE_1
159 0x0000 //RX_SAMPLINGFREQ_SIG
160 0x0000 //RX_SAMPLINGFREQ_PROC
--
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